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Gallium nitride (GaN) power electronics are becoming widely used in power conversion systems due to their high electron mobility. The cascode structure, with a Si metal-oxide-semiconductor field-effect transistor (mosfet) connect in series for gate control, in enhancement mode of GaN has been promoted by manufacturers due to its low price and excellent characteristic. However, the existed junction temperature method can only obtain one temperature value of two chips, rather than each of it caused by cascode structure. This structure therefore leads to different failure modes with thermal coupling between two chips. To better analyze the failure mechanism, it is important to separate the junction temperatures of the internal mosfet and the high-electron mobility transistors (HEMTs). This article proposes a new measurement method which can get the junction temperature of the two chips inside the cascode GaN can be obtained without damaging the device packaging. First, by applying different magnitudes of reverse measurement currents to the GaN power electronics in the cascode, the theoretical formulae are calculated to further derive the calibration curves for the temperature dependent changes of the electrical parameters of the internal mosfet reverse diodes and HEMT devices. By constructing a special timing circuit and combining it with actual transient thermal impedance test (just as an example of a reliability test), the junction temperature of the cascode internal GaN chips can be calculated under real operating conditions. Detailed experiments verify the feasibility of the method and the accuracy of the junction temperature calculation (the temperature deviation does not exceed 5 K).

With the fabulous growth of the renewable energy industry, silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (mosfets) are increasingly finding applications in various scenarios. To ensure the safe operation of SiC mosfets, there is a pressing need for fast and reliable short-circuit protection methods. This article aims to give a detail overview of the existing short-circuit protection technologies for SiC mosfets regarding their merits and limitations. First, the challenges associated with short-circuit protection are comprehensively analyzed. Subsequently, thorough comparisons of state-of-the-art short-circuit detection methods and soft turn-off strategies are conducted, respectively. Finally, this work outlines the prospects of short-circuit protection technologies in the aspects of deficiencies and optimization of short-circuit protection in multichip power module with paralleled SiC mosfets.

LLC resonant dc/dc converters are widely applied in various scenarios, such as electronic device power supplies, vehicle chargers, etc. To improve the efficiency of the LLC converter, synchronous rectifiers (SR) are employed. However, due to various reasons, such as the hardware propagation delay, the SR gate signal can lag behind the secondary-side current particularly when the switching frequency of the LLC converter approaches the mega-Hertz level. This delay has a critical impact on the operation mode and the output characteristic of the LLC converter. Starting with the SR delay mechanism, this article comprehensively analyzes the operation of the LLC converter and derives the time-domain model under SR signal delay. The output gain and accurate power loss model of MOSFETs under different working modes are built to study the impact of SR signal delay on the LLC converter. The relationship between the SR signal delay and the LLC converter characteristics is quantified and summarized. Two new working stages of the LLC converter are revealed. Simulation and experimental studies are conducted to validate the theoretical analysis results. This article can provide the theoretical basis for optimizing the design of a high-frequency LLC converter.