33 results on '"Ma, William Cheng-Yu"'
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2. Exploring Performance and Reliability Behavior of Nanosheet Channel Thin-Film Transistors under Independent Dual Gate Bias Operation
3. Temperature dependence improvement of polycrystalline-silicon tunnel field-effect thin-film transistor
4. Ferroelectric Tunnel Thin-Film Transistor for Synaptic Applications
5. Impacts of pulse conditions on endurance behavior of ferroelectric thin-film transistor non-volatile memory
6. Abnormal Degradation Behaviors Under Negative Bias Stress in Flexible p-Channel Low-Temperature Polycrystalline Silicon Thin-Film Transistors After Laser Lift-Off Process
7. Bias temperature instability comparison of CMOS LTPS-TFTs with HfO2 gate dielectric
8. Impact of Nanosheet Thickness on Performance and Reliability of Polycrystalline-Silicon Thin-Film Transistors With Double-Gate Operation.
9. First Demonstration of Ferroelectric Tunnel Thin-Film Transistor Nonvolatile Memory With Polycrystalline-Silicon Channel and HfZrO Gate Dielectric
10. Investigation of Electrical Characteristics in Low-Temperature Polycrystalline Silicon Thin-Film Transistors Fabricated at Low-Temperature Process
11. Distinction between interfacial layer effect and trap passivation effect of N2 plasma treatment on LTPS-TFTs
12. First Demonstration of Heterogeneous IGZO/Si CFET Monolithic 3-D Integration With Dual Work Function Gate for Ultralow-Power SRAM and RF Applications
13. Demonstration of synaptic characteristics of polycrystalline-silicon ferroelectric thin-film transistor for application of neuromorphic computing
14. Impacts of Independent Dual-Gate Operation on Reliability of Nanosheet Junctionless Thin-Film Transistor
15. Impacts of O2 Plasma on Negative Gate Bias Stress Instability of Tunnel Thin-Film Transistor
16. Impacts of Ammonia Gas Plasma Surface Treatment on Polycrystalline-Silicon Junctionless Thin-Film Transistor
17. Various Reliability Investigations of Low Temperature Polycrystalline Silicon Tunnel Field-Effect Thin-Film Transistor
18. Impacts of Stress Voltage and Channel Length on Hot-Carrier Characteristics of Tunnel Field-Effect Thin-Film Transistor
19. Subthreshold Swing Saturation of Nanoscale MOSFETs Due to Source-to-Drain Tunneling at Cryogenic Temperatures
20. Impacts of Vertically Stacked Monolithic 3D-IC Process on Characteristics of Underlying Thin-Film Transistor
21. Impact of Dual-Gate Configuration on the Endurance of Ferroelectric Thin-Film Transistors With Nanosheet Polycrystalline-Silicon Channel Film
22. Impacts of channel film thickness on poly-Si tunnel thin-film transistors
23. Dependence of Sub-Thermionic Swing on Channel Thickness and Drain Bias of Poly-Si Junctionless Thin-Film Transistor
24. Impacts of Trap-State Generation on Tunnel Thin-Film Transistor
25. Positive bias temperature instability of tunnel thin-film transistor for applications of system-on-panel and three-dimension integrated circuits
26. Current Degradation by Carrier Recombination in a Poly-Si TFET With Gate-Drain Underlapping
27. Plasma-Induced Interfacial Layer Impacts on TFETs With Poly-Si Channel Film by Oxygen Plasma Surface Treatment
28. Positive-Bias Temperature Instability Improvement of Poly-Si Thin-Film Transistor With HfO2 Gate Dielectric by Ammonia Plasma Treatment
29. Performance improvement of poly-Si tunnel thin-film transistor by NH3 plasma treatment
30. Performance Improvement of Poly-Si Tunnel FETs by Trap Density Reduction
31. Impact of Crystallization Method on Poly-Si Tunnel FETs
32. Threshold Voltage Reduction and Mobility Improvement of LTPS-TFTs With NH3 Plasma Treatment
33. Reverse Electrical Behavior of N-Channel and P-Channel LTPS-TFTs by N2O Plasma Surface Treatment
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