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Low temperature (≤400 °C) formation of orientation-controlled large (≥10 µm) Ge-on-insulator (GOI) structures is desired to fabricate 3-dimensional large-scale integrated circuits (LSIs), where Ge-based functional devices are stacked on Si-LSIs. For this purpose, Si-seeded pulse-laser annealing (PLA) combined with low-temperature substrate heating (≤400 °C) has been developed. Here, a-Ge stripes on Si substrates partially covered with insulating films are subjected to PLA, where single edges of the a-Ge stripes directly contact Si-seeding substrates through opening windows of insulating films. PLA at room temperature generates lateral growth of Ge layers from Si-seeding substrates. However, the growth length is short (~1 µm), which is attributed to very short melting time. To increase the melting time, low-temperature (≤400 °C) substrate heating during PLA is examined. As a result, very large (~20 µm) orientation-controlled GOI is obtained by combining substrate heating (400 °C) with PLA. Detailed electron microscopy analysis reveals very high crystallinity of the grown layers. Consequently, high-quality rapid-melting growth of Ge becomes possible at a low processing temperature of ~400 °C. This thermally-assisted (~400 °C) Si-seeded PLA will facilitate realization of 3-dimensional LSIs.

Low-temperature formation of Sn-doped Ge on insulator is desired to realize next generation flexible electronics. To achieve this, metal-induced crystallization (MIC) of a-GeSn is investigated. By MIC of a-GeSn with initial Sn concentration of 5%, Sn-doped Ge is obtained at low temperatures ( Introduction A technique for low-temperature (≤250°C) formation of high-quality crystalline Ge films on insulator is expected to realize advanced high performance thin film transistors (TFT) on flexible plastic substrates (softening temperature: ~300oC). To improve quality of Ge crystals, Sn-doping (2layers [2]. However, the growth temperature (425°C) reported to date is higher than the softening temperatures of plastic substrates. To decrease the growth temperature of Sn-doped Ge, in the present study, we investigate metal-induced crystallization (MIC) of a-GeSn. This successfully decreases the growth temperature below 250°C. Experimental Procedure Fig.1 schematically shows the procedure of sample preparation. Amorphous Ge1-xSnx layers (x: 0-0.2, thickness: 100 nm) were deposited on quartz substrates at room temperature. Then, Au layer patterns were formed on the amorphous GeSn layers. The samples were annealed at 150-250oC for 10-60 min to induce lateral growth in a N2ambient. The growth characteristics were analyzed by Nomarski optical microscopy and microprobe Raman spectroscopy. Results and Discussion Figs. 2(a) and 2(b) show Nomarski optical micrographs of Ge1-xSnx (x: 0.05 and 0.2, respectively) samples after annealing at 250oC for 10 min. Au pattern regions are located in the left side areas of the micrographs. In the case of the low Sn concentration (5%), different contrast regions are observed around the Au patterns, as indicated by the broken lines. On the other hand, the sample with the high Sn concentration (20%) shows no change around the Au pattern after annealing. The Raman spectra obtained from these samples are summarized in Fig. 2(c). In Raman spectra #1 for the low Sn concentration (5%), a sharp peak due to Ge-Ge bonding in c-Ge is clearly observed. On the other hand, no peaks are detected in spectra #3 for the sample with the high Sn concentration (20%). These results indicate that lateral growth is generated from the Au patterns for samples with the low Sn concentration (5%), while it is not generated for the high Sn concentration (20%).The lateral growth lengths at 150 and 250oC for samples with various Sn concentrations were estimated using theNomarski optical microscopy combined with line-scanning of microprobe Raman measurements. The results are summarized as a function of the annealing time in Fig. 3. In the case of low Sn concentrations ( References [1] O. Nakatsuka, et al., Jpn. J. Appl. Phys. Lett. 49, 04DA10 (2010). [2] W. Takeuchi, et al., Appl. Phys. Lett. 107, 022103 (2015). Figure 1

Structural and electrical properties of a Ge(111) layer directly grown on a Si(111) substrate are studied. Via optimized two-step growth manner, we form a high-quality relaxed Ge layer, where strain-relieving dislocations are confined close to a Ge/Si interface. Consequently, a density of holes, which unintentionally come from crystal defects, is highly suppressed below 4 × 10 16 cm − 3 , which leads to significantly high hole Hall mobility exceeding 1500 cm 2 /Vs at room temperature. By layer transfer of the grown Ge layer, we also fabricate a Ge(111)-on-Insulator, which is a promising template for high-performance Ge-based electronic and photonic devices.

GeSn with a high substitutional Sn concentration (> 7%) is an attractive direct band gap material for high-efficiency photodevices that can be merged with large-scale integrated circuits (LSIs). To achieve GeSn with high Sn concentration, low-temperature solid-phase epitaxy using amorphous-GeSn (a-GeSn) (Sn concentration: 10%–36%)/crystal-Ge (c-Ge) stacked structures was investigated. Solid-phase growth of GeSn was enhanced as Sn concentration was increased, which enabled epitaxial growth at very low temperature (150–200 °C). Interestingly, concentrations of substitutional Sn increased with decreasing growth temperature. As a result, epitaxial growth of GeSn with substitutional Sn concentrations of ~ 8% was achieved by decreasing the growth temperature to 150 °C using a-GeSn (Sn concentration: 36%)/c-Ge stacked structures. This technique is expected to be useful to realize multi-function LSIs, where high-efficiency photodevices are integrated with transistors.

I NTRODUCTION Low-temperature (≤300oC) formation of quasi-single crystal SiGe, i.e., orientation-controlled large-grain crystal (≥10 μm) SiGe, on insulator is desired for realization of advanced flexible electronics, where high-speed transistors and high-efficiency optical devices are integrated on flexible plastics substrates (softening temperature: ~350°C). This is because SiGe provides higher carrier mobility and superior optical properties compared with Si. Recently, we developed gold-induced layer-exchange crystallization (GIC) using a-Ge/Au stacked structures.[1-3] This enabled selective formation of (100)- or (111)-oriented large-grain Ge (≥20 μm) through controlling nucleation during GIC by using anisotropic surface energy on substrates.[1] We have developed this technique onto plastic and realized orientation-controlled large-grain crystals on flexible plastic substrates with low concentration holes (~2×1017 cm-3), which enables high carrier mobility (~160 cm2/Vs).[2,3] However, reports of orientation-controlled growth by GIC are limited to pure Ge crystals so far. In the present study the GIC technique is developed to SiGe. Consequently, quasi-single crystal SiGe is achieved on insulating substrates at low temperatures (~300oC). EXPERIMENTAL The sample structure and experimental procedure are schematically shown in Fig. 1. In the experiment, fused-quartz chips were employed as substrates. On the substrates, a-SiGe (Ge concentration: 0-100%, thickness: 100 nm) /Au (thickness: 100 nm) stacked structures were formed. Here, amorphous Al2O3 interface-layers (thickness: 4-7 nm) were introduced between a-SiGe and Au layers as diffusion barrier to make interface-nucleation dominate over random bulk-nucleation in Au layers.[1] These samples were annealed at 250-300oC to induce crystallization. The grown layers were analyzed by Nomarski optical microscopy, electron backscattering diffraction (EBSD), and micro-probe Raman scattering spectroscopy (excitation-laser spot-diameter: ~1 μm). The Nomarski optical microscopy observations were carried out from the back sides of the samples through the transparent quartz substrates to characterize the bottom layers. RESULTS AND DISCUSSION The growth features of samples with various Ge fractions and Al2O3 interface layer thicknesses were investigated by Nomarski optical microscopy observations after annealing at 250°C for 50 h. Typical Nomarski micrographs of samples with Ge concentrations of 50% and 100% are shown in Figs. 2(a)-2(b) and 2(c)-2(d), respectively. In these micrographs, dark and bright contrast regions are observed. Micro-probe Raman measurements revealed that the dark regions dominantly observed in Figs. 2(a), 2(c), and 2(d) are crystal, while bright regions dominant in Fig. 2(b) are not crystal. These results indicate that layer exchange crystallization occurs for the samples shown in Figs. 2(a), 2(c), and 2(d), while it does not proceed for the sample shown in Fig. 2(b). EBSD measurements revealed that the grown layers for Fig. 2(d) consisted of (111)-oriented large-grains (≥10 μm). On the other hand, grown layers for Figs. 2(a) and 2(c) consisted of randomly-oriented small-grains (1-3 μm). Here, we examined the Nomarski micrographs of a no-grown Si0.5Ge0.5 sample (diffusion barrier thickness: 5 nm), shown in Fig. 2(b). It is found that nuclei are formed for the Si0.5Ge0.5 sample, though lateral growth does not proceed from the nuclei. From this finding, it is speculated that for the Si0.5Ge0.5 sample (diffusion barrier thickness: 5 nm), (111)-oriented nucleation occurs at Au/SiO2 interface. However, lateral growth does not proceed even after long time annealing. Thus, layer-exchange is not observed. It is suggested that lateral crystallization in GIC is retarded by Si introduction. This consideration triggers an idea that (111)-oriented large-grains can be obtained even for the Si0.5Ge0.5 sample by generating lateral growth from nuclei. Thus, we examine annealing at a higher temperature of 300°C. A Nomarski micrograph of Si0.5Ge0.5 sample (diffusion barrier thickness: 5 nm) after annealing at 300°C for 50 h is shown in Fig. 3(a). Micro-probe Raman measurements reveled layer-exchange crystallization in the entire area. The crystal structures of the grown layer are examined by EBSD measurements. The result is shown in Fig. 3(b), which reveals (111)-oriented large-grains (≥10 μm). As a result, quasi-single crystal SiGe is realized on insulator. This technique will facilitate realization of advanced flexible electronics. ACKNOWLEDGEMENT Part of this work was supported by JSPS Core-to-Core Program, A. Advanced Research Networks. References [1] J.-H. Park et al., Appl. Phys. Lett. 103, 082102 (2013). [2] J.-H. Park et al., Jpn. J. Appl. Phys. 53, 020302 (2014). [3] J.-H. Park et al., Appl. Phys. Lett. 104, 252110 (2014). Figure 1

Introduction Formation of crystalline GeSn film on insulator with high Sn concentration exceeding thermal equilibrium solid-solubility is strongly expected to realize high-speed thin film transistors. To explore non-thermal equilibrium processing [1], we examined crystallization of amorphous-GeSn (a-GeSn) with various modulated Sn concentration by pulsed laser annealing (PLA). In the present study, we focus on the influence of the Sn concentration on crystallization of a-GeSn by PLA. Experimental Procedure Schematic sample structure and PLA conditions are shown in Fig.1. A-Ge1-xSnx (0≦x≦0.2) films (thickness: 100 nm) were deposited on quartz substrates by a molecular beam technique. These samples were irradiated with a pulsed laser (energy : 10 - 230 mJ/cm2, pulse period : 1 sec, pulse number : 100 shot). The laser annealed regions were analyzed by Nomarski microscopy and Raman scattering spectroscopy. Results and Discussion Nomarski micrograph and Raman spectra of Ge0.8Sn0.2 samples before and after PLA with various energy are summarized in Fig. 2. In the samples after PLA, the contrast-changed regions were observed, compared with the as-deposited sample. Here, the contrast becomes stronger with increasing energy from 50 mJ/cm2 to 170 mJ/cm2, and finally the GeSn layer was damaged for energy of 230 mJ/cm2. Raman spectra reveales that Ge0.8Sn0.2 is crystallized on insulating substrates by 50 - 170 mJ/cm2 PLA. The process-window to achieve crystalline GeSn is summarized in Fig. 3(a), where the energy for starting crystallization and the energy just before damaging are indicated as Ecryst. and Edamage , respectively. Substitutional Sn concentration estimated from shift of Ge-Ge peak obtained by Raman measurements is shown in Fig. 3(b). The process window necessary for crystallization is significantly expanded by introducing Sn, i.e. 16 mJ/cm2 for Ge, ~ 130 mJ/cm2 for GeSn. High Sn concentration exceeding thermal equilibrium solid-solubility is obtained by PLA, for all GeSn samples. Interestingly, for samples with initial Sn concentration of 5 % and 10 %, almost all Sn atoms are incorporated into substitutional site, while for 20 % sample, only half of Sn atoms are incorporated into substitutional site. The detailed physics will be discussed in the presentation. References [1] M. Kurosawa, et al., Appl. Phys. Lett. 104, 061901 (2014). Figure 1

Low-temperature (≤200°C) formation of GeSn (substitutional Sn concentration: >8%) films on insulator is desired to realize high-speed thin film transistors (TFTs) and high-efficiency optical devices on flexible plastic substrates (softening temperature: ∼200°C). This is because GeSn (substitutional Sn concentration: >8%) has higher carrier mobility than Si and Ge due to the direct-transition energy band structure with smaller effective mass of carriers.

Low temperature (≤500°C) formation of n-type crystalline Ge films on insulator is required to achieve the next-generation large-scale integrated circuits (LSI), where optical functions are merged. This is because n-type Ge shows high-efficiency optical functions owing to high electron population in the Γ band.

High-speed fully depleted thin-film transistors (TFTs) for low-power consumption are required for next-generation electronics, such as three-dimensional large-scale integrated circuits and advanced system-in-displays. For this purpose, high-carrier-mobility semiconductor thin-films (thickness: ≤∼50 nm) on insulator structures should be fabricated under low-temperature processing conditions (≤500 °C). To achieve this, solid-phase crystallization of amorphous GeSn (a-GeSn) with low Sn concentration (2%) is investigated for a wide range of film thicknesses (30 − 200 nm), where thin a-Si underlayers (thickness: 0 − 20 nm) are introduced between a-GeSn films and substrates. GeSn is polycrystallized by annealing at 450 °C, keeping Si underlayers amorphous. Crystal grains of almost identical sizes are obtained for GeSn thicknesses of 30 − 50 nm, though grain sizes significantly decrease for thicknesses exceeding 50 nm owing to enhanced bulk nucleation. A detailed analysis of GeSn films (thickness: 50 nm) reveals that grain sizes are decreased by introducing a-Si underlayers (thickness: 3 − 20 nm), e.g., from ∼10 μm to 2 − 3 μm. This phenomenon is attributed to the change in dominant nucleation sites from the interface to the bulk, which significantly decreases grain-boundary scattering of carriers through a decrease in the barrier heights at grain boundaries. As a result, a high carrier mobility of 200 − 300 cm2/V s is realized for GeSn thin-films (thickness: 30 − 50 nm) grown with a-Si underlayers. The mobility (200 − 300 cm2/V s) is the largest ever reported data for Ge and GeSn thin-films (thickness: 30 − 50 nm) grown at low temperatures (≤500 °C). This technique will facilitate the realization of high-speed fully depleted TFTs for next-generation electronics.

A low-temperature formation technique of Sn-doped Ge on insulator has been investigated by aluminum-induced crystallization using a-GeSn/Al stacked structures. For a-GeSn films (Sn concentration: 2%), the layer-exchange growth temperature is significantly decreased compared with a-Ge, which enables low temperature growth at 250°C. At such a low temperature, bulk nucleation of GeSn in Al layers is significantly suppressed, and (100)-oriented interface nucleation becomes dominant. On the other hand, growth rate becomes high by Sn-doping effects. As a result, formation of (100)-oriented large-grain (>10 μm) Sn-doped Ge (Sn concentration: 2%) crystals on insulating substrates becomes possible at a low temperature (250°C). This technique will be useful to realize advanced flexible electronics.

High-speed thin-film transistors (TFTs) are required to develop the next generation of electronics, such as three-dimensional large-scale integrated circuits and advanced system-in-displays. For this purpose, high-carrier-mobility semiconductor films on insulator structures should be fabricated with low-temperature processing conditions (≤500 °C). To achieve this, we investigate solid-phase crystallization of amorphous-GeSn (a-GeSn) films (Sn concentration: 2% and thickness: 50–200 nm) on insulating substrates, where thin a-Si under-layers (thickness: 0–20 nm) are introduced between a-GeSn films and insulating substrates. The GeSn films are polycrystallized by annealing (450 °C, 20 h) for all samples irrespective of a-GeSn and a-Si thickness conditions, while the Si films remain amorphous. Analysis of crystal structures of GeSn films (thickness: 50 nm) reveals that grain sizes decrease from ∼10 μm to 2–3 μm by the introduction of a-Si under-layers (thickness: 3–20 nm). This phenomenon is attributed to the change in dominant nucleation sites from the interface to the bulk, which significantly decreases grain-boundary scattering of carriers through a decrease in the barrier heights at grain boundaries. Bulk-nucleation further becomes dominant by increasing the GeSn film thickness. As a result, a high carrier mobility of ∼550 cm2/V s is realized for GeSn films (thickness: 100 nm) grown with a-Si under-layers. This mobility is the largest among ever reported data for Ge and GeSn grown on an insulator. This technique will facilitate realization of high-speed TFTs for use in the next generation of electronics.At the request of the authors, this article is being retracted effective 11 July 2018.High-speed thin-film transistors (TFTs) are required to develop the next generation of electronics, such as three-dimensional large-scale integrated circuits and advanced system-in-displays. For this purpose, high-carrier-mobility semiconductor films on insulator structures should be fabricated with low-temperature processing conditions (≤500 °C). To achieve this, we investigate solid-phase crystallization of amorphous-GeSn (a-GeSn) films (Sn concentration: 2% and thickness: 50–200 nm) on insulating substrates, where thin a-Si under-layers (thickness: 0–20 nm) are introduced between a-GeSn films and insulating substrates. The GeSn films are polycrystallized by annealing (450 °C, 20 h) for all samples irrespective of a-GeSn and a-Si thickness conditions, while the Si films remain amorphous. Analysis of crystal structures of GeSn films (thickness: 50 nm) reveals that grain sizes decrease from ∼10 μm to 2–3 μm by the introduction of a-Si under-layers (thickness: 3–20 nm). This phenomenon is attributed to the...

Orientation-controlled large-grain (≥10 µm) crystal, i.e., quasi-single crystal, Ge-rich (≥50%) SiGe on insulator grown at low temperatures (≤300 °C) are desired for realization of high-performance flexible electronics. To achieve this, the Au-induced crystallization technique using a-SiGe/Au stacked structures has been developed. This enables formation of (111)-oriented large-grain (≥10 µm) Si1− x Ge x (x ≥ 0.5) crystals on insulating substrates at low temperatures (300 °C). The surface layers of the grown SiGe crystals have uniform lateral composition profiles. By using this technique, formation of quasi-single crystal Ge on flexible plastic sheets is demonstrated. This technique will be useful to realize high-performance flexible electronics.

Low temperature (8%) on insulating substrates is essential to realize next generation flexible electronics. To achieve this, a growth method of high quality GeSn films on insulating substrates by combination of laser irradiation and subsequent thermal annealing is developed. Here, the laser fluence is chosen as weak, which is below the critical fluence for crystallization of GeSn. It is clarified that for samples irradiated with weak laser fluence, complete crystallization of GeSn films is achieved by subsequent thermal annealing at ∼170 oC without incubation time. In addition, the quality of GeSn films obtained by this method is higher compared with conventional growth techniques such as melting growth by pulsed laser annealing or solid-phase crystallization (SPC) without pre-laser irradiation. Substitutional Sn concentrations in the grown layers estimated by Raman spectroscopy measurements are 8-10%, which far exceed thermal equilibrium solid-solubility of Sn in Ge (∼2%). These phenomena are explained by generation of a limited number of nuclei by weak laser irradiation and lateral SPC by subsequent thermal annealing. This method will facilitate realization of next-generation high performance devices on flexible insulating substrates.

Recent progress in the crystal growth of group-IV-based semiconductor-on-insulators is reviewed from physical and technological viewpoints. Liquid-phase growth based on SiGe-mixing-triggered rapid-melting growth enables formation of hybrid (100) (110) (111)-orientation Ge-on-insulator (GOI) structures, which show defect-free GOI with very high carrier mobility (~1040 cm2 V−1 s−1). Additionally, SiGe mixed-crystals with laterally uniform composition were obtained by eliminating segregation phenomena during the melt-back process. Low-temperature solid-phase growth has been explored by combining this process with ion-beam irradiation, additional doping of group-IV elements, metal induced lateral crystallization with/without electric field, and metal-induced layer exchange crystallization. These efforts have enabled crystal growth on insulators below 400 °C, achieving high carrier mobility (160–320 cm2 V−1 s−1). Moreover, orientation-controlled SiGe and Ge films on insulators have been obtained below the softening temperatures of conventional plastic films (~300 °C). Detailed characterization provides an understanding of physical phenomena behind these crystal growth techniques. Applying these methods when fabricating next-generation electronics is also discussed.

To realize the advanced thin-film transistors (TFTs), high-carrier-mobility semiconductor films on insulator structures should be fabricated with low-temperature processing conditions (≤500 °C). To achieve this, we investigated the solid-phase crystallization of amorphous-GeSn films on insulating substrates under a wide range of Sn concentrations (0%–20%), film thicknesses (30–500 nm), and annealing temperatures (380–500 °C). Our results reveal that a Sn concentration close to the solid solubility of Sn in Ge (∼2%) is effective in increasing the grain-size of poly-GeSn. In addition, we discovered that the carrier mobility depends on the film thickness, where the mobilities are determined by the counterbalance between two different carrier scattering mechanisms. Here, vacancy-related defects dominate the carrier scattering near the insulating substrates (≤∼120 nm), and grain-size determined by bulk nucleation dominates the grain-boundary scattering of thick films (≥∼200 nm). Consequently, we obtained the m...

Introduction Crystalline GeSn thin-films on insulator with high substitutional Sn concentration (>10%) are deseired to realize high-speed thin film transistors. However, thermal equilibrium solid-solubility of Sn in Ge is only 1%. To solve this problem, we examined non-thermal equilibrium crystallization of amorphous-GeSn (a-GeSn) by pulsed laser-annealing (PLA). In the present study, we focus on the influence of pulse number on crystallization of a-GeSn by PLA. Experimental Procedure In the experiment, a-Ge1-xSnx (0≦x≦0.2) films (thickness: 100 nm) were prepared on quartz substrates by a molecular beam deposition technique. These samples were irradiated with a pulsed laser (wavelength: 248 nm, pulse duration: 80 ns, repetition rate: 100 Hz, fluence: ~140 mJ/cm2, pulse number: 1-200 shot). The laser-annealed regions were analyzed by Nomarski microscopy, Raman scattering spectroscopy, and transmission electron microscopy (TEM). Cooling rate after PLA was estimated by in-situ optical reflectivity measurements. Results and Discussion Figure 1(a) shows Raman spectra of Ge0.95Sn0.05 samples after PLA (laser flunence: 140 mJ/cm2) with various pulse numbers. In all spectra, sharp peaks due to Ge-Ge bonding in crystalline GeSn are observed. Thus, GeSn has been crystallized for all pulse numbers, which was confirmed by TEM observation. Substitutional Sn concentration in the grown layers is investigated from the difference of Ge-Ge Raman peak positions between GeSn samples and a crystalline Ge substrate [1]. Pulse number dependence of substitutional Sn concentration is shown in Fig. 1(b). Substitutional Sn concentration increases with decreasing pulse number, and GeSn crystals with very high substitutional Sn concentration (~13%) has been realized for the sample (initial Sn concentration: 20%) with a single shot. These results suggest that non-thermal equilibrium conditions are enhanced by lower pulse number. To explore non-thermal equilibrium growth by modulating pulse number, cooling rate after PLA is estimated by in-situ optical reflectivity measurements, as shown in Fig. 2(a). Reflectivity at 10th and 100th shots as a function of time is shown in the inset of Fig. 2(b). From the decreasing curve of reflectivity, time constants of cooling processes are estimated, which are summarized in Fig. 2(b). Interestingly, substitutional Sn concentration increases with decreasing time constant. The detailed physics will be discussed in the presentation. References [1] V. R. D’Costa, J. Tolle, R. Roucka, C.D. Poweleit, J. Kouvetakis, J. Menendez: Solid State Communications 144, 240 (2007). Figure 1

I NTRODUCTION Germanium-rich silicon-germanium (Ge-rich SiGe) (Ge fraction: 50−100%) provides higher carrier mobility and superior optical properties compared with Si. In the field of large-scale integrated circuits, Ge-rich SiGe devices are being employed to break through the scaling limit. Such an approach is also very useful in the fields of advanced thin-film electronics, such as system-in-displays. In addition, to improve the usability of the system-in-displays, Ge-rich SiGe-based high-performance thin-film devices should be integrated on flexible plastic substrates (softening temperature: ~350°C). For this purpose, a technique for low-temperature (≤300oC) growth of orientation-controlled large-grain (≥10 μm) Ge-rich SiGe on insulator should be developed. In addition, position control of the orientation-controlled large-grains is useful to obtain high-performance devices without degradation by grain boundaries. Various growth techniques were investigated to achieve SiGe on insulator. For example, solid-phase crystallization enables growth of poly-SiGe films on insulator. However, high-temperature annealing at a temperature above 500oC is necessary to induce crystallization of SiGe.For low-temperature growth of SiGe on insulator, we have been investigating metal-induced crystallization using gold as catalyst [1-4]. These efforts enable low-temperature growth of orientation-controlled large-grain Ge-rich SiGe on insulator at controlled-positions. LOW-TEMPERATURE GROWTH OF ORIENTATION-CONTROLLED LARGE-GRAIN BY INTERFACE-NUCLEATION In order to obtain poly-SiGe films on insulator at low temperatures, we have developed gold-induced crystallization (GIC), where a-SiGe/Au stacked structures are employed, as shown Fig. 1 [1]. Owing to bond-modulation by catalysis, GIC proceeds at ~250oC for SiGe with the whole Ge fractions (0−100%). However, for these samples, layer-exchange of the stacked structures results in formation of randomly-oriented poly-SiGe films on insulator.To achieve orientation-controlled large-grains by GIC, randomly-oriented bulk nucleation in Au layers should be suppressed and instead, preferentially-oriented nucleation at Au/insulator interfaces should be dominated. This domination of interface nucleation can be achieved through retarding Si and Ge supply into Au layers by introducing diffusion barrier between a-SiGe and Au layers, because interface nucleation is energetically favorable compared to bulk nucleation. Use of anisotropy of free energy of SiGe nuclei is a key for orientation control. Based on these ideas, we have examined control of nucleation site by modulating atomic diffusion in the layer-exchange process, as shown in Fig. 2(a). As a result, orientation-controlled large-grain Ge-rich SiGe crystals are realized on amorphous insulator at a low temperature (≤300oC) [2]. The growth of orientation controlled large-grains (≥50 μm) on flexible substrates becomes possible, as shown in Figs. 2(b)-2(d) [3]. The large grains provide high carrier mobility (160 cm2/Vs) [3]. POSITION CONTROL BY SPATIALLY-MODULATED NUCLEATION In order to control the positions of large grains, micro-opening in diffusion barrier is examined, as shown in Fig. 3(a) [4]. By decreasing the diameter of the micro-opening below 3 μm, a single interface-nucleus is selectively generated. This enables growth of orientation-controlled large-grains (≥10 μm) at controlled positions, as shown in Figs. 3(b) and 3(c). This technique will facilitate fabrication of high-performance Ge-rich SiGe thin-film devices for flexible electronics. References [1] J.-H. Park, et al. Thin Solid Films 520, 3293 (2012). [2] J.-H. Park et al., Appl. Phys. Lett. 103, 082102 (2013). [3] J.-H. Park et al., Appl. Phys. Lett. 104, 252110 (2014). [4] R. Aoki, et al., ECS J. Solid State Science and Technology, 5, P179 (2016). Figure 1

Crystalline GeSn-on-insulator structures with high Sn concentration (>8%), which exceeds thermal equilibrium solid-solubility (∼2%) of Sn in Ge, are essential to achieve high-speed thin film transistors and high-efficiency optical devices. We investigate non-thermal equilibrium growth of Ge1−xSnx (0 ≤ x ≤ 0.2) on quartz substrates by using pulsed laser annealing (PLA). The window of laser fluence enabling complete crystallization without film ablation is drastically expanded (∼5 times) by Sn doping above 5% into Ge. Substitutional Sn concentration in grown layers is found to be increased with decreasing irradiation pulse number. This phenomenon can be explained on the basis of significant thermal non-equilibrium growth achieved by higher cooling rate after PLA with a lower pulse number. As a result, GeSn crystals with substitutional Sn concentration of ∼12% are realized at pulse irradiation of single shot for the samples with the initial Sn concentration of 15%. Raman spectroscopy and electron microscopy ...

To realize next-generation flexible thin-film devices, solid-phase crystallization (SPC) of amorphous germanium tin (GeSn) films on insulating substrates combined with seeds formed by laser annealing (LA) has been investigated. This technique enables the crystallization of GeSn at controlled positions at low temperature (∼180 °C) due to the determination of the starting points of crystallization by LA seeding and Sn-induced SPC enhancement. The GeSn crystals grown by SPC from LA seeds showed abnormal lateral profiles of substitutional Sn concentration. These lateral profiles are caused by the annealing time after crystallization being a function of distance from the LA seeds. This observation of a post-annealing effect also indicates that GeSn with a substitutional Sn concentration of up to ∼10% possesses high thermal stability. These results will facilitate the fabrication of next-generation thin-film devices on flexible plastic substrates with low softening temperatures (∼250 °C).

Ultra-low temperature (≤300 °C) growth of Ge-rich SiGe on Si substrates is strongly desired to realize advanced electronic and optical devices, which can be merged onto Si large-scale integrated circuits (LSI). To achieve this, annealing characteristics of a-GeSn/c-Si structures are investigated under wide ranges of the initial Sn concentrations (0%–26%) and annealing conditions (300–1000 °C, 1 s–48 h). Epitaxial growth triggered by SiGe mixing is observed after annealing, where the annealing temperatures necessary for epitaxial growth significantly decrease with increasing initial Sn concentration and/or annealing time. As a result, Ge-rich (∼80%) SiGe layers with Sn concentrations of ∼2% are realized by ultra-low temperature annealing (300 °C, 48 h) for a sample with the initial Sn concentration of 26%. The annealing temperature (300 °C) is in the solid-liquid coexisting temperature region of the phase diagram for Ge-Sn system. From detailed analysis of crystallization characteristics and composition profiles in grown layers, it is suggested that SiGe mixing is generated by a liquid-phase reaction even at ultra-low temperatures far below the melting temperature of a-GeSn. This ultra-low-temperature growth technique of Ge-rich SiGe on Si substrates is expected to be useful to realize next-generation LSI, where various multi-functional devices are integrated on Si substrates.

Solid-phase crystallization (SPC) of amorphous-GeSn (a-GeSn) films on insulating substrates has been developed combining with laser-annealed seeding, to realize next generation thin-film devices. By this technique, we have realized crystallization of GeSn (>10%) at low temperatures (~180oC), which is applicable for flexible thin-film devices on low cost plastic substrates with low softening temperatures (~200oC). In addition, the starting point of crystallization can be controlled by seeding, which is big advantage in device designing. Introduction In order to realize next generation flexible devices, novel functional materials have to be crystallized at controlled positions on insulating substrates below the softening temperature of low cost plastic substrates (~200oC). GeSn is attracting material for this purpose, since GeSn has higher carrier mobility than Si or Ge, and moreover, GeSn shows direct band structure by introducing substitutional Sn concentration more than 8%. Under such background, we have investigated solid-phase crystallization (SPC) of GeSn [1] and realized growth of GeSn at 180oC. However, to initiate the SPC at controlled positions, the samples have to be annealed above the melting point of Sn (~232oC) to form seeding regions, which is not applicable on flexible plastic substrates. In line with this, we propose an idea to use laser-annealing (LA) to form crystal seeds. By forming seeds by LA, lateral SPC is expected at process temperature below 200°C. Moreover, by decreasing the process temperature, we can expect that GeSn crystals with high substitutional Sn concentration should be obtained. Experimental Procedure In the experiment, amorphous Ge0.8Sn0.2 layers (100 nm thickness) were deposited on quartz substrates by a molecular beam technique. The samples were irradiated with a KrF excimer laser (wavelength: 248 nm, energy: 160 mJ/cm2) with 100 pulses in 1 sec to form seed regions, followed by thermal annealing (180 - 220 oC) for lateral SPC as shown in Fig. 1. Results and Discussion Nomarski images of samples as LA and after annealing at 180oC for 48h are shown in Figs. 2(a) and 2(b), respectively. The laser annealed seed region is formed as shown in Fig. 2(a). From the seed, a bright region spreads after 180oC annealing. The Raman spectra obtained at points A, B, and C in Figs. 2(a) and 2(b) are shown in Fig. 2(c). From these spectra, we can clearly say that lateral SPC is initiated from only the seed and no spontaneous nucleation occurs. From the length of lateral SPC region, growth rates of GeSn at various annealing temperatures (180, 200, 220 oC) are evaluated. It is found that the growth rate is about 1 μm/h at 180 oC, which is nearly 106 time as large as that of Ge [2]. The activation energy of the growth rate of Ge0.8Sn0.2 was estimated to be ~1.5 eV, which was smaller than that of Ge (~2.0 eV). This is attributed to the weakening atomic bonds by Sn atoms. This is a very useful technique to realize next generation flexible thin-film devices. Substitutional Sn concentration in grown layer obtained after annealing at 180oC for 48h is evaluated by Raman measurement, which is shown in Fig. 3. Substitutional Sn concentration in SPC region shows higher value (>10%) than that of LA region (~7.5%), which is attributed to difference of non-equilibrium conditions between SPC and LA. Interestingly, substitutional Sn concentration shows very high values exceeding 15% near the growth edge. The Sn concentration decreases with increasing distance from the edge. Decrease in the Sn concentration from >15% to ~10% is attributed to the post annealing effect of grown regions. Detailed physics will be discussed at the presentation. References [1] H. Chikita, et al., Appl. Phys. Lett. 105 (2014) 202112. [2] K. Toko, et al., Appl. Phys. Lett. 94 (2009) 192106. Figure 1

We demonstrate large-area (∼600 μm), (111)-oriented, and high-crystallinity, i.e., pseudo-single-crystalline, germanium (Ge) films at 275 °C, where the temperature is lower than the softening temperature of a flexible substrate. A modulated gold-induced layer exchange crystallization method with an atomic-layer deposited Al2O3 barrier and amorphous-Ge/Au multilayers is established. From the Raman measurements, we can judge that the crystallinity of the obtained Ge films is higher than those grown by aluminum-induced-crystallization methods. Even on a flexible substrate, the pseudo-single-crystalline Ge films for the circuit with thin-film transistor arrays can be achieved, leading to high-performance flexible electronics based on an inorganic-semiconductor channel.

We experimentally demonstrated anisotropic damping of the magnetization dynamics in a highly ordered Heusler compound Co3−xFexSi (x = 1.0, 2.0, and 3.0). The field-swept ferromagnetic resonance linewidth as a function of the resonant frequency was measured to exclude extrinsic contributions from two-magnon scattering and inhomogeneous line-broadening. In L21-ordered Co2FeSi film, a wide variation in the intrinsic Gilbert damping constant from 0.0023 to 0.0061 was clearly observed in the (111) plane, where a weak uniaxial magnetic anisotropy was formed via low-temperature epitaxial growth. The large anisotropy of the Gilbert damping constant was suppressed by increasing x, which suppresses the half-metallicity in Co3−xFexSi films.

To produce high-performance devices on flexible plastic substrates, it is essential to form Ge-based group IV semiconductors on insulating substrates at low temperatures (≤250 °C). We have developed a technique for solid phase crystallization of amorphous GeSn (≤220 °C) enhanced by Sn doping, and combined with a seeding technique induced by Sn melting (∼250 °C). This combination produces lateral crystallization of amorphous GeSn from seed arrays with no incubation time. As a result, extremely high growth velocities at 220 °C, depending on Sn concentration, e.g., 0.13 μm/h (14% Sn) and 1100 μm/h (23% Sn), are achieved. These velocities are 104–108 times higher than that of pure Ge. This technique enables growth of crystalline GeSn island arrays (diameters: 50–150 μm) at low temperatures (≤250 °C) at controlled positions on insulating substrates.

Orientation-controlled crystalline Si films on insulating substrates are strongly required to achieve high-performance thin-film devices for next-generation electronics. We have comprehensively investigated the layer-exchange kinetics of Al-induced crystallization (AIC) in stacked structures, i.e., amorphous-Si/Al-oxide/Al/SiO2-substrates, as a function of the air-exposure time of Al surfaces (tair: 0–24 h) to form Al-oxide interface-layers, the thickness of Al and Si layers (dAl, dSi: 50–200 nm), the annealing temperature (450–500 °C), and the annealing time (0–50 h). It has been clarified that longer tair (>60 min) and/or thinner dAl and dSi ( 100 nm) lead to the (100) oriented growth. No correlation between the annealing temperature and the crystal orientation is observed. Detailed analysis reveals that the layer-exchange kinetics are dominated by “supply-limited” processing, i.e., diffusion of Si...