9 results on '"Pei, Zhenlin"'
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2. A Technology/Circuit Co-design Framework for Emerging Reconfigurable Devices
3. Technology/Memory Co-Design and Co-Optimization Using E-Tree Interconnect
4. Emerging Interconnect Exploration for SRAM Application Using Nonconventional H-Tree and Center-Pin Access
5. Graphene-Based Interconnect Exploration for Large SRAM Caches for Ultrascaled Technology Nodes
6. Beyond-Cu Intermediate-Length Interconnect Exploration for SRAM Application
7. Interconnect Technology/System Co-Optimization for Low-Power VLSI Applications Using Ballistic Materials
8. Deep Pipeline Circuit for Low-Power Spintronic Devices
9. Application of a Metallic Cap Layer to Control Cu TSV Extrusion
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