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Driven by the target of decarbonization through eliminating carbon emissions and developing a renewable and sustainable energy schemes, the modern power industry has been experiencing a remarkable transition. To support this, Power Hardware-in-the-Loop (PHIL) simulation, an advanced and efficient method incorporating physical power apparatus and emulated power network into a real-time testing configuration, has been leveraged for the prototyping of power components, the verification of novel control paradigms, and dynamic modelling of renewable energy systems under broad-spectrum testing scenarios. The power amplifier, sensors, and signal conversion units based power interface bridges the hardware and real-time simulation platform into PHIL closed-loop setup. However, the dynamics and non-ideal characteristics stemming from the power interface (e.g., time delay, limited bandwidth, noise perturbation, and signal distortion) pose significant challenges to the PHIL closed-loop simulation regarding its stability and accuracy. From the perspective of system performance, these challenges associated with unstable system operation, protective apparatus tripping, and accuracy deterioration issues have been intriguing many academic researchers and industrial engineers and remained to be resolved. In this thesis, research efforts have been devoted to developing novel compensation schemes to improve the stability and accuracy of PHIL simulation and thus enabling a more robust simulation environment that is extendable and re-configurable for future real-time testing of complex power systems and power apparatus. This thesis works towards the development of novel PHIL system compensation methods, designed specifically to mitigate the detrimental impact of the power interface on the stability and accuracy of PHIL closed-loop systems. Firstly, a compensation scheme comprising a Smith predictor compensator is proposed to mitigate the stability deteriorating impact stemming from the time delay. Furthermore, an online system impedance identification technique is leveraged to enhance the robustness of the proposed compensator and facilitate this compensation scheme with adaptivity to PHIL system impedance variation. Secondly, the sliding discrete Fourier transform based interfacing signal manipulation in conjunction with the phase shift addition method is proposed to compensate for the time delay on a harmonic-by-harmonic basis. Based on the proposed time delay compensation method, an optimal compensation filter is designed to compensate for the non-ideal power interface by maximising its bandwidth, maintaining its unity-gain characteristic, and compensating for its phase-shift over the frequencies of interest. This compensation scheme is crucial for improving the power signal synchronisation accuracy and the power transfer transparency. Thirdly, a novel scheme for sensitivity analysis of PHIL setups is proposed to facilitate quantitatively analysing and assessing the impact of external disturbances stemming from the sensor noise, switching harmonics, or quantization noise on the power interface. In addition, the inherent relationship between sensitivity transfer functions and stability criteria is elaborated along with theoretical and experimental validation. Based on this concept, accuracy assessment methods are employed in this scheme to quantify generic sensitivity criteria. Finally, a comprehensive assessment of the PHIL interfaces regarding their suitability, stability, and applicability for incorporating a grid-forming converter with black-start capability into PHIL closed-loop simulations is presented, and the current-type interfacing method with compensation and scaling scheme is proposed to interface a grid-forming converter with soft black-start capability into a PHIL setup.