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Thermal management is one of the main challenges for the future of electronics.sup.1-5. With the ever-increasing rate of data generation and communication, as well as the constant push to reduce the size and costs of industrial converter systems, the power density of electronics has risen.sup.6. Consequently, cooling, with its enormous energy and water consumption, has an increasingly large environmental impact.sup.7,8, and new technologies are needed to extract the heat in a more sustainable way--that is, requiring less water and energy.sup.9. Embedding liquid cooling directly inside the chip is a promising approach for more efficient thermal management.sup.5,10,11. However, even in state-of-the-art approaches, the electronics and cooling are treated separately, leaving the full energy-saving potential of embedded cooling untapped. Here we show that by co-designing microfluidics and electronics within the same semiconductor substrate we can produce a monolithically integrated manifold microchannel cooling structure with efficiency beyond what is currently available. Our results show that heat fluxes exceeding 1.7 kilowatts per square centimetre can be extracted using only 0.57 watts per square centimetre of pumping power. We observed an unprecedented coefficient of performance (exceeding 10,000) for single-phase water-cooling of heat fluxes exceeding 1 kilowatt per square centimetre, corresponding to a 50-fold increase compared to straight microchannels, as well as a very high average Nusselt number of 16. The proposed cooling technology should enable further miniaturization of electronics, potentially extending Moore's law and greatly reducing the energy consumption in cooling of electronics. Furthermore, by removing the need for large external heat sinks, this approach should enable the realization of very compact power converters integrated on a single chip. Cooling efficiency is greatly increased by directly embedding liquid cooling into electronic chips, using microfluidics-based heat sinks that are designed in conjunction with the electronics within the same semiconductor substrate., Author(s): Remco van Erp [sup.1] , Reza Soleimanzadeh [sup.1] , Luca Nela [sup.1] , Georgios Kampitsis [sup.1] , Elison Matioli [sup.1] Author Affiliations: (1) Power and Wide-band-gap Electronics Research Laboratory [...]

We demonstrate quasi-vertical reverse blocking (RB) MOSFETs on 6.7 μm thick GaN grown on a 6 inch Si substrate by metalorganic chemical vapor deposition. The RB capability was achieved by replacing the ohmic drain with a quasi-vertical Schottky drain, resulting in a RB voltage of ∼300 V while preserving the ON-resistance (Ron,sp). Schottky contacts on etched i-GaN surface were realized through an optimized fabrication process based on tetramethylammonium hydroxide treatments. The fabricated RB-MOSFET had a low Ron,sp of 4.75 mΩ cm2, current density of ∼0.9 kA cm−2 and a forward blocking voltage of 570 V. [ABSTRACT FROM AUTHOR]

We report the first demonstration of fully vertical power MOSFETs on 6.6- $\mu \text{m}$ -thick GaN, grown on a 6-inch Si substrate by metal-organic chemical vapor deposition. A robust fabrication method was developed based on a selective and local removal of the Si substrate as well as the resistive GaN buffer layers, followed by a conformal deposition of a 35- $\mu \text{m}$ -thick copper layer on the backside by electroplating, which provides excellent mechanical stability and electrical contact to the drain terminal. The fabrication process of the gate trench was optimized, improving considerably the effective mobility at the p-GaN channel and the output current of the devices. High-performance fully vertical GaN-on-Si MOSFETs are presented, with a low specific ON-resistance (${R}_{\textsf {on,sp}}$) of 5 $\text{m}\Omega $ cm2 and a high OFF-state breakdown voltage of 520 V. Our results reveal a major step toward the realization of high-performance GaN vertical power devices on cost-effective Si substrates. [ABSTRACT FROM AUTHOR]