25 results on '"Yoo, Mookyoung"'
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2. An IoT-based smart optical platform for colorimetric analyzing multiple samples of biomarkers
- Author
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Yoo, Mookyoung, Bhuiyan, Nabil H., Uddin, M. Jalal, and Shim, Joon S.
- Published
- 2023
- Full Text
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3. A low-noise and mismatch-tolerant current-mirror-based potentiostat circuit for glucose monitoring
- Author
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Nam, Kyeongsik, Choi, Gyuri, Yoo, Mookyoung, Kang, Sanggyun, Jin, Byeongkwan, Son, Hyeoktae, Kim, Kyounghwan, and Ko, Hyoungho
- Published
- 2023
- Full Text
- View/download PDF
4. Low-Noise Operational Amplifier Using Dual-Path Dual-Chopper Fill-in Technique
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Yoo, Mookyoung, Kang, Sanggyun, Jin, Byeongkwan, Son, Hyeoktae, Kim, Kyounghwan, Wi, Jihyang, Nam, Gibae, Bae, Nam Ho, and Ko, Hyoungho
- Abstract
A low-noise operational amplifier is the key building block of the high-precision sensor interface circuit. Conventional continuous-time operational amplifiers suffer from low-frequency noise components, and multipath amplifiers are a good solution to achieve both low-noise and wide bandwidth. This article presents a low-noise multipath chopper-stabilized operational amplifier with a dual-path dual-chopper fill-in technique. The low-frequency path (LFP) of the multipath amplifier is implemented using two dual-path chopper amplifiers. The noise correlation between the dual path chopper amplifiers can reduce the input-referred noise level. The dual chopper amplifiers are driven by two quadrature chopper clocks. The glitch-free durations of the chopper amplifier outputs are combined using the fill-in technique to reduce the unwanted switching artifacts including glitches and intermodulation distortions (IMDs). The circuit was fabricated using a 180 nm complementary metal-oxide-semiconductor (CMOS) process and draws
$46.5 ~\mu \text{A}$ $\surd $ $10.5 ~\mu \text{V}$ - Published
- 2024
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5. Low-Noise and Process Variation-Tolerant Readout Circuit for Electrochemical Sensors
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Kang, Sanggyun, Jin, Byeongkwan, Yoo, Mookyoung, Son, Hyeoktae, Kim, Kyounghwan, Wi, Jihyang, Nam, Gibae, Ho Bae, Nam, Min Park, Yoo, Ho Jang, Jun, and Ko, Hyoungho
- Abstract
This study describes the design and development of a low-noise and process variation-tolerant potentiostat readout integrated circuit optimized for electrochemical sensors in biomedical applications. Accurate and fast detection by electrical signals, particularly for pathogenic viruses, is critical in the biomedical field. Therefore, design criteria for biosignal sensing architectures emphasize high precision and low noise to ensure high reliability. The proposed potentiostat readout circuit integrates key components, such as a control amplifier (CA), transimpedance amplifier (TIA), 12-bit R-2R digital-to-analog converter (DAC), 12-bit SAR analog-to-digital converter (ADC), relaxation oscillator, clock divider, current/voltage reference, and serial peripheral interface. The chopping technique is adopted to mitigate the 1/f noise. The low-frequency noise is substantially reduced by implementing chopper stabilization in the CA and TIA. High-precision DACs are required because various waveforms, including dc, triangular, and ramp functions, are utilized for electrochemical measurement. In this design, dynamic element matching is applied to DACs with high precision. This approach can reduce the intrinsic mismatch in the R-2R DAC, thereby improving the offset error and spurious-free dynamic range from −1.4 least significant bit (LSB) and 74 dB to −0.5 LSB and 79 dB, respectively. The readout circuit was fabricated using a standard 180-nm CMOS process and can measure sensor currents in the range of
$\pm 20~\mu $ $339.6~\mu $ - Published
- 2024
- Full Text
- View/download PDF
6. Low-Noise, Low-Power Readout IC for Two-Electrode ECG Recording Using Common-Mode Charge Pump for Robust 20-V PP Common-Mode Interference.
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Nam, Kyeongsik, Choi, Gyuri, Yoo, Mookyoung, Kang, Sanggyun, Jin, Byeongkwan, Son, Hyeoktae, Kim, Kyounghwan, and Ko, Hyoungho
- Subjects
RELAXATION oscillators ,ELECTROCARDIOGRAPHY ,PINK noise ,CAPACITOR switching ,COMPLEMENTARY metal oxide semiconductors ,ON-chip charge pumps ,SILICON detectors - Abstract
A low-noise and -power readout integrated circuit (IC) for two-electrode electrocardiogram (ECG) recording is developed in this study using a common-mode charge pump (CMCP) for a robust 20-V
PP common-mode interference (CMI). Two-electrode ECG recording offers more comfort than three-electrode ECG recording. Contrasting to the three-electrode ECG recording, the two-electrode ECG recording is affected by CMI during measurements; the intervention of a large CMI will distort the ECG signal measurement. To achieve robustness for the CMI, the proposed ECG readout IC adopts CMCP—it uses switched capacitors that store and subtract CMI by control logic. In this paper, a window comparator structure is applied to CMCP to obtain a signal with less distortion. The window voltage ranges were set between the input common-mode ranges in which IA can operate. Therefore, a signal with less distortion was obtained by stopping the operation of CMCP between the window voltage ranges. It also reduced additional current consumption. To achieve this, the proposed circuit is implemented using a chopper stabilization technique. The chopper implemented in the amplifier can reduce low-frequency noise components, such as 1/f noise, and it comprises a CMCP, current feedback instrumentation amplifier, QRS peak detector, relaxation oscillator, voltage reference, timing generator, and serial peripheral interface on a single chip. The proposed circuit was designed using a standard 0.18 μm CMOS process with an active area of 0.54 mm2 . The proposed CMCP achieves a CMI robustness of 20 VPP at 60 Hz. The measured input-referred noise level was 119 nV/√Hz at 1 Hz, and the power consumption was 23.83 μW with a 1.8 V power supply. [ABSTRACT FROM AUTHOR]- Published
- 2022
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7. A Single-Bit Incremental Second-Order Delta-Sigma Modulator with Coarse-Fine Input Buffer.
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Yoo, Mookyoung, Nam, Kyeongsik, Choi, Gyuri, Kang, Sanggyun, Jin, Byeongkwan, Son, Hyeoktae, Kim, Kyounghwan, and Ko, Hyoungho
- Subjects
ANALOG-to-digital converters ,DIGITAL-to-analog converters ,COMPLEMENTARY metal oxide semiconductors ,SIGNAL-to-noise ratio ,LOW noise amplifiers - Abstract
Featured Application: Low noise circuit, delta-sigma modulator, analog to digital converter. This paper presents an incremental second-order delta-sigma modulator with a coarse-fine input buffer in 180-nm CMOS. The modulator's architecture was implemented as a second-order cascade of integrators with a feedback structure. The switched-capacitor integrator was operated in discrete time, with high-gain amplifiers required to achieve improved performance during the integration phase. The amplifier comprised rail-to-rail input and gain-boosted cascode intermediate stages, thus achieving a high gain and wide input voltage range. The circuit adopts a coarse-fine buffer for higher performance. The coarse buffer is operated first to enable fast settling through a high slew rate, followed by the fine buffer to satisfy the low-noise and high-accuracy characteristics. The fine buffer has a smaller current consumption with higher power efficiency. The experiment results show that the proposed input buffer achieved a 13.14 effective number of bits and an 80.87 dB signal-to-noise and distortion ratio. The modulator operates a single bit and sampling clock at 125 kHz. The proposed delta-sigma modulator was operated at 1.8 V. The proposed circuit was designed using a standard 0.18-μm CMOS process with an active area of 1.06 mm
2 . The total current consumption with the coarse-fine buffer was 1.374 mA. [ABSTRACT FROM AUTHOR]- Published
- 2022
- Full Text
- View/download PDF
8. Low-Noise Potentiostat Readout Circuit with a Chopper Fully Differential Difference Amplifier for Glucose Monitoring.
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Choi, Gyuri, Nam, Kyeongsik, Yoo, Mookyoung, Kang, Sanggyun, Jin, Byeongkwan, Kim, Kyounghwan, Son, Hyeoktae, and Ko, Hyoungho
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DIFFERENTIAL amplifiers ,POTENTIOSTAT ,PINK noise ,COMPLEMENTARY metal oxide semiconductors ,STANDARD hydrogen electrode ,ELECTROCHEMICAL sensors - Abstract
This paper presents a low-noise potentiostat readout circuit with a chopper fully differential difference amplifier (FDDA) for glucose monitoring. Glucose monitoring is necessary for the early diagnosis of diabetes complications and for health management. Ammeter electrochemical sensors are widely used for glucose detection, and in general, a three-electrode structure of a reference electrode (RE), a counter electrode (CE), and a working electrode (WE) is implemented with a potentiostat structure. A low-noise characteristic of the readout circuit is essential for highly accurate glucose monitoring. The chopping technique can reduce low-frequency noises such as 1/f noise and can achieve the required low-noise characteristic. The proposed potentiostat readout circuit is based on a low-noise chopper FDDA with a class-AB output stage. The implementation of the chopper FDDA scheme of the potentiostat readout circuit can decrease the number of amplifiers in the control part of the potentiostat, with reduced power consumption and a wide dynamic output range. The negative feedback loop of the inverting amplifier scheme with the FDDA maintains the voltage between the WE and RE constants. The negative feedback loop tracks the reference voltage of the RE with an input voltage of the WE. The proposed potentiostat readout circuit is designed in the standard 0.18 µm CMOS process, and the simulated current consumption is 48.54 μA with a 1.8 V power supply. The simulated input-referred noise level was 8.53 pArms. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
9. Current-Feedback Instrumentation Amplifier Using Dual-Chopper Fill-In Technique.
- Author
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Choi, Gyuri, Nam, Kyeongsik, Yoo, Mookyoung, Kang, Sanggyun, Jin, Byeongkwan, Kim, Kyounghwan, Son, Hyeoktae, and Ko, Hyoungho
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PINK noise ,DIFFERENTIAL amplifiers ,INTERMODULATION distortion ,COMPLEMENTARY metal oxide semiconductors ,POWER resources - Abstract
In this study, we describe a dual-chopper glitch-reduction current-feedback instrumentation amplifier (CFIA) with a ripple reduction loop. The amplifier employs the chopping technique to reduce low-frequency noise, such as 1/f noise. A glitch caused by chopping occurs at each chopper clock edge and results in intermodulation distortion (IMD). Owing to the input offset, the chopping technique also produces ripples. In this study, the glitch-induced IMD was reduced using a fill-in technique whereby only neat signals were alternately used as outputs by avoiding the glitch section with dual-chopping channel CFIA. To avoid using a high-order, low-frequency filter, a ripple reduction loop was implemented to reduce the ripple generated by chopping. The CFIA is based on a low-noise chopper fully differential difference amplifier with a cascode stage and a Monticelli-class AB output stage, which can drive a larger load and increase power efficiency. The proposed dual-chopper CFIA was fabricated using a 0.18 µm CMOS standard process, and its current consumption with a 1.8-V power supply is 29.5 μA. The proposed CFIA has a gain of 51 V/V, input referred noise of 53.3 nV/√Hz at 1 Hz, and a noise efficiency factor of 4.48. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
10. Low-noise delta-sigma analog front end with capacitor swapping technique for capacitive microsensors.
- Author
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Nam, Kyeongsik, Kim, Hyungseup, Choi, Gyuri, Yoo, Mookyoung, and Ko, Hyoungho
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ANALOG circuits ,CAPACITORS ,COMPLEMENTARY metal oxide semiconductors ,INTEGRATED circuits ,ANALOG-to-digital converters ,MICROSENSORS - Abstract
In this paper, low-noise incremental delta–sigma analog front end (AFE) integrated circuit (IC) for capacitive microsensors is presented. A conventional capacitance-to-digital converter (CDC) mainly uses a multi-stage capacitive sensing amplified stage (CSA) and analog-to-digital converters. The multi-stage CSA is not suitable for application in various Internet of things (IoT) devices that require low power because the power consumption of the analog front-end circuit increases in proportion to the number of amplifiers and the chip area increases. So, the presented delta-sigma AFE can convert the capacitance changes to the digital codes directly. This structure can achieve a small active area and low power consumption. The delta–sigma AFE achieves low-noise and high linearity using a capacitor polarity swapping technique. The measured effective resolution is 16.2 bits, and the non-linearity is 0.05% full-scale output (FSO). The integrated circuit is implemented in a 0.18-µm standard CMOS process. All functional blocks, including the analog circuits (bandgap reference, voltage reference, and delta–sigma capacitance-to-digital converter) and digital block (accumulator and timing generator), are integrated on a chip. The proposed incremental delta–sigma AFE consumes 1.12 mW of power from a 3.3-V supply at a sampling frequency of 500 kHz and occupies a total active area of 0.42 mm
2 . [ABSTRACT FROM AUTHOR]- Published
- 2022
- Full Text
- View/download PDF
11. A Potentiostat Readout Circuit with a Low-Noise and Mismatch-Tolerant Current Mirror Using Chopper Stabilization and Dynamic Element Matching for Electrochemical Sensors.
- Author
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Nam, Kyeongsik, Choi, Gyuri, Kim, Hyungseup, Yoo, Mookyoung, and Ko, Hyoungho
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ELECTROCHEMICAL sensors ,AVIAN influenza A virus ,POTENTIOSTAT ,PINK noise ,COMPLEMENTARY metal oxide semiconductors ,INFLUENZA A virus, H5N1 subtype - Abstract
This paper presents a potentiostat readout circuit with low-noise and mismatch-tolerant current mirror using chopper stabilization and dynamic element matching (DEM) for electrochemical sensors. Current-mode electrochemical sensors are widely used to detect the blood glucose and viruses in the diagnosis of various diseases such as diabetes, hyperlipidemia, and the H5N1 avian influenza virus (AIV). Low-noise and mismatch-tolerant characteristics are essential for sensing applications that require high reliability and high sensitivity. To achieve these characteristics, a proposed potentiostat readout circuit is implemented using the chopper stabilization scheme and the DEM technique. The proposed potentiostat readout circuit consists of a chopper-stabilized programmable gain transimpedance amplifier (TIA), gain-boosted cascode current mirror, and a control amplifier (CA). The chopper scheme, which is implemented in the TIA and CA, can reduce low frequency noise components, such as 1/f noise, and can obtain low-noise levels. The mismatch offsets of the cascode current mirror can be reduced by the DEM operation. The proposed current-mirror-based potentiostat readout circuit is designed using a standard 0.18 μm CMOS process and can measure the sensor current from 350 nA to 2.8 μA. The input-referred noise integrated from 0.1 Hz to 1 kHz is 21.7 pA
RMS , and the power consumption was 287.9 μW with a 1.8 V power supply. [ABSTRACT FROM AUTHOR]- Published
- 2021
- Full Text
- View/download PDF
12. A Low-Power, Low-Noise, Resistive-Bridge Microsensor Readout Circuit with Chopper-Stabilized Recycling Folded Cascode Instrumentation Amplifier.
- Author
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Choi, Gyuri, Heo, Hyunwoo, You, Donggeun, Kim, Hyungseup, Nam, Kyeongsik, Yoo, Mookyoung, Lee, Sangmin, and Ko, Hyoungho
- Subjects
COMPLEMENTARY metal oxide semiconductors ,ANALOG-to-digital converters ,POWER resources ,DETECTOR circuits ,ON-chip charge pumps - Abstract
In this paper, a low-power and low-noise readout circuit for resistive-bridge microsensors is presented. The chopper-stabilized, recycling folded cascode current-feedback instrumentation amplifier (IA) is proposed to achieve the low-power, low-noise, and high-input impedance. The chopper-stabilized, recycling folded cascode topology (with a Monticelli-style, class-AB output stage) can enhance the overall noise characteristic, gain, and slew rate. The readout circuit consists of a chopper-stabilized, recycling folded cascode IA, low-pass filter (LPF), ADC driving buffer, and 12-bit successive-approximation-register (SAR) analog-to-digital converter (ADC). The prototype readout circuit is implemented in a standard 0.18 µm CMOS process, with an active area of 12.5 mm
2 . The measured input-referred noise at 1 Hz is 86.6 nV/√Hz and the noise efficiency factor (NEF) is 4.94, respectively. The total current consumption is 2.23 μA, with a 1.8 V power supply. [ABSTRACT FROM AUTHOR]- Published
- 2021
- Full Text
- View/download PDF
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