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Your search keyword '"Zhao, Rende"' showing total 45 results
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45 results on '"Zhao, Rende"'

1. Review and Analysis of Non-isolated High Step-Up DC/DC Converter Topologies

Author

Zheng, Feiling, Zhang, Longlong, Li, Rui, Zhao, Jingcheng, Qin, Xiao, Yan, Qingzeng, Zhao, Rende, Wang, Yansong, Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Li, Yong, Series Editor, Liang, Qilian, Series Editor, Martín, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Oneto, Luca, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zamboni, Walter, Series Editor, Zhang, Junjie James, Series Editor, Tan, Kay Chen, Series Editor, Yang, Qingxin, editor, Dong, Xuzhu, editor, and Ma, Weiming, editor

Published
2023
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6. Design of three-level APF experiment monitor platform based on ethernet interface software.

Author

YAN Qingzeng, HE Jinkui, ZHAO Rende, SONG Xiaoying, and ZHANG Zixu

Subjects
ETHERNET, PHASE-locked loops, ELECTRIC power filters, COMPUTER software, DEBUGGING, SOFTWARE architecture
Abstract

Given numerous nonlinear loads in modern power systems, quantities of current harmonics will seriously pollute the power environment. The three-level active power filter (APF) is an effective method to compensate for harmonics. This paper designs the current loop of three-level APF and investigates the phase-locked loop based on the second-order generalized integrator (SOGI) to improve the harmonic compensation performance. In order to observe the load currents, grid voltages, and currents of the APF system, a three-level APF experiment monitor platform based on ethernet interface software is designed. The ethernet communication board is designed based on the W5300 chip, and the ethernet interface software of the APF system is compiled by Visual Studio. The experimental results show that current harmonics can be effectively compensated by the three-level APF, and the designed ethernet interface software can observe voltage, current, and internal-variable waveforms, which is convenient for experimental debugging and monitoring. [ABSTRACT FROM AUTHOR]

Published
2023
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11. A Paralleled Current and Voltage Control Strategy With Compound PI Controllers for Three-Phase Active Power Filters

Author

Yan, Qingzeng, Zhang, Longlong, Zhao, Rende, He, Jinkui, Guo, Longzhen, and Zhang, Zixu

Abstract

The conventional control strategy for active power filters (APFs) is essentially a nested structure, where the output of the outer voltage loop will affect the command current of the inner loop, inevitably impairing the performance in harmonic compensation. In this article, to enhance the harmonic-compensation performance, the output of the dc-link voltage loop has been modified and added as a disturbance to the current loop, which forms a paralleled structure. Thus, the pure command current can be achieved and not affected by the output of the voltage loop. Parameters of the proposed paralleled strategy are designed considering both stability and dynamic responses, and larger phase and gain margins are achieved. In addition, a compound PI controller has been designed to avoid the integral overflow problem. Finally, experimental results verify that, though with a relatively slow the dc-link voltage response, the proposed paralleled strategy can achieve a faster and more precious current control, and a better performance in harmonic compensation compared with the conventional nested strategy.

Published
2024
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12. Hybrid SVPWM Strategy of Cascade H-Bridge Multilevel Converter for Battery Energy Storage System

Author

Fan, Xu, Zhao, Rende, He, Jinkui, Fan, Haoyu, Xie, Yifan, and Zhang, Tianyu

Abstract

A cascade H-bridge (CHB) stands out for its modular structure and high output voltage among various power converter schemes for battery energy storage systems. While space vector pulsewidth modulation (SVPWM) offers better utilization of the dc-link voltage, it is seldom employed in CHB designs due to the substantial computational burden associated with an increasing number of voltage levels in the converter. This article introduces a novel hybrid SVPWM approach in a multilevel CHB for battery energy storage systems. In this proposed system, the reference vector is decomposed into a low-frequency vector and a high-frequency vector. The low-frequency vector is generated by the low-frequency modules operating at the line frequency, while the high-frequency vector is produced by the high-frequency module working in the pulsewidth modulation mode. It compensates for the disparity between the low-frequency vector and the reference vector. To determine the low-frequency vector, an algorithm based on coordinate transformation is introduced. This significantly reduces the computational complexity, making it independent of the output voltage levels. The switching losses decrease as most power devices operate at the fundamental frequency. An experimental platform of the CHB is constructed to validate the advantages of the proposed modulation algorithm.

Published
2024
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15. Research on low-voltage single-phase AC electronic loads with variable power factors based on SOGI-FLL.

Author

YAN Qingzeng, ZHAO Rende, HE Jinkui, MA Zhishun, and GUO Longzhen

Subjects
OSCILLATIONS, VOLTAGE, INTEGRATORS, TOPOLOGY, ANGLES
Abstract

In order to overcome the drawbacks of the conventional passive loads with constant parameters, single-phase AC electronic loads with the back-to-back topology have emerged. However, in low-voltage and low-power situations, the grid voltage will be affected by harmonic currents and easily distorted. Therefore, a variable power-factor control strategy based on the second-order generalized integrator frequency locked loop (SOGI-FLL) is proposed. SOGI-FLL is adopted to improve the phase locking accuracy under the distorted grid voltage, and the fundamental and quadrature components are obtained, based on which a control scheme is designed to continuously adjust power factors; the power factor angles of rectifier side and inverter side are controlled cooperatively to reduce dc-link oscillations. Experimental results show that, the designed single-phase low-voltage AC electronic load can simulate capacitive, resistive and inductive loads, respectively, and the power factor is continuously adjustable in the range of 0.5~1.0. [ABSTRACT FROM AUTHOR]

Published
2023
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20. Research on the Coordination Suppression Strategy of Neutral Point Potential and Common Mode Voltage for NPC Three-Level Inverter.

Author

Dong, Lei, Zang, Zetian, Ming, Yuanshan, Zhao, Rende, Ma, Wenzhong, and Hu, Huihui

Subjects
VECTOR spaces, VOLTAGE, PULSE width modulation transformers, CORRECTION factors, LOW voltage systems, ELECTRIC potential
Abstract

A Neutral Point Clamped (NPC) type three-level inverter has the advantages of a low switch voltage and a high-quality output waveform. However, there are inherent problems, such as neutral point potential asymmetry and common mode interferences, which easily affect the symmetry of the three-phase output voltage and the safe operation of the inverter. Firstly, according to the different modulation degrees, the fluctuation of midpoint potential can be suppressed by adding an action time correction factor to the traditional space vector pulse-width (SVPWM) modulation strategy and virtual space vector pulse-width (VSVPWM) modulation strategy, respectively. Secondly, considering the suppression of common mode voltage, a new virtual space vector pulse-width (NVSVPWM) modulation strategy is proposed, which uses a set of new vector synthesis methods. Finally, the simulation and experiment prove that the NVSVPWM strategy with an action time correction factor can suppress the fluctuation of the neutral point potential and common mode voltage at the same time, and the effect is significant. [ABSTRACT FROM AUTHOR]

Published
2023
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