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Connection of an LC filter to the output of voltage source inverter (VSI) in squirrel cage induction motor (SQIM) drive converts the pulse-width modulated (PWM) voltages into smooth sinusoidal voltages. However, this connection may lead to closed-loop instability in the rotor flux-oriented (RFO) vector-controlled (VC) SQIM system. The closed-loop stability of the combined SQIM + LC filter (SQLC) system is complex and has not been analyzed properly in the literature. In this paper, a detailed closed-loop stability analysis of the SQLC system has been presented based on stability region (SR) and accordingly the PI gains of VC has been designed. The SR method is adopted to derive the common stability regions for the SQIM system and SQLC system. Thereby, the paper proves that connecting an LC filter in-between the VSI and the SQIM system does not always destabilize the closed-loop system. Further, for an SQLC system, the complete range of current controller gains is obtained at various operating points. The frequency-domain specifications have been used to select a proper stabilizing set and the effect of parametric variation of LC filter on the stabilizing set has also been discussed. The experimental results are provided to validate the analysis. [ABSTRACT FROM AUTHOR]

Light-emitting diodes (LEDs) are widely used in street lighting, landscape lighting, liquid crystal display (LCD) backlighting, healthcare, etc. As an important part of LED lighting products, LED driver plays a vital role in maintenance costs reduction, energy saving and lifetime prolongation. In this paper, a single-stage LED driver is proposed, which is integrated by a totem-pole bridgeless power factor correction (PFC) unit and several modular LCL-T resonant rectifiers. The totem-pole bridgeless PFC unit and the LCL-T resonant rectifiers are integrated by sharing switches, which can simplify the circuit and reduce the system cost. The output current can be regulated by applying the variable inductor control. Constant duty cycle and fixed switching frequency operation can be achieved as well. The operating principle and the performance of the proposed converter are analyzed in this paper. In addition, a precise parameter design method is proposed by considering the high-order harmonics. At last, an experimental prototype is established to validate the proposed parameter design and variable inductor control method. [ABSTRACT FROM AUTHOR]

The dual-active bridge (DAB) topology is commonly preferred in bidirectional applications due to several attractive features, including auto-adjust of power flow, galvanic insulation, wide voltage gain, and zero voltage switching (ZVS) capability over some power ranges. However, the efficiency of the converter drops at light loads because the ZVS range is directly dependent on the circulating current. Assuming that the processed power is variable, the DAB converter's design must find a compromise between extending ZVS ranges and reducing the reactive power processing to ensure higher efficiency. Aiming this compromise, many papers propose hybrid approaches in which the modulation strategy is selected according to the processed power. However, this is not a simple solution because it demands multivariable control and offline optimizations. This paper proposes a modulation strategy to ensure ZVS and reduce the circulating current for the DAB converters. While the usual phase-shift modulation provides ZVS operation in a range of 40% to 100% of rated power, the proposed asymmetrical pulse-width modulation can obtain ZVS operation in a range of 2% to 100% of rated power. Experimental results demonstrated that the proposed strategy improves the converter efficiency for all power ranges, especially at light loads. [ABSTRACT FROM AUTHOR]

The aim of this paper is to analyze the situations in which distributed power generation systems (DPGSs) based on renewable energy sources (RESs) can be controlled when operating under voltage sags. Analytical models for both solar photovoltaic (PV) system and doubly-fed induction generator (DFIG)-based wind turbine (WT) written in the complex form of the Park variables are given. Three kinds of control for the grid-side converter (GSC) of a PV system are compared: constant forward voltage control (CFVC), balanced positive-sequence control (BPSC) and the proposed BPSC with grid code requirements (BPSC-GCR). Regarding the rotor-side converter (RSC) of a DFIG-based WT, its controllability is studied considering three different-sized DFIG-based WT units: 6 MW (offshore), 2 MW (onshore) and 7.5 kW (setup). The converter limits are also considered. Simulations carried out in MATLAB reveal that a RES-based DPGS can achieve fault ride-through (FRT) when subject to a certain fault (i.e., with a specific duration and depth), but it may be uncontrollable for different-sized units operating under different faults without considering the grid code requirements. Finally, experimental results prove the robustness of the BPSC-GCR method to let GSCs of PV systems achieve FRT under sags. [ABSTRACT FROM AUTHOR]

When the permanent magnet synchronous motor (PMSM) works in the high-speed region with low carrier ratios, the performance of the rotor flux observer has a great influence on the loading capacity and stability of the speed sensorless vector control system. The problem of the adaptive compensation flux observer (ACFO) of the PMSM at low carrier ratios is analyzed in this paper, and an ACFO with a feedback delay component is presented. After retuning the PI regulator parameters, the new expression related to carrier ratio is obtained, which can improve the performance of the flux observer at low carrier ratios and make the torque and current loop response faster. Meanwhile, the stability of different Euler approaches of the integrator for ACFO in the discrete domain is analyzed, and a new Euler with a coefficient is proposed to combine the merits of the backward Euler and the trapezoid Euler. It shows better performance at low carrier ratios. Finally, the effectiveness of the discrete ACFO is verified by experiments. [ABSTRACT FROM AUTHOR]

An improved two-stage model predictive current control (MPCC) for three-phase three-level converters in the paper, which can simultaneously achieve common-mode voltage (CMV) reduction, effective dc-link capacitor voltage control, and decreased computational burden, is proposed. Compared to the other current control strategies, it has the capability of handling multiple control objectives and possesses a simple structure. Furthermore, it greatly reduces the CMV since the peak CMVs of all the candidate voltage vectors are constrained to be less than one sixth of the dc-link voltage. In addition, an optimal two-stage voltage vector selection mechanism is employed in the proposed method. It helps to significantly reduce the computational complexity. Simulation and experimental results are provided to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

This paper presents Space Vector Modulation (SVM) sequences that reduce Common Mode Voltage (CMV) in Dual Three-phase Asymmetrical Induction Motor (DTAIM). At first, two existing SVM techniques such as Reference SVM (RSVM) and CMV1 are studied. Additionally, three new switching sequences are developed as CMV2, CMV3 and DCMV3, which reduce peak magnitude of CMV by 66.8% in comparison with RSVM technique. In SVM techniques, to obtain least CMV, zero vectors are usually replaced by two opposite large Active voltage Vectors (AV) with equal time duration. In such topologies like CMV1, total six AVs are utilized to synthesize the reference vector. The proposed SVM technique CMV2 utilizes only five large AVs to synthesize the reference vector and reduces CMV. Selection of five neighbouring AVs is reflected in reduction of harmonic flux trajectories and stator current ripple in proposed techniques. Additionally, two more switching sequences (CMV3 and DCMV3) are developed related to utilization of specific zero voltage vectors in all sectors (7 and 56) that produce zero CMV. These two switching sequences also provide easy implementation feature during the development of c-code program. In this study, CMV and stator current ripple are considered as performance parameters for different SVM techniques. All SVM techniques are analysed by analytical results, computer simulations, and using prototype test setup of DTAIM fed by Dual Three-phase Voltage Source Inverters (DTVSIs). [ABSTRACT FROM AUTHOR]

This paper presents a grid-forming control (GFC) scheme for two-stage photovoltaic (PV) systems that maintains power reserves by operating below the maximum power point (MPP). The PV plant in GFC mode behaves like a voltage source that supports the grid during disturbances in full or limited grid-forming mode as per the reserve availability. This is a model-free method that avoids the estimation of MPP power in real-time commonly done in the literature, which makes it simpler and more reliable. The proposed control also features an enhanced current limitation scheme that guarantees containment of the current overshoots during faults, which is not trivial in voltage-sourced GFC inverters. A thorough investigation is done, exploring various generation mixtures of synchronous machines (SM), GFC and grid-following (GFL) inverters, and all common disturbances, e.g., load change, faults and irradiance transients. The results show very favorable dynamic performance by the GFC inverters, far superior to GFL inverters and directly comparable to SMs. It is found that replacing SMs with GFC inverters may improve the frequency profile and terminal voltage during disturbances, despite losing out in the mechanical inertia and the strict inverter overcurrent limits. [ABSTRACT FROM AUTHOR]

Utility engineers, professionals from regulatory agencies, manufacturers and researchers have discussed if high-frequency distortions produced by rooftop photovoltaic generators are a general power quality concern for distribution systems. In this context, this paper presents the results of an extensive research to investigate the emission and propagation characteristics of such high-frequency distortions. Analytical and theoretical analyses, computer simulations, laboratory experiments and field measurements revealed that high-frequency distortions emitted by rooftop photovoltaic inverters are produced with a voltage source characteristic. As a result, the equivalent grid impedance limits and attenuates significantly the high-frequency distortions injection and propagation into the distribution systems. Moreover, the front-end, low-pass filters found in many home appliances also contribute with such attenuation by sinking part of the high-frequency distortions. In summary, the results indicate that these distortions are unlikely to become a generalized power quality concern, so that the front-end filters commonly available for such devices, when properly designed, are enough to deal with this issue. [ABSTRACT FROM AUTHOR]

This paper proposes a novel dual input nine-level inverter (DINLI) topology which requires only seven controllable devices. The dual inputs are un-identical DC voltage sources in the ratio 1:3. A simple control scheme is derived by appropriately modifying the phase disposition pulse width modulation technique to generate high-quality 9-level output from the DINLI topology. At any given instant, a maximum of four switches conduct out of which only a maximum of two switches operate at high frequency, bringing down the switching and conduction losses significantly and improving the overall system efficiency. The bidirectional DINLI (BDINLI) topology with reactive power capability can be realized by replacing the unidirectional devices with the controlled switches (i.e., total nine switches). In addition, the proposed DINLI topology does not require extra voltage balancing circuits which further improves the efficiency. The DINLI operation is verified through MATLAB simulations for grid-connected applications and its extension to an n-level, 3-phase application is also investigated. Experiments performed on a 1KVA laboratory prototype to validate the theoretical claims. [ABSTRACT FROM AUTHOR]

Deciphering the relationship between transcription factors (TFs) and DNA sequences is very helpful for computational inference of gene regulation and a comprehensive understanding of gene regulation mechanisms. Transcription factor binding sites (TFBSs) are specific DNA short sequences that play a pivotal role in controlling gene expression through interaction with TF proteins. Although recently many computational and deep learning methods have been proposed to predict TFBSs aiming to predict sequence specificity of TF-DNA binding, there is still a lack of effective methods to directly locate TFBSs. In order to address this problem, we propose FCNGRU combing a fully convolutional neural network (FCN) with the gated recurrent unit (GRU) to directly locate TFBSs in this paper. Furthermore, we present a two-task framework (FCNGRU-double): one is a classification task at nucleotide level which predicts the probability of each nucleotide and locates TFBSs, and the other is a regression task at sequence level which predicts the intensity of each sequence. A series of experiments are conducted on 45 in-vitro datasets collected from the UniPROBE database derived from universal protein binding microarrays (uPBMs). Compared with competing methods, FCNGRU-double achieves much better results on these datasets. Moreover, FCNGRU-double has an advantage over a single-task framework, FCNGRU-single, which only contains the branch of locating TFBSs. In addition, we combine with in vivo datasets to make a further analysis and discussion. [ABSTRACT FROM AUTHOR]

Two-stage AC-DC converters are considered as a prominent solution for DC-type electric vehicle (EV) chargers. However, this kind of architecture suffers from high switching losses with large heatsink and DC-link capacitor volume. To relieve this issue, this paper presents a new hybrid modulation for DC-type EV chargers, where a two-phase clamped discontinuous pulse-width-modulation (DPWM) in the front-end circuit is cooperated with the variable frequency triangular-current-mode (TCM) zero voltage switching (ZVS) or its simplified implementation, i.e., boundary-ZVS (B-ZVS) strategy, in the back-end circuit. The former can stop the switching actions in the front-end stage during two-thirds of the grid period, while the AC currents are at their highest values, which can yield to the best switching loss reduction and deliver high power factor operation. Besides, TCM-ZVS or B-ZVS modulations can achieve ZVS turn-on action for all semiconductors during all operating range in the DC-DC stage to further reduce the power losses on the semiconductors. With such characteristics, the proposed strategies can reduce the switching losses of the system to the best extent, and thus allow an enhancement of the system power density by improving the power conversion efficiency. The proposed strategy is described, analyzed, validated, and benchmarked in a 5 kW SMD SiC MOSFET-based two-stage AC-DC converter. A 99% power efficiency can be achieved with the solution implementing the TCM-ZVS strategy at an output voltage of 400 V and rated power. [ABSTRACT FROM AUTHOR]

A power systems of wearable application requires high power conversion efficiency and bidirectional power flows to obtain the compatibility with various power sources and loads. The conventional flyback converter has a simple structure and bidirectional power conversion capability. However, it shows poor power conversion efficiency caused by hard-switching operation, high DC offset current on the transformer, snubber losses, and large peak current. In this paper, a current-fed CLLC resonant converter is proposed to obtain the high power conversion efficiency and the bidirectional power conversion capability. The soft-switching operation, zero DC-offset current, and small peak current can induce high power conversion efficiency. The asymmetric pulse width modulation (APWM) regulates the bidirectional power flows and the output voltage. The design methodology of the proposed converter is analyzed by introducing its operational principles. The performance of the proposed converter is experimentally verified with a 20 W prototype. [ABSTRACT FROM AUTHOR]

This paper deals with the estimation of parameters of a Thevenin equivalent in an AC grid. We consider the practically relevant case of measurements coming from a grid-connected inverter. Our focus is on non-intrusive measurements, as we postulate and later experimentally observe transients that occur in normal operation as the primary source of information. We notice that even during quiet, after work hours there are typically enough variations in the grid to enable successful convergence of our procedure. For completeness, we also consider the artificial case of no external variations and show that injection of very small current perturbations suffices for convergence. Our procedure is based on real-time monitoring of the estimated determinant of the regression matrix. Regression matrix properties are also used to evaluate the integrity of the estimates and to initiate a brief sequence of perturbation in rare cases of the exceptionally restful grid. The estimation algorithm is simple enough to be implementable on standard industrial controllers, yet robust and reliable in terms of speed of convergence. [ABSTRACT FROM AUTHOR]

Initiation and growth of electrical trees can be linked to the development of partial discharge (PD) activity within an insulation system. We present in this paper changes in PD characteristics that appear during the electrical tree growth in a crosslinked polyethylene (XLPE) based insulation at different stages of its degradation. A DC voltage with superimposed high frequency component is applied to the material specimens for the detection and characterization of PD traces observed during the degradation. The method is flexible and offers a possibility to vary DC voltage level independently of the superimposed disturbance, its frequency and rise time, including rapid voltage steps. It also enables to create a phase-locked phase-resolved PD pattern (PRPD) facilitating various analyses of the characteristics. It is postulated that measurements of the changes in PD characteristics found under such excitations can be used for performing diagnostics and prognostics of material condition. This approach also implies new possibilities to evaluate different material concepts. [ABSTRACT FROM AUTHOR]

The Terahertz band is envisioned to meet the demanding 100 Gbps data rates for 6G wireless communications. Aiming at combating the distance limitation problem with low hardware-cost, ultra-massive MIMO with hybrid beamforming is promising. However, relationships among wavelength, array size and antenna spacing give rise to the inaccuracy of planar-wave channel model (PWM), while an enlarged channel matrix dimension leads to excessive parameters of applying spherical-wave channel model (SWM). Moreover, due to the adoption of hybrid beamforming, channel estimation (CE) needs to recover high-dimensional channels from severely compressed channel observation. In this paper, a hybrid spherical- and planar-wave channel model (HSPM) is investigated and proved to be accurate and efficient by adopting PWM within subarray and SWM among subarrays. Furthermore, a two-phase HSPM CE mechanism is developed. A deep convolutional-neural-network (DCNN) is designed in the first phase for parameter estimation of reference subarrays, while geometric relationships of the remaining channel parameters between reference subarrays are leveraged to complete CE in the second phase. Extensive numerical results demonstrate the HSPM is accurate at various communication distances, array sizes and carrier frequencies. The DCNN converges fast and achieves high accuracy with 5.2 dB improved normalized-mean-square-error compared to literature methods, and owns substantially low complexity. [ABSTRACT FROM AUTHOR]

A 12V/24V-to-1V pulsewidth modulation (PWM) controlled double step-down (DSD) power converter with delay-insensitive and dual-phase charging techniques is presented. The proposed PWM controller has two feedback loops to regulate the output voltage and the voltage across the flying capacitor, respectively. With the proposed delay-insensitive technique, near-optimal transient responses are achieved by using the PWM control regardless of the time of occurrence of the transient. Moreover, the responses are further improved by two times by using the proposed dual-phase charging technique. The converter was fabricated in a 0.18- $\mu \text{m}$ BCD process with all power transistors integrated on chip. For 12V-to-1V conversion and 24V-to-1V conversion, the measured peak efficiencies at 1-MHz switching frequency are 88.3% and 83.5%, respectively. With a load current step of 3 A and a rise time of 20 ns, the measured voltage droop and 1% settling time are 56 mV and 0.9 $\mu \text{s}$ , respectively. [ABSTRACT FROM AUTHOR]

This brief presents an energy harvester IC with the maximum power point tracking (MPPT) scheme for an ultra-wide input power range. In the energy harvester, the proposed auto-configurable dual-mode MPPT algorithm adaptively switches between a fixed charge search (FCS) mode and a fixed frequency search (FFS) mode, according to the input power level. The implemented chip in 180nm CMOS process achieves the widest input power range of 12nW-to-180mW with a peak efficiency of 93.6%, occupying $1.14\,\,{\times }\,\,1.24$ mm2. The proposed hill climbing-based MPPT scheme also shows a conversion efficiency of >30% even at 12nW input power while consuming a quiescent current of 2.2nA. [ABSTRACT FROM AUTHOR]

With the widespread of deep neural networks (DNNs) in diverse applications, tiny platforms such as Internet-of-Things devices are starting to adopt DNNs. Due to their extreme energy and form factor constraints, conventional digital-only implementations of multiply-and-accumulate (MAC) acceleration faced fundamental limitations. To that end, the investigation into mixed-signal computing architectures is growing rapidly. Motivated by the flash ADC, this article proposes FlashMAC architecture that can natively support multibit multiplication. In addition, through fusing time- and frequency-domain computing methods without power-hungry oscillators, it enables low latency accumulation with low power consumption. As a result, the proposed time-frequency hybrid architecture achieves high energy efficiency with the support for complex DNN models requiring higher precision. To enhance the robustness of PVT variation of the mixed-signal architecture, a frequency calibration loop is integrated. In addition, motivated by the data-dependent performance of the FlashMAC architecture, variable latency-aware scheduling is proposed. The FlashMAC does not skip MAC operations as zero-skipping architectures do, but the latency of the operation can be lower when operands are smaller in magnitude. Tackling the issue through software and hardware co-optimization, loose synchronization architecture and magnitude-aware weight reordering increase the DNN benchmark performance by achieving higher utilization of the parallel FlashMAC array. The proposed features are integrated into a test chip which is fabricated in 65-nm logic CMOS technology. The silicon chip achieves 56.52 TOPS/W peak energy efficiency and a peak operating frequency of 90 MHz. Tested with the VGG16 benchmark trained on the Imagenet dataset, it achieved 17.04-ms latency while showing 11.15 TOPS/W energy efficiency. As a result, compared to the previous state-of-the-art, the proposed FlashMAC achieved 3.15 $\times $ higher normalized energy efficiency. [ABSTRACT FROM AUTHOR]

Multiply-accumulate (MAC) operations are common in data processing and machine learning but costly in terms of hardware usage. Stochastic Computing (SC) is a promising approach for low-cost hardware design of complex arithmetic operations such as multiplication. Computing with deterministic unary bit-streams (defined as bit-streams with all 1s grouped at the beginning or end of a bit-stream) has been recently suggested to improve the accuracy of SC. Conventionally, SC designs use multiplexer (mux) units or OR gates to accumulate data in the stochastic domain. MUX-based addition suffers from scaling of data and OR-based addition from inaccuracy. This work proposes a novel technique for MAC operation on unary bit-streams that allows exact, non-scaled addition of multiplication results. By introducing a relative delay between the products, we control correlation between bit-streams and eliminate OR-based addition error. We evaluate the accuracy of the proposed technique compared to the state-of-the-art MAC designs. After quantization, the proposed technique demonstrates at least 37 percent and up to 100 percent decrease of the mean absolute error for uniformly distributed random input values, compared to traditional OR-based MAC designs. Further, we demonstrate that the proposed technique is practical and evaluate area, power and energy of three possible implementations. [ABSTRACT FROM AUTHOR]

This article presents a pulse-amplitude-modulated (PAM)-8 wireline transceiver with receiver-side pulsewidth-modulated (PWM) or time-domain-based feedforward equalization (FFE) technique. The receiver converts the voltage-modulated signals or PAM signals into PWM signals and processes them using inverter-based delay elements having a rail-to-rail voltage swing. Time-to-voltage and voltage-to-time converters are designed to have non-linearity with opposite signs with the aim of achieving higher front-end linearity on the receiver. The proposed PAM-8 transceiver can operate from 12.0 to 39.6 Gb/s and compensates 14-dB loss at 6.6 GHz with an efficiency of 8.66 pJ/bit in 65-nm CMOS. [ABSTRACT FROM AUTHOR]

We report a novel emission gate driver using low- temperature poly-Si oxide (LTPO) thin-film transistors (TFTs). The proposed circuit consists of eight p-type low-temperature poly-Si (LTPS) and four n-type amorphous InGaZnO (a-IGZO) TFTs. The output pulse width is adjustable by changing the position of starting control signal which has constant pulse width without additional clock signals. The emission gate driver releases the output signals with various duty ratios. Excellent gate driving performance is achieved from the LTPO emission gate driver, although the a-IGZO TFTs have the threshold voltage of −5.5 V. In addition, the power consumption is as low as 5.98 mW in case of 80 $\boldsymbol {\mu }\text{s}$ pulse, 10 times of gate pulse, at refresh rate of 120 Hz with full high-definition ($1920\times1080$) for active-matrix organic light- emitting diode (AMOLED) display. [ABSTRACT FROM AUTHOR]

In this article, a monolithically integrated driver fabricated by 12-V depletion mode gallium nitride (dGaN) and enhanced mode GaN (eGaN) driver is proposed. The proposed driver features an internal temperature-compensated (T-compensated) controller to drive an integrated 650-V eGaN power switch. Due to T-compensated characteristics, a slew-rate enhancement driver can be well-controlled by the fast turn-on (FTO) technique which is supplied by an on-chip regulator with reference voltage circuit. Therefore, the Miller plateau voltage can be tracked correctly by the proposed controller so that the switching frequency can be raised up to 50 MHz and the $\textit {dV}_{\mathrm {DS}}$ / dt slew rate can reach 118.3 V/ns for high efficiency and high switching operation. [ABSTRACT FROM AUTHOR]

This article presents a new micro-light-emitting diode (LED) pixel circuit driven by the digital pulsewidth modulation (PWM) method, in which the threshold voltage compensation of the driving thin-film transistor (TFT) is included. A scan driver integrated by metal oxide (MO) TFTs is also designed to provide the scan signals for pixel circuits array. A micro-LEDs array with $76\,\, \times $ BBB $\times \,\,78$ and a scan driver with 80 stages are simultaneously fabricated by MO TFTs backplane with back-channel etch (BCE) structure. A respective micro-LED display is consequently realized by a peripheral driving system based on a field-programmable gate array (FPGA), which is used as a core control unit to synchronize the scan signals with the data signals. It is shown that the micro-LED in the pixel circuit can operate at a constant current even at the 5- $\mu \text{s}$ pulsewidth of the emission (EM) signal. The micro-LED display can achieve 256 linear grayscales with an approximately 60 Hz flash rate under the minimum pulsewidth of 40 $\mu \text{s}$ of EM signal. [ABSTRACT FROM AUTHOR]

Pulse width modulation in voltage source inverters with an arbitrary number of phases is analyzed in this paper. The problem is treated as purely algebraic, without any use of space vectors. Regardless of avoiding space vectors, the same results are achieved. It is shown that the problem of determining duty ratio values does not have a unique solution, and that there is one degree of freedom to choose one duty ratio, but within a limited range. Limits of the range are derived. Feasibility constraints for the required set of line voltages are derived, reducing to the requirement that the highest of the line voltages should be lower than the DC bus voltage. The analysis is illustrated in cases varying from two to five phases, and experimentally verified in the case of three phases. The method is simple and could be applied to any number of phases, even for the voltages that are not sinusoidal.

Integration of the impacts of time and space harmonics simultaneously during the design stages of inverter-fed induction machines (IMs) is crucial for the accurate calculation of electromagnetic (EM) torque and ripples. Traditional magnetic field-based models offer an analytical approach for determining the EM torque in IMs by calculating inductances. However, by assuming infinite core permeabilities, these models neglect the impact of the core magnetomotive force (MMF) drops due to the difficulties in accurately calculating these drops and the impracticality of isolating the contribution from each phase, which is essential for inductances calculations. These factors contribute to deficiencies in this modeling approach, which become more noticeable when the combined impacts of time and space harmonics on MMF drop calculations are also disregarded. Therefore, this paper introduces a novel magnetic-field-based model to predict the torque and torque ripples of inverter-fed induction motors by addressing the above limitations. This involves modifying the turns and winding function, and calculating the core MMF drops based on the timely variation of non-sinusoidal core flux densities, considering their major and minor flux-density loop effects. Consequently, the associated energy is used to calculate the net available energy, thereby enhancing torque calculations. Compared to the experimental results obtained from an 11kW prototyped induction motor, the proposed model exhibits notable enhancements, achieving average accuracies of 96.4% for average torque and 94.51% for torque ripples, in contrast to the respective traditional model accuracies, 81.1% and 45.1%.

This paper proposes a novel virtual vector space vector pulse width modulation (SVPWM) method called Average Zero common mode voltage (AZCMV) PWM to mitigate low-frequency CMV in four-level neutral point clamped (4L-NPC) inverters. Due to the absence of zero CMV vectors in the space vector diagram (SVD) of 4L inverter, the proposed SVPWM method introduces virtual average zero CMV vectors, which are the combination of active vectors, and have an average CMV of zero. The SVPWM scheme is simply implemented in the transformed two-level (2L) SVD by the aid of base vectors. Then, three types of 2L SVD are presented. Effective and hybrid 2L-SVPWM control strategy based on four nearest vectors SVPWM, symmetrical and asymmetrical SVPWM is proposed to optimize output harmonic and switching losses. With the proposed SVPWM method, the peak-to-peak value of CMV can be reduced to one ninth of the total DC link voltage, which is lower up to five times as compared to the sinusoidal PWM (SPWM). Furthermore, the average value of CMV is zero in a switching sequence. The effectiveness of the proposed method has been verified by simulation and experimental results.

Air-conditioners are now widely being used in offices and domestic homes due to the rising global temperatures. Inverter-driven air-conditioners offer superior cooling performance, enhanced control, and a more compact design than non-inverter-driven air-conditioners. Further, inverter-driven air conditioners are more efficient and also cost-effective within a pay-back period. Nowadays, efficient motor drives that meet international efficiency (IE) standards are the need of the hour. Permanent magnet-assisted reluctance motor (PMa-SyRM) drives are one such feasible solution for air conditioner applications, where very less magnet volume is used thereby improving the efficiency whilst minimizing the overall cost. This paper presents a variable-speed rare-earth-free ferrite Al-Ni-Co hybrid PMa-SyRM drive for an air conditioner application. Hall-sensors are used for detection of the rotor position and a simple current advance angle based control is implemented to extract both the magnetic and reluctance torque components from the hybrid PMa-SyRM. Later, simulation studies are carried-out and the cost and the efficacy of the proposed control is compared with that of the conventional maximum torque per ampere (MTPA) control. Finally, a prototype drive is fabricated and experimental validation under various load conditions is carried-out and the results are presented.

The integration of solar photovoltaic (PV) arrays for induction motor drives (IMDs) has attained a lot of research interest due to the versatile applications of IMD including water pumping, cement industries, electric vehicles, and rolling mills etc. Multilevel inverters (MLIs) are a prominent solution for driving medium voltage induction motors (IMs) due to their superior performances over two-level voltage source inverters (VSIs). However, the power quality performance of MLI fed IMDs greatly depends on the pulse width modulation (PWM) strategy employed. Traditional PWM strategies for MLIs suffer from power quality problem such as lower order harmonics, high THD, unbalanced power loss distribution, high switching power loss, thermal instability and electromagnetic interference (EMI) problems. In this paper, a modified PWM strategy is proposed for a solar PV fed 3-level neutral point clamped (NPC) inverter driven IMD. The proposed PWM strategy introduces a new modulating signal with level shifted triangular carriers. The proposed modulating signal is formed by utilizing a $13^{\mathrm {th}}$ harmonic signal and saturated balanced 3-phase sinusoidal signals. The proposed PWM technique is named as $13^{\mathrm {th}}$ harmonic injected 60°-PWM (THISDPWM). The THISDPWM reduces the lower order harmonics contents, overall THD, and switching power losses of the NPC inverter compared to different existing PWM strategies. Apart from that, a robust artificial neutral network (ANN) based incremental conductance maximum power point tracking (MPPT) algorithm is also introduced to control the dc-link voltage of the PV fed NPC inverter driven IMD system. The presented ANN based dc-link controlled technique ensures stable dc-link voltage against wide range of PV parameters variation. All the simulation works are carried out in MATLAB/Simulink environment and a reduced scale laboratory prototype of the IMD is built and tested to validate the performance of the proposed THISDPWM technique.

A data center is a major hub of different converters ensuring continuous power to the server loads. The pulse width modulation switching techniques with frequency emission from 2 to 150 kHz (i.e., supraharmonics) in these converters call for a study of the magnitude and propagation of this emission within data centers where UPS is one of the main contributors of supraharmonics. The paper shows, with measurements and model, the change in magnitude and propagation of supraharmonics with the change in the operating mode of the UPS. The magnitude of supraharmonics shows a non-linear dependency on the power consumed in the online mode. In bypass mode, the magnitude of supraharmonics shows a dependency on the type of load connected. The filter connected between PE-N at the input side of the UPS can cause resonance in the phase conductors. The results show that to study the emission, immunity, and electromagnetic compatibility of supraharmonics for UPS, the factors such as operating mode, the type of load connected, and the input and output impedance need to be considered.

In this paper, we propose a novel amorphous In-Ga-Zn-oxide (a-IGZO) thin film transistor (TFT) pixel circuit for pulse width modulation (PWM) driving active matrix micro light-emitting diode $(\mu $ LED) displays. The proposed pixel circuit compensates for wavelength shifts according to gray level and threshold voltage (VTH) variation of TFTs with only two capacitors. This compact operation can be achieved by simultaneous compensation for VTH along with data input in the constant current generation (CCG) circuit and the PWM circuit, which consist the pixel. Since the VTH variation in TFTs is compensated, the proposed pixel circuit can supply a uniform and stable current to the $\mu $ LED throughout all gray levels. The compensation accuracy was verified by HSPICE with an oxide TFT model based on the measurement data. In addition, we analyzed the optimization method to improve the PWM driving by controlling the electrical properties of TFT, and verified this approach by simulation.

Due to the rapid advancement of power semiconductor devices, the use of voltage source inverters (VSIs) has gained widespread acceptance. As a consequence, the performance of the voltage source inverter has emerged as a critical aspect that is highly reliant on the modulation strategy. The pulse width modulation (PWM) technique is the most widely utilized method of controlling power semiconductor switches of VSI. Power quality is always considered as an industrial concern for VSI-based power system such as grid-connected renewable energy systems and industrial motor drives which largely depends on the PWM technique used for switching. However, the existing PWM schemes for VSIs suffer from high total harmonic distortion (THD) and power loss problems. To mitigate the THD and power loss of VSI, a hybrid PWM technique has been proposed in this paper. The proposed hybrid PWM technique introduces a modified modulating signal along with newly shaped carrier signal. A two-level VSI is used to evaluate the performance of the proposed hybrid PWM technique both for with and without filter conditions against RL load. The proposed hybrid PWM technique offers 0.89% filtered voltage THD and 0.69% filtered current THD which are lower than that of existing PWM techniques. On the contrary, at without filter condition, the proposed hybrid PWM technique shows THDs of 45.77% and 12.50% for inverter output voltage and current, respectively which are also lower than those of existing PWM techniques. Apart from these, the proposed hybrid PWM technique reduces the switching and conduction power losses of the VSI as compared to existing PWM techniques. The simulation works are carried out in MATLAB/Simulink environment and a reduced scale experiment is conducted in laboratory to evaluate the performance of the proposed hybrid PWM technique.

A direct speed control strategy based on finite control set model predictive control (FCS–MPC) with a voltage smoother is presented herein. In the proposed concept, a finite set of smoothed voltage vectors characterized by an adjustable amplitude and a movable origin is introduced as voltage candidates in the FCS–MPC scheme. The controller predicts the future current and speed and outputs the optimal smoothed voltage using pulse-width modulation. Owing to this control scheme, an abrupt change in the output voltage, which causes a large current ripple, is avoided without additional computational costs. Simulation and experimental results obtained using a permanent magnet synchronous motor fed by a two-level three-phase inverter show that the proposed method effectively reduces the current ripple while achieving a high dynamic drive compared with the conventional FCS–MPC scheme. [ABSTRACT FROM AUTHOR]

Deadbeat-direct torque and flux control (DB-DTFC) significantly improves the torque response performance compared with the conventional direct torque control. However, the existing DB-DTFC algorithm suffers from a relatively heavy computational burden due to its intricate derivation. Thus, two simplified DB-DTFC algorithms for permanent magnet synchronous machines (PMSMs) are proposed in this article to relieve the burden. The first one is based on the stator flux differential, and the second one is based on the complex power of PMSM. Furthermore, the performance of DB-DTFC highly relies on the accuracy of machine parameters. Thus, modified stator flux observer and electromagnetic torque observer are designed to enhance parameter robustness based on disturbance observer theory. The theoretical derivation of the proposed methods is investigated in-depth. Finally, both simulation and experimental results verify that the proposed deadbeat methods can maintain the deadbeat performances with a reduced computational burden. Meanwhile, the modified observer can help the deadbeat algorithms work well when machine parameters change. [ABSTRACT FROM AUTHOR]

This article proposes and studies different sigma–delta ($\Sigma$ $\Delta$) modulation strategies for obtaining a constant common-mode voltage (CMV) by eliminating the CMV level transitions in a five-phase voltage source inverter (VSI). These techniques are based on choosing vectors that generate a constant CMV with values of 0.1 $V_{\text{dc}}$ or –0.1 $V_{\text{dc}}$. Because of the high-switching frequencies used with wide-bandgap semiconductors, pulse-width modulation techniques continually generate high dv/dt values. Therefore, the proposal to combine a $\Sigma$ $\Delta$ modulation strategy with vector selections achieves a constant CMV level due to the elimination of its level transitions, a reduction in conducted electromagnetic interference and a high-efficiency converter operation. The average number of switching per transistor of the VSI is analyzed using the results from MATLAB/Simulink and PLECS simulations. Experimental results are obtained by applying the proposed $\Sigma$ $\Delta$ modulation strategies on a VSI with silicon carbide MOSFETs. The results demonstrate the achievement of the aforementioned features. [ABSTRACT FROM AUTHOR]

Online monitoring for underground power cable insulation has become an urgent need in distribution grids, which can lead to proactive maintenance and avoid severe insulation faults. Insulation capacitance has been selected as an effective insulation condition indicator in many researches, but the variation of insulation conductance is always overlooked, resulting in a limited monitoring range and sensitivity. To solve this problem, a novel online monitoring method for underground power cable insulation based on resonance frequency analysis under chirp signal injection is proposed in this article. An online monitoring scheme based on common-mode chirp signal injection is first designed, realizing online monitoring in a nonintrusive manner. The resonance frequency under the injected signal is then analyzed, providing an effective approach to monitor insulation capacitance regardless of the accompanied insulation conductance variation. Simulations and experiments are carried out, proving the effectiveness of the proposed method for different system operating conditions. [ABSTRACT FROM AUTHOR]

Linear modulation techniques (LMTs) of an asymmetrical six-phase machine (ASPM) with two isolated neutral points synthesize the desired voltage vectors by applying at least five switching states. Different choices of applied voltage vectors, sequences in which they are used, distribution of dwell-times among the redundant switching states give rise to a large number of possible LMTs. It is desirable that these LMTs avoid more than two transitions of a particular inverter leg within a carrier period. Only a subset of existing LMTs of ASPM follows this rule. Through an innovative approach, this article finds a way to account for all possible infinitely many LMTs that follow the rule of at most two transitions per leg. Another important criterion for the selection of an LMT is its current-ripple performance. Therefore, through numerical optimization, this article finds optimal LMTs among the above infinite possible LMTs for all reference voltage vectors in the linear range and for the whole feasible range of a machine parameter. This parameter is related to the leakage inductance of the machine and impacts the current ripple performance of ASPM. An optimal hybrid strategy is proposed with these optimal techniques, which outperforms all existing techniques in terms of the current ripple. The theoretical analysis is validated through simulation in MATLAB and experiments performed up to 3.5 kW on a hardware prototype. [ABSTRACT FROM AUTHOR]

This work presents a hybrid seven-level dual inverter scheme with increased linear modulation range. The hybrid inverter structure is formed by supplying the load from primary side by using a cascaded structure of a two-level inverter and H-bridge (HB) and secondary side of the load is supplied by a floating-capacitor-fed two-level inverter. The combination of primary two-level space vector structure (SVS) with secondary two-level SVS and primary three-level SVS of HB form a seven-level SVS that can further be extended to an eight-level hexagonal SVS. This structure then reduced to a 12-sided eight-level SVS to avoid exceeding motor phase voltage rating. Subsequently by using this eight-level SVS in an unique pulsewidth modulation mode, the proposed topology can increase the modulation range linearly from $0.577V_{\text{dc}}$ to $0.637V_{\text{dc}}$ peak phase fundamental voltage for any load power factor (pf), where dc-link voltage is $V_{\text{dc}}$. An 11 $\%$ increase in modulation range ($0.637V_{\text{dc}}/0.577V_{\text{dc}}$) is possible devoid of lower order harmonics (predominantly $5{\text{th}}$ , $7{\text{th}}$ , $11{\text{th}}$ , $13{\text{th}}$ , etc.) in phase voltage for unity pf load in comparison to the conventional six-step operation of two-level and multilevel hexagonal SVS. To balance HB capacitors voltages in this work, a concept of indirect space vector redundancy is used. The efficacy of the proposed inverter scheme is verified through various experimental results at different steady-state and transient conditions. [ABSTRACT FROM AUTHOR]

The uncertainty and disturbance estimator (UDE) with a time delay filter has been widely used for inverter systems due to its satisfactory harmonic rejection performance. However, the control performance may be affected when the grid frequency fluctuates. In this article, a modified UDE (FUDE) is proposed to improve the grid frequency fluctuation adaptability of the $LCL$ grid-tied inverter systems, which contains a compound filter consisting of time delay, zero-phase low-pass, and high-pass filters. Compared with the traditional time delay UDE, it can offer a wider notch bandwidth at the selected frequencies. A dual-loop controller is built in the separate-structure-type UDE-based controller, containing an outer loop PR controller and an inner loop FUDE. The sufficient conditions for the system stability are obtained by the small-gain theorem. The comparison experiments of the dual-loop controller with the proposed FUDE and the conventional time delay zero-phase low-pass UDE are performed on a 2-kW experimental platform, and the results demonstrate the effectiveness of the proposed FUDE. [ABSTRACT FROM AUTHOR]

Data centers require high efficiency and high power-density dc–dc converter with wide input range and galvanic isolation. To overcome the drawbacks of traditional single-stage LLC and two-stage solutions, a novel partial power regulation topology with wide input range is proposed in this article. The proposed topology delivers the load power through a three-ports LLC-based dc transformer regulated DCX (DCX). A pulsewidth modulation (PWM) converter is cascaded with one of the input ports of the DCX and then in series with the other input port to regulate the output voltage. Since a single transformer and a partial power PWM converter are employed, high power density can be achieved. Furthermore, only a portion of the load power is transferred by the PWM converter, the efficiency sacrifice is reduced. By introducing an appropriate negative current, the zero voltage switching of the PWM is also achieved. Furthermore, when the input voltage approaches the lower or the upper limit, the switching frequency of the PWM regulator can be ultralow. As a result, switching losses and core losses are further reduced. Finally, a prototype with 190—475 V input and 12 V/500 W output is demonstrated, which achieves a peak efficiency of up to 97.2% and a power density of 153 W/in3. [ABSTRACT FROM AUTHOR]

Over the last decades, conventional transcutaneous electrical nerve stimulation (TENS) has been utilized as an efficient rehabilitation intervention for alleviation of chronic pain, including phantom limb pain (PLP). However, recently the literature has increasingly focused on alternative temporal stimulation patterns such as pulse width modulation (PWM). While the effect of non-modulated high frequency (NMHF) TENS on somatosensory (SI) cortex activity and sensory perception has been studied, the possible alteration following PWM TENS at the SI has not yet been explored. Therefore, we investigated the cortical modulation by PWM TENS for the first time and conducted a comparative analysis with the conventional TENS pattern. We recorded sensory evoked potentials (SEP) from 14 healthy subjects before, immediately, and 60 min after TENS interventions (PWM and NMHF). The results revealed suppression of SEP components, theta, and alpha band power simultaneously associated with the perceived intensity reduction when the single sensory pulses applied ipsilaterally to the TENS side. The reduction of N1 amplitude, theta, and alpha band activity occurred immediately after both patterns remained at least 60 min. However, the P2 wave was suppressed right after PWM TENS, while NMHF could not induce significant reduction immediately after the intervention phase. As such, since PLP relief has been shown to be correlated with inhibition at somatosensory cortex, we, therefore, believe that the result of this study provides further evidence that PWM TENS may also be potential therapeutic intervention for PLP reduction. Future studies on PLP patients with PWM TENS sessions is needed to validate our result. [ABSTRACT FROM AUTHOR]

A new state-observer-based current balancing method for Modular Multilevel Converters with Interleaved half-bridge Sub-Modules (ISM-MMC) is presented in this article. The developed observer allows estimating currents through interleaved half-bridge legs in each submodule of ISM-MMC based only on arm current and submodule's capacitor voltage measurements. Then, the interleaved current balancing control uses the estimated currents to reduce the interleaved currents imbalance caused by upstream control actions. This technique minimizes the number of required current sensors in ISM-MMC, thereby reducing the converter's cost, weight, and volume. Capabilities of the proposed sensorless interleaved currents balancing control have been tested against standard parameter tolerances of the composing passive elements. In addition to that, a novel capacitor voltage balancing strategy for MMCs is developed. The new algorithm contains the main advantages of the classical sorting-based capacitor voltage balancing methods while providing an opportunity to decouple two balancing tasks of ISM-MMC, namely capacitor voltage and interleaved legs current balancing. The feasibility of the proposed methods is verified by extensive simulation and experimental tests on a laboratory prototype by the corresponding system response under the output characteristics variation and interleaved current control perturbation. [ABSTRACT FROM AUTHOR]

This article proposes a decoupled control scheme for the modular multilevel converter (MMC) to reduce the total harmonic distortion (THD) and eliminate one specific harmonic. First, to realize the decoupled control between the ac and dc paths of the MMC, an improved nearest level control (INLC) method is proposed. It applies the round function to generate the ac output voltage levels, instead of the arm output voltage levels. Thus, a staircase wave is generated by the INLC method. Then, by adding an additional pulse to each quarter of the staircase wave, one specific harmonic can be eliminated without optimizing each conduction angle. Furthermore, a decoupled circulating current fuzzy control method is proposed to suppress the second-order harmonic and balance the arm energy. By this decoupled control structure, the output voltage and the circulating current can be controlled independently. Taking the fifth-order harmonic as an example, simulation and experimental results validate that the proposed scheme can simultaneously realize THD reduction and one specific harmonic elimination in the MMC output voltage. [ABSTRACT FROM AUTHOR]

Cascaded split-source inverter (CSSI) is a single-stage modular multilevel structure. This article proposes the multidimensional pulsewidth modulation (MD-PWM) for this topology. All multilevel modulations are a particular version of this approach. The principles of this geometrical method are based on selecting the optimal points and determining the switching sequences and time intervals. By considering the operational principles of CSSI, this method is modified to accurately control the voltage of dc links, charge inductors with constant duty cycles, control dc and ac sides of cells independently, and reduce the reverse recovery effects of input diodes. MD-PWM, with a low computational burden, can be implemented for CSSI with any number of voltage levels. The output power can be distributed equally or unequally among cells, and both buck and boost operation modes are realized for each cell. Also, this method is extended for the operation of the converter with unequal input sources. For an asymmetric topology with N cells, harmonics are located at multiples of N times switching frequency. Thus, this strategy eliminates low-frequency distortions from the output voltage of asymmetric CSSI. The simulation and experimental results verify the performance and accuracy of the proposed technique and mathematical relations. [ABSTRACT FROM AUTHOR]

In this article, two compact three-phase multilevel inverters are proposed. The first proposed topology consists of three dc sources and ten power switches. The merit of the first proposed topology is reducing two switches from its structure to the conventional topologies. The second proposed topology is similar to the first one, except that one of the dc sources is replaced by a capacitor. This capacitor is balanced by an additional switch and one of the dc sources. How to apply two modulation methods for these inverters has been studied in detail. These modulation methods are level-shifted pulsewidth modulation and phase-shifted pulsewidth modulation (PS-PWM). Also, the value of the capacitor for each of the modulation methods has been calculated. Finally, the experimental results are provided to confirm the performance of the proposed topologies. [ABSTRACT FROM AUTHOR]

In grid-tied photovoltaic (PV) generation systems, intelligent energy management is required to maximize its performance. In this article, a novel three-port energy router with optimized control is proposed for this application. The proposed converter can interface among three ports (PV source, battery, and dc-link) with high integration. The PV panel is connected to the battery through an interleaved boost structure on the primary side. The primary-side PV-battery system and secondary-side dc-link are connected through a dual-active-bridge (DAB) converter. The battery operates as an energy buffer to compensate for the power mismatch due to the intermittent nature of the PV source. According to the daily power profile and intelligent power management between the grid and battery, six operating modes are possible. Optimized control strategies are customized in different operating modes. The maximum-power-point-tracking (MPPT) of the PV panel can be always realized. The zero-voltage-switching (ZVS) condition for all mosfets, reducing circulating current over a wide range, and flexible energy flow among three ports are all taken into considerations in the design. To verify the proposed concept, a 500 W rated prototype is designed. The designed prototype exhibits high efficiency in various operating modes. The experimental results agree well with the theoretical analysis. [ABSTRACT FROM AUTHOR]

Pulsewidth modulated (PWM) current-source converters (CSCs) have been attractive for high-power adjustable-speed machine systems with low carrier ratios. However, the high-order nonlinear model of CSC-fed machine systems, the distinct digital delay from the low carrier ratios, and the cross-coupling caused by coordinate transformation bring great challenges to design of high-performance stator current controller for such kind of machine systems. Firstly, this article derives the discrete-time complex-vector model for the CSC-fed permanent-magnet ac (PMAC) machine system with low carrier ratios considering the distinct digital delay and cross-coupling effect mentioned above. On that basis, the stator current controller is proposed with the modified controller parameters and the compensation technique to improve both dynamic performance and stability of the CSC-fed PMAC machine systems with low carrier ratios. The theoretical analysis and controller design process have been presented in detail to provide a guide for the model derivation and controller design. The experiments on a laboratory prototype are conducted to verify the effectiveness of the developed modeling and controller. [ABSTRACT FROM AUTHOR]

Parallel dc–dc converters are commonplace in applications such as computing power supplies, point of load systems, and dc microgrids. The presence of multiple converters in such systems allows for switch interleaving and ripple cancellation. One class of existing ripple reduction methods depends on central controllers that require communication among the converters. These approaches compromise system scalability and reliability. When it comes to decentralized methods, the state-of-the-art is limited to uniform conditions and cannot handle mismatches in physical parameters and operating points among converters. In this article, we address these shortcomings with fully decentralized controller that robustly drives the pulsewidth modulation carriers of a collection of heterogeneous converters to the phase-shifts that give minimized ripple. More precisely, the proposed controller eliminates the dominant fundamental switching harmonic from the output current and voltage using only local voltage feedback. After outlining a comprehensive analytical model, we experimentally validate our approach on a system of five parallel-connected buck converters under a variety of parametric and operational mismatches. Measurements show ripple reduction of more than $4\times$ in the output voltage and the fundamental switching frequency harmonic is attenuated by more than 30 dB compared to conventional symmetric interleaving. [ABSTRACT FROM AUTHOR]