Search

This letter proposes an indirect power dissipation level short circuit protection (IPDL-SCP) method for silicon carbide (SiC) metal-oxide semiconductor field-effect transistors (mosfets). Due to differences between normal conducting and short-circuit (SC) conditions, this method is triggered by the voltage oscillation vss at the parasitic inductance (Lss) of the source and directly monitoring vds of SiC mosfet. For verification, the short circuit protection circuit is tested and proved functional on the SC test bench. Experimental results show that the protection circuit can respond to both hard switching fault (HSF) and fault under load (FUL), while the fastest response delays are 75 ns for HSF and 170 ns for FUL. Comparisons with other commonly used SC protection methods have also been made, which show that the proposed IPDL-SCP method has better performance in shorter protection delays. [ABSTRACT FROM AUTHOR]

Gate-oxide degradation has been one of the critical reliability concerns of silicon carbide (SiC) metal–oxide–semiconductor-field-effect transistors (mosfets), which could be monitored through aging-sensitive parameters. In this article, an online gate-oxide degradation monitoring method for planar SiC mosfets is proposed by extracting gate charge time at a specific range of gate voltage. It is based on the findings that the input capacitances of planar SiC mosfets change significantly over gate-oxide degradation, which is theoretically analyzed and experimentally verified. The capacitance variations are converted into the gate charge time as the new aging-sensitive parameter. The new parameter measurement circuit is proposed and integrated into the gate driver module. The article results indicate that the new parameter varies noticeably with gate-oxide degradation and the difference of this parameter caused by junction temperature is much smaller than that caused by degradation. Besides, the parameter is immune to package degradation and load current. The condition monitoring method can be implemented online since the parameter is extracted during the off-state of SiC mosfet devices, which does not affect normal operation. The confirmatory experiment is carried out to verify the correctness of the proposed method. [ABSTRACT FROM AUTHOR]

Condition monitoring is a cost-effective means to reduce the unscheduled maintenance cost of insulated gate bipolar transistor (IGBT) modules. The junction to case thermal resistance $R_{\mathrm {thjc}}$ is considered as a critical health indicator of IGBT module solder layer. However, thermal interface materials’ (TIMs) deterioration will not only reduce the heat dissipation performance but also affects the accuracy of $R_{\mathrm {thjc}}$ monitoring of IGBT modules. This article investigates the effect of thermal grease deterioration on $R_{\mathrm {thjc}}$ monitoring of IGBT module. First, it is found that the thermal grease deterioration will lead to the decrease of monitored $R_{\mathrm {thjc}}$ of IGBT module under the same health status of IGBT solder layer, despite that the thermal resistance of TIM increasing as deterioration of the TIM takes place. That is, the same monitored increment ratio of $R_{\mathrm {thjc}}$ caused by the solder fatigue may correspond to different health status of the IGBT module, which cannot accurately reflect its actual health status. Then, a compensation strategy for thermal resistance monitoring based on the TIM aging rate is proposed, which uses the established mapping relationship to decouple the negative coupling part of TIM degradation. The compensated thermal resistance can better reflect the actual health status of the IGBT module and approximately eliminate the negative impact. Finally, the feasibility of the proposed compensation strategy is verified by finite element model (FEM) analysis and experiments. [ABSTRACT FROM AUTHOR]