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Hydraulic technology with smaller sizes and higher reliability trends, including fault prediction and intelligent control, requires high-performance temperature and pressure-integrated sensors. Current designs rely on planar wafer- or chip-level integration, which is limited by pressure range, chip size, and low reliability. We propose a small-size temperature/high-pressure integrated sensor via the flip-chip technique. The pressure and temperature units are arranged vertically, and the sensing signals of the two units are integrated into one plane through silicon vias and gold–gold bonding, reducing the lateral size and improving the efficiency of signal transmission. The flip-chip technique ensures a reliable electrical connection. A square diaphragm with rounded corners is designed and optimised with simulation to sense high pressure based on the piezoresistive effect. The temperature sensing unit with a thin-film platinum resistor measures temperature and provides back-end high-precision compensation, which will improve the precision of the pressure unit. The integrated chip is fabricated by MEMS technology and packaged to fabricate the extremely small integrated sensor. The integrated sensor is characterised, and the pressure sensor exhibits a sensitivity and sensitivity drift of 7.97 mV/MPa and −0.19% FS in the range of 0–20 MPa and −40 to 120 °C. The linearity, hysteresis, repeatability, accuracy, basic error, and zero-time drift are 0.16% FS, 0.04% FS, 0.06% FS, 0.18% FS, ±0.23% FS and 0.04% FS, respectively. The measurement error of the temperature sensor and temperature coefficient of resistance is less than ±1 °C and 3142.997 ppm/°C, respectively. The integrated sensor has broad applicability in fault diagnosis and safety monitoring of high-end equipment such as automobile detection, industrial equipment, and oil drilling platforms. [ABSTRACT FROM AUTHOR]

MEMS devices are more and more commonly used as sensors, actuators, and microfluidic devices in different fields like electronics, opto-electronics, and biomedical engineering. Traditional fabrication technologies cannot meet the growing demand for device miniaturisation and fabrication time reduction, especially when customised devices are required. That is why additive manufacturing technologies are increasingly applied to MEMS. In this review, attention is focused on the Italian scenario in regard to 3D-printed MEMS, studying the techniques and materials used for their fabrication. To this aim, research has been conducted as follows: first, the commonly applied 3D-printing technologies for MEMS manufacturing have been illustrated, then some examples of 3D-printed MEMS have been reported. After that, the typical materials for these technologies have been presented, and finally, some examples of their application in MEMS fabrication have been described. In conclusion, the application of 3D-printing techniques, instead of traditional processes, is a growing trend in Italy, where some exciting and promising results have already been obtained, due to these new selected technologies and the new materials involved. [ABSTRACT FROM AUTHOR]

Micro-Electro-Mechanical System (MEMS) switches have emerged as pivotal components in the realm of miniature electronic devices, promising unprecedented advancements in size, power consumption, and versatility. This literature review paper meticulously examines the key issues and challenges encountered in the development and application of MEMS switches. The comprehensive survey encompasses critical aspects such as material selection, fabrication intricacies, performance metrics including switching time and reliability, and the impact of these switches on diverse technological domains. The review critically analyzes the influence of design parameters, actuation mechanisms, and material properties on the performance of MEMS switches. Additionally, it explores recent advancements, breakthroughs, and innovative solutions proposed by researchers to address these challenges. The synthesis of the existing literature not only elucidates the current state of MEMS switch technology but also paves the way for future research avenues. The findings presented herein serve as a valuable resource for researchers, engineers, and technologists engaged in advancing MEMS switch technology, offering insights into the current landscape and guiding future endeavors in this rapidly evolving field. [ABSTRACT FROM AUTHOR]

In capacitive microelectromechanical system (MEMS) devices, the application of dielectric materials causes long-term charging problems in the dielectric layers or substrates, which especially affect the repeatability and stability of high-performance devices. Due to the difficulties of observation and characterization of charge accumulation, an accurate characterization method is needed to study the effect of charge and propose suppression methods. In this paper, we analyze the influence of charge accumulation on the MSRG and propose a characterization method for charge accumulation based on stiffness variation. Experiments are carried out to characterize the charge accumulation in MSRG, and the effect of temperature on the process is also investigated. In the experiment, the charge accumulation is characterized accurately by the variation of the frequency split and stiffness axes. Furthermore, the acceleration of the charge accumulation is observed at high temperatures, as is the higher additional voltage from the charge accumulation. [ABSTRACT FROM AUTHOR]

This paper presents the design, fabrication and packaging of RF MEMS switches that have CPW-converted-to-microstrip RF interface at the die level. With microstrip input and output ports the packaging of the dies become greatly simplified, doing away with the need for having off-chip matching and RF transition components inside the package. Two designs are presented, each based on a different philosophy for conversion of the inherent CPW version of the chip to microstrip planar transmission line; i) conversion to microstrip through RF matching, ii) CPW to microstrip on-chip via less transition. Detailed 3D EM simulation based studies were carried out to arrive at the final RF layouts. The switches were fabricated using the silicon on glass architecture and packaged in hermetic RF packages at 1 atm N 2 . Wafer level and post packaging test methods are described. Over the range DC to 10 GHz, the worst case packaged device insertion loss, return loss and isolation are −1.2 dB, −13 dB, −37.5 dB for the first design variant of the switch and are −1.2 dB, −11 dB and −30 dB respectively for the second design variant. The typical pull in voltage is 50 V. [ABSTRACT FROM AUTHOR]