25 results on '"Tsui, Bing-Yue"'
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2. Triple Self-Aligned Split-Gate Architecture for High-Speed Applications of 4H-SiC VDMOSFETs
3. A 4H-SiC Trench MOS Capacitor Structure for Sidewall Oxide Characteristics Measurement
4. Defect Inspection Techniques in SiC
5. Time-dependent dielectric breakdown of gate oxide on 4H-SiC with different oxidation processes
6. Metal Contact on P-Type 4H-SiC With Low Specific Contact Resistance and Micrometer-Scale Contact Area
7. A Study on the Impact of Gamma Rays Irradiation on 4H-SiC CMOSFETs
8. Investigation of Positive Bias Temperature Instability of 4H-SiC MOS Capacitors and Deep Interface States Extraction at 300°C
9. Influence of Post-Ion-Implantation Annealing Temperature on the Characteristics of Gate Oxide on 4H Silicon Carbide
10. Characterization of 4H-SiC PMOSFET with P+ Poly-Si Gate
11. A multi-contact six-terminal cross-bridge Kelvin resistor (CBKR) structure for evaluation of interface uniformity of the Ti-Al alloy/p-type 4H-SiC contact
12. Investigation of Safe Operating Area on 4H-SiC 600V VDMOSFET with TLP and UIS Test Methods
13. Improving Radiation Hardness of 4H-SiC Power Devices by Local-Oxidation of Silicon Carbide (LOCOSiC) Isolation
14. Improving Radiation Hardness of 4H-SiC Power Devices by Local-Oxidation of Silicon Carbide (LOCOSiC) Isolation
15. Design and Characterization of the Junction Isolation Structure for Monolithic Integration of Planar CMOS and Vertical Power MOSFET on 4H-SiC up to 300 °C
16. Modeling and Characterization of the Narrow-Width Effect of 4H-SiC MOSFETs With Local Oxidation of SiC Isolation
17. Bias-Induced Instability of 4H-SiC CMOS
18. Dual Gate Oxide CMOS Process on 4H-SiC
19. Design, Process, and Characterization of Complementary Metal–Oxide–Semiconductor Circuits and Six-Transistor Static Random-Access Memory in 4H-SiC
20. An Evaluation for Quality Inspection of Epitaxial Layer and Heavily-doped 4H-SiC Substrate by Simple Schottky Barrier Diode and MOS Capacitor
21. Device isolation process for 4H-SiC CMOS ICs
22. A Study on the Isolation Ability of LOCal Oxidation of SiC (LOCOSiC) for 4H-SiC CMOS Process
23. 1100 V, 22.9 mΩcm2 4H-SiC RESURF Lateral Double-Implanted MOSFET With Trench Isolation
24. A Study on the Isolation Ability of LOC al O xidation of SiC (LOCOSiC) for 4H-SiC CMOS Process.
25. 1100 V, 22.9 mΩcm 2 4H-SiC RESURF Lateral Double-Implanted MOSFET With Trench Isolation.
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