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Novel In0.12Al0.88N/AlN/AlxGa $_{1-\mathrm {x}}\text{N}$ /In0.12Al0.88N metal-oxide-semiconductor heterostructure field-effect transistors (MOS-HFETs) grown on a SiC substrate with a drain field-plate (DFP) were investigated. A symmetrically-graded AlxGa $_{1-\mathrm {x}}\text{N}$ (x = $0.32~\to ~0.1~\to ~0.32$ ) wide-gap channel with an In0.12Al0.88N back-barrier was devised to enhance the carrier confinement, channel conductivity, and breakdown characteristics. The MOS-gate structure, employing high-k Al2O3 gate dielectric and surface passivation deposited by the non-vacuum ultrasonic spray pyrolysis deposition (USPD) technique, has resulted in enhanced gate modulation and decreased gate leakage current. A control MOS-HFET (sample A) with an equivalent Al0.21Ga0.79N channel and DFP was fabricated in comparison with the present design without/with DFP (samples B1/B2). The present sample B2 (A) has demonstrated a superior maximum drain-source current density ( $I_{DS, max}$ ) of 937.4 (838.8) mA/mm, maximum extrinsic transconductance ( $g_{m, max}$ ) of 89.6 (80.6) mS/mm, on/off-current ratio ( $I_{on}/I_{off})$ of $1.8\times 10^{8}$ ( $1.3\times 10^{8}$ ), two-terminal off-state gate-drain breakdown voltage ( $BV_{GD}$ ) of −530 (−490) V, three-terminal on-state drain-source breakdown voltage ( $BV_{DS}$ ) of 520 (465) V at 300 K, and the corresponding Baliga’s figure-of-merit (BFOM) of 79.5 (39.3) MW/cm2. The present design is promising for high-voltage power-switching circuit applications.

This work reports record-high three-terminal on-state drain-source breakdown voltage $(BV_{DS})$ of −735 V in p-channel GaN metal-oxide-semiconductor heterostructure field-effect transistors (MOS-HFETs) with a drain field-plate (DFP). High-k and wide-gap Al2O3 was deposited as the gate oxide and surface passivation by using a non-vacuum ultrasonic spray pyrolysis deposition (USPD) technique. Good source/drain ohmic contacts were obtained by devising an Mg-doped p++-GaN capper. Enhanced two-dimension hole gas (2DHG) characteristics and current densities have also been achieved by the devised p-GaN/GaN/AlN/Al0.3Ga0.7N heterostructure. The present p-channel GaN MOS-HFET design with (without) DFP has demonstrated superior on/off current ratio $(I_{on}/I_{off}$ ) of $2\times 10^{6}$ ( $9.2\times10\,\,^{\mathrm{ 5}}$ ), maximum drain-source current density $(I_{DS, max})$ of −9.5 (−10.6) mA/mm at $V_{DS}\,\,=$ 20 V, two-terminal off-state gate-drain breakdown voltage $(BV_{GD})$ of 710 (520) V, and $BV_{DS}$ of −735 (−545) V, respectively. The present design is suitable for applications in high-voltage complementary power-switching circuits of electric vehicle (EV) electronics.

This work investigates, for the first time, wide-gap Al0.21Ga0.79N channel metal-oxide-semiconductor heterostructure field-effect transistors (MOS-HFETs) with In0.12Al0.76Ga0.12N barrier/buffer and drain field-plate (DFP) designs. High-k and wide-gap Al2O3 was grown as the gate oxide and surface passivation by using non-vacuum ultrasonic spray pyrolysis deposition (USPD) technique. A control device having the same epitaxial layers, except with In0.12Al0.88N barrier/buffer was studied in comparison. Enhanced spontaneous polarization effect, improved interfacial quality, and enhanced carrier confinement have been achieved by using the In0.12Al0.76Ga0.12N barrier/buffer design, which has successfully resulted in improved carrier transport, increased electron concentration, and high current densities. The present In0.12Al0.76Ga0.12N/AlN/Al0.21Ga0.79N MOS-HFET design with (without) DFP design has demonstrated superior maximum drain-source current density $(I_{DS, max})$ of >1 (>1) A/mm at $V_{DS}\,\,=$ 20 V, high saturated drain-source current density at $V_{GS}\,\,=$ 0 V $(I_{DSS0})$ of 791.1 (755) mA/mm, and low specific on-resistance $(R_{on, sp})$ of 2.83 (2.81) $\text{m}\Omega $ /cm 2. High device figure-of-merit (FOM) on $BV_{DS}^{2}/R_{on, sp}$ of 93.7 (75.4) MW/cm 2 was also obtained with the three-terminal on-state drain-source breakdown voltage $(BV_{DS})$ of 515 (460) V. The present design is promisingly advantageous to high-current and high-voltage power-switching circuit applications.

A TiO2 strip array with a thickness of 90 nm was fabricated by photolithography and physical vapor deposition. This work utilized the chemical and physical methods to fabricate the TiO2 strip array. A porous semiconductor layer made of TiO2 nanoparticles was coated on the TiO2 strip array. The TiO2 strip array has a one-dimensional protrusive structure. The energy conversion efficiency (4.38%) of a dye-sensitized solar cell (DSSC) with the TiO2 strip array exceeded that (3.20%) of a DSSC without a TiO2 strip array by 37%. In addition, this result was verified by the electrochemical impedance spectra of the two DSSCs. Therefore, the TiO2 strip array can be used to increase the energy conversion efficiencies of DSSCs. The large energy conversion efficiency of the DSSC with the TiO2 strip array arises from the large surface area of the one-dimensional protrusive structure and its specific electron transport paths. The DSSC with the TiO2 strip array has advantages of economical production cost, easy fabrication, and boosting energy conversion efficiency.