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Abstract: The recent video coding standard H.264/AVC show extremely higher coding efficiency compare to any other previous standards. H.264/AVC can achieve over 50% of bit rate saving with same quality using the rate–distortion process, but it brings high computational complexity. In this paper, we propose an algorithm that can reduce the complexity of the codec by reducing the block mode decision process adaptively. Block mode decision process in H.264/AVC consists of inter mode decision process and intra mode decision process. We deal with reduction method for inter and intra mode decision. In this paper an efficient method is proposed to reduce the inter mode decision complexity using the direct prediction methods based on block correlation and adaptive rate distortion cost threshold for early stopping. The fast intra mode reduction algorithm based on inter mode information is also proposed to reduce the computational complexity. The experimental results show that the proposed algorithm can achieve up to 63.34–77.39% speed up ratio with a little PSNR loss. Increment in bit requirement is also not much noticeable. [Copyright &y& Elsevier]

Abstract: The aim of this paper is to study multidimensional continued fraction algorithm over the field of formal power series. In the case of the Brun algorithm by using its homogenous version, we prove that it converges. [Copyright &y& Elsevier]

Abstract: In this paper we analyze O''Hara''s partition bijection. We present three type of results. First, we show that O''Hara''s bijection can be viewed geometrically as a certain scissor congruence type result. Second, we obtain a number of new complexity bounds, proving that O''Hara''s bijection is efficient in several special cases and mildly exponential in general. Finally, we prove that for identities with finite support, the map of the O''Hara''s bijection can be computed in polynomial time, i.e. much more efficiently than by O''Hara''s construction. [Copyright &y& Elsevier]

Abstract: This paper presents an algorithm for fast sorting of large lists using modern GPUs. The method achieves high speed by efficiently utilizing the parallelism of the GPU throughout the whole algorithm. Initially, GPU-based bucketsort or quicksort splits the list into enough sublists then to be sorted in parallel using merge-sort. The algorithm is of complexity , and for lists of 8 M elements and using a single Geforce 8800 GTS-512, it is 2.5 times as fast as the bitonic sort algorithms, with standard complexity of , which for a long time was considered to be the fastest for GPU sorting. It is 6 times faster than single CPU quicksort, and 10% faster than the recent GPU-based radix sort. Finally, the algorithm is further parallelized to utilize two graphics cards, resulting in yet another 1.8 times speedup. [Copyright &y& Elsevier]

Abstract: The Singular Value Decomposition (SVD) is a vital problem that finds a place in numerous application domains in science and engineering. As an example, SVDs are used in processing voluminous datasets. Many sequential and parallel algorithms have been proposed to compute SVDs. The best known sequential algorithms take cubic time. This amount of time may not be acceptable especially when the data size is large. Thus parallel algorithms are desirable. In this paper, we present a novel technique for the parallel computation of SVDs. This technique yields impressive speedups. We discuss implementation of our technique on parallel models of computing such as the mesh and the PRAM. We also present an experimental evaluation of our technique. [Copyright &y& Elsevier]

Abstract: The spatiotemporal dynamics of cortical oscillations across human brain regions remain poorly understood because of a lack of adequately validated methods for reconstructing such activity from noninvasive electrophysiological data. In this paper, we present a novel adaptive spatial filtering algorithm optimized for robust source time–frequency reconstruction from magnetoencephalography (MEG) and electroencephalography (EEG) data. The efficacy of the method is demonstrated with simulated sources and is also applied to real MEG data from a self-paced finger movement task. The algorithm reliably reveals modulations both in the beta band (12–30 Hz) and high gamma band (65–90 Hz) in sensorimotor cortex. The performance is validated by both across-subjects statistical comparisons and by intracranial electrocorticography (ECoG) data from two epilepsy patients. Interestingly, we also reliably observed high frequency activity (30–300 Hz) in the cerebellum, although with variable locations and frequencies across subjects. The proposed algorithm is highly parallelizable and runs efficiently on modern high-performance computing clusters. This method enables the ultimate promise of MEG and EEG for five-dimensional imaging of space, time, and frequency activity in the brain and renders it applicable for widespread studies of human cortical dynamics during cognition. [Copyright &y& Elsevier]

Abstract: This paper describes a complex scene rendering system that it can comprehensively render larger and more complex 3D scenes in a form of output-sensitive way by means of using distributed visibility culling technique. The process of the proposed visibility calculations is explicitly divided into two distinct phases, one is preprocessing stage, and the other is on-the-fly stage. At the preprocessing stage, the whole scene is partitioned into numerous regions, namely spatial cells, by adopting BSP tree algorithm. Accordingly, the complexity weight of each cell is estimated in advance depending on the number of geometric polygons within the cell. Afterwards we find out possible occluders in each cell for accelerating the real-time occlusion culling at run time. Moreover, instant visibility is taken into account to quickly calculate the tight potentially visible set (PVS) which is valid for several frames during the on-the-fly phase. As dynamic load balancing algorithm is concerned, we employ the cell arrangement mechanism to dynamically assign a specific amount of service demand to each calculating machine. The amount of service demand is estimated when a calculating machine is dynamically inserted into or removed from the distributed calculating cluster. Finally, after the drawing machines gather the PVS results from every calculating machine, they render the scene for users to view it on the next frames. From the simulation results, we can see that the proposed real-time walkthrough environment takes good advantage of the distributed visibility culling technique for displaying large, complex 3D scenes in real time and gets rid of a troublesome computation delay problem. [Copyright &y& Elsevier]

Abstract: This paper presents a real-time implementation of Motion-JPEG2000 encoder using a fixed-point DSP chip. Among several modules in JPEG2000 encoder, the lifting algorithm for discrete wavelet transform (DWT) and the embedded block coding with optimized truncation (EBCOT) comprise more than 85% of the encoding complexity. Thus, it is very important to design and optimize these two modules in order to increase the performance of the hardware implementation. First we propose an overlapped block transferring (OBT) method that can significantly improve the performance of the lifting algorithm for DWT by increasing the cache hit rate. We show that the execution time of the lifting scheme can be further reduced by programming the DSP software using the single instruction multiple data (SIMD) instructions and the super scalar pipeline structure. Moreover, we introduce a parallel-pass method for fast implementation of EBCOT. This method reduces the processing time of EBCOT by processing the three coding passes of the same bit-plane in parallel. Experimental results show that our developed Motion-JPEG2000 DSP system meets the common requirement of the real-time video coding [30 frames/s (fps)] and is proven to be a practical and efficient DSP solution. [Copyright &y& Elsevier]