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This article proposes a systematic synthesis method to identify the optimum converter topology for a specified voltage conversion ratio. This gain-oriented converter synthesis is formulated as an inverse problem around the inductor flux balance equations. The proposed synthesis method consists of two processes. A set of distinct converter topologies is first synthesized from the specified voltage conversion ratio by obtaining the solutions for a set of six inverse equations in twelve unknowns. The optimal topology for any intended application can be identified based on the desired performance metrics. The complete synthesis method is illustrated with quadratic buck–boost gain as an example. In total, 25 distinct topologies are synthesized using the first process, and their feasibility is validated by PLECS simulation. In total, three case studies are reported to explain the second process. Ground-referenced output and the minimum number of switches are used as the first two selection criteria in all the case studies. Minimum peak inductor current, minimum component stress factor, and minimum voltage and current stress are the third selection criterion in Case Studies-1, 2, and 3, respectively. The steady-state operations of two optimal converters selected in Case Study-1 were verified experimentally. [ABSTRACT FROM AUTHOR]

This article presents an analytical method to derive an optimum converter topology for a specified voltage conversion ratio (G). An optimum topology for any given G can be identified after obtaining the comprehensive pool of converter topologies. This gain-oriented converter synthesis is formulated as an inverse problem around the principle of inductor flux balance. A step-by-step method is proposed to solve the inverse problem and obtain a comprehensive set of non-redundant converter topologies for any given voltage conversion ratio. Consequently, the number of possible converter topologies for a specified voltage conversion ratio is also identified. The optimum converter topology is chosen from the comprehensive set based on three selection criteria, viz., ground-referenced output, a minimum number of switches, and minimum peak inductor current. The proposed solution methodology is illustrated with quadratic boost and quadratic buck gains as case studies. A comprehensive set of non-redundant topologies is identified in both cases. The steady-state operations of all the topologies are studied with PLECS simulation. Based on the selection criteria, an optimum topology is selected in each case, and their steady-state operation is verified experimentally using lab-developed prototypes. [ABSTRACT FROM AUTHOR]

Nonisolated dc–dc converters are fundamental building blocks in the power supply for a wide range of applications. To cater to this heterogeneity in applications, development of dc–dc converters with suitable voltage conversion ratio (G) is imperative. Given a converter topology, G can be found out uniquely by using the principle of inductor volt-second balance, and the process of obtaining the voltage conversion ratio from the topology is simple. In contrast, the inverse problem, i.e., the process of obtaining the converter topology for a given voltage conversion ratio (G) is a challenging task, and the obtained topology is also not unique. This article presents a simple method to obtain a family of converter topologies from a required voltage conversion ratio. This method utilizes the principle of inductor flux balance as a synthesis tool. The step-by-step procedure to synthesize the converter topologies is outlined. To illustrate the efficacy of the proposed method, it is applied to synthesize various quadratic buck–boost topologies, and a family of converters is identified. Operation and feasibility of two novel topologies, identified by the proposed theory, are verified experimentally. [ABSTRACT FROM AUTHOR]

The inverse problem for the dc–dc converters refers to synthesizing converter topologies from a specified voltage gain expression. Though the flux balance principle is widely used in the analysis of dc–dc converters, its application as a synthesis tool has not been explored. This letter describes a mathematical approach to synthesize converter topologies from a required voltage gain expression by utilizing the principle of inductor flux balance. At first, the general form of gain expression for second-order converters is derived. From the general form of gain expression, the inverse problem is formulated by identifying the governing equations. The mathematical formulation of the inverse problem and highlighting challenges involved in solving it are the primary subjects of this article. To outline these challenges, a probable solution strategy of this inverse problem is presented. In order to derive a converter topology, at first, the appropriate flux balance equations are determined, and then the circuit topology is derived to establish the required flux balance. In contrast to the forward problem, the solution to the inverse problem is neither direct nor unique. Hence, getting the optimum closed-form solution to this inverse problem is an open-ended challenge with many possible approaches. [ABSTRACT FROM AUTHOR]

This paper describes a theory to synthesize nonisolated dc–dc converters. It uses the fundamental flux balance equation across the inductors of a converter as a starting point in this synthesis process. The flux balance equations are the linear equations of the input voltage, capacitor voltages, and duty cycle (D). The coefficients of these linear equations can be selected from a finite set of choices. These choices define the converter topologies that are subsequently used to synthesize a converter. The synthesis procedure applies to a converter of multiple order. All the possible converters are identified for a first-order topology. In the case of second-order converters, all the choices of the flux balance equation are defined. Based on these choices, three new quadratic topologies are derived and verified to demonstrate the effectiveness of the theory. The procedure to synthesize a converter from a given voltage conversion ratio is also outlined. [ABSTRACT FROM AUTHOR]

Due to the pulsating power at the inverter output terminals, the passive storage elements of the boost stage of the current-fed switched inverter (CFSI) contain a power frequency harmonic component (100 Hz), apart from dc and switching frequency components. In prior designs, the second harmonic component is suppressed by increasing the size of the input filter inductor and capacitor or by using additional circuits. This paper presents a complete characterization of a control-based approach to suppress the power frequency harmonic component in the input inductor current of a CFSI. It also presents a comprehensive characterization of the harmonic power redistribution. Using the proposed approach, it is demonstrated that the inductor value of a CFSI is reduced by 61% for the same peak-to-peak ripple. This leads to an improvement in the conversion ratio, efficiency, and power density of the overall converter. A SiC MOSFET-based CFSI with 75-kHz switching frequency is used to verify the proposed design philosophy. [ABSTRACT FROM AUTHOR]

Impedance source inverters (ISIs) are gaining attention due to features such as single-stage conversion, buck-boost capability, and inherent shoot-through protection. To maintain the required ac output voltage, typically ISIs are operated at a higher dc-link voltage due to constrained modulation index. This also increases voltage stress across capacitors and switches of the converter. This voltage stress is approximately double compared to that of voltage source inverter with preboost stage (Boost-VSI). To mitigate this problem, a new pulsewidth modulation (PWM) scheme for the active-front-end based ISIs (AFE-ISIs) is proposed. The proposed scheme enables the ISIs to produce high ac gain with lower voltage stress across the capacitor and switches. In other words, the proposed scheme blends the advantages of Boost-VSI into ISIs. With the new PWM scheme, there are also reductions in output voltage total harmonic distortion, switching frequency ripple in the inductor current, and power loss in the converter. A prototype of the current-fed switched inverter, an AFE-ISI, is designed, and the proposed PWM scheme is implemented. Experimental results obtained are in accordance with the proposed theory and show that the voltage stress has reduced from 325 V to 203 V for an ac output of 110 V. [ABSTRACT FROM AUTHOR]

The Z-source inverter (ZSI) employs an LC impedance network between the main inverter bridge and the power source. The unique feature of the ZSI is that it can operate either in buck or boost mode with a wide range of obtainable output voltages from a given input voltage. This topology also exhibits better electromagnetic-interference noise immunity when compared to a traditional voltage-source inverter (VSI). However, the LC impedance network of ZSI significantly increases the size and cost of the power converter and can make it unsuitable for low-power applications. This paper proposes a novel topology called switched boost inverter (SBI) which exhibits similar advantages of ZSI with lower number of passive components and more active components compared to ZSI. The steady-state and small-signal analyses of SBI, along with its pulsewidth modulation (PWM) control strategies, have been discussed in this paper. This paper also presents a comparison of SBI and ZSI with the same input and output parameters. The theoretical analysis given in this paper has been validated using a laboratory prototype of SBI, and the experimental results are presented for verification. The experimental harmonic spectrum of the inverter's output voltage with the proposed PWM technique is also plotted and compared with that of a traditional VSI. All the experimental results show good correlation between theory and experiments. [ABSTRACT FROM PUBLISHER]

Switched boost inverter (SBI) is a single-stage power converter derived from Inverse Watkins Johnson topology. Unlike the traditional buck-type voltage source inverter (VSI), the SBI can produce an ac output voltage that is either greater or less than the available dc input voltage. Also, the SBI exhibits better electromagnetic interference noise immunity when compared to the VSI, which enables compact design of the power converter. Another advantage of SBI is that it can supply both dc and ac loads simultaneously from a single dc input. These features make the SBI suitable for dc nanogrid applications. In this paper, the SBI is proposed as a power electronic interface in dc nanogrid. The structure and advantages of the proposed SBI-based nanogrid are discussed in detail. This paper also presents a dq synchronous-reference-frame-based controller for SBI, which regulates both dc and ac bus voltages of the nanogrid to their respective reference values under steady state as well as under dynamic load variation in the nanogrid. The control system of SBI has been experimentally validated using a 0.5-kW laboratory prototype of the SBI supplying both dc and ac loads simultaneously, and the relevant experimental results are given in this paper. The low cross regulation and the dynamic performance of the control system have also been verified experimentally for a 20% step change in either dc or ac load of SBI. These experimental results confirm the suitability of the SBI and its closed-loop control strategy for dc nanogrid applications. [ABSTRACT FROM AUTHOR]