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[Resumen] Este artículo presenta el diseño de una arquitectura particionada de criticidad mixta aplicada a un prototipo de vehículo autónomo en el contexto del transporte público. La movilidad inteligente, sostenible y segura es una meta aún no alcanzada, por ello este artículo propone una solución basada en un sistema ciberfísico (CPS). El CPS emula las capacidades del vehículo autónomo, incluyendo la recopilación de datos del entorno, su procesamiento en tiempo real y la toma de decisiones y de acciones mediante los actuadores de este. El principal problema que se presenta en sistemas mixtos son las posibles interferencias causadas por los diferentes niveles de criticidad de las tareas. Se propone como solución el uso del particionado, buscando aprovechar el rendimiento del multiprocesador, aumentar la seguridad y reducir costes en el proceso., [Abstract] This paper presents the design of a partitioned mixed-criticality architecture applied to an autonomous vehicle prototype in the context of public transportation. Intelligent, sustainable and safe mobility is a goal not yet achieved, therefore this paper proposes a solution based on a cyber-physical system (CPS). The CPS emulates the capabilities of the autonomous vehicle, including collecting data from the environment, processing it in real time, and making decisions and taking actions through its actuators. The main problem encountered in mixed systems is the possible interferences caused by different levels of task criticality. The use of partitioning is proposed as a solution, seeking to take advantage of multiprocessor performance, increase security and reduce process costs.

[Resumen] En este trabajo se propone y evalúa una nueva política de planificación en sistemas multinúcleo de tiempo real. La planificación combinada trata de establecer una nueva estrategia de planificación que reduzca los cambios de contexto y las interferencias generadas con el uso de recursos compartidos entre los núcleos. Esta estrategia se basa en la idea de elegir la mejor política para un determinado intervalo de ejecución durante todo el plan. El resultado es una planificación de tareas implementada con diferentes políticas como EDF (Earliest Deadline First) o DM (Deadline Monotonic) y variantes de las mismas. Se ha evaluado la propuesta con diferente número de núcleos y carga obteniendo mejoras con respecto al uso de un solo planificador en todo el horizonte de ejecución., [Abstract] This paper proposes and evaluates a new scheduling policy for real-time multicore systems. Combined scheduling tries to establish a new scheduling strategy that reduces context switches and interferences generated by the use of shared resources between cores. This strategy is based on the idea of choosing the best policy for a given execution interval throughout the plan. The result is a task scheduling implemented with different policies such as EDF (Earliest Deadline First) or DM (Deadline Monotonic) and variants of them. The proposal has been evaluated with different number of cores and load, obtaining improvements with respect to the use of a single scheduler over the entire execution horizon.

[Resumen] Con los avances en la industria 4.0 y la transformación digital, es indispensable lograr la comunicación entre los distintos dispositivos que conforman la planta industrial. Sin embargo, esta orientación a la interoperabilidad de los productos que a nivel de dispositivos como los PLC’s está generalizada, no lo es tanto en el ámbito de los robots. En este caso muchos de robots móviles trabajan con la arquitectura de software ROS en la actualidad, un middleware de código abierto que maneja los datos de control del robot a nivel local, y en el caso de los robots industriales es bastante generalizado el uso de protocolos propietarios. En este artículo se propone una solución que emplea el estándar de comunicaciones OPC UA para hacer accesibles los datos de dispositivos con arquitectura de software ROS a un nivel superior de control de la planta industrial, facilitando así la integración de los datos de los robots en aplicaciones de supervisión, y dando también cabida a la interoperabilidad por medio del uso de los datos en el servidor., [Abstract] With the advances in Industry 4.0 and digital transformation, it is essential to achieve communication between the different devices that make up the industrial plant. However, this focus on product interoperability, which is widespread at the level of devices such as PLCs, is not so widespread in the field of robots. In this case, many mobile robots currently work with the ROS software architecture, an open-source middleware that manages the robot's control data locally, and in the case of industrial robots, the use of proprietary protocols is quite widespread. This paper proposes a solution that uses the OPC UA communications standard to make data from devices with ROS software architecture accessible to a higher level of industrial plant control, thus facilitating the integration of robot data into supervisory applications, and also enabling interoperability through the use of server-side data.

[EN] Embedded systems used in critical systems, such as aeronautics, have undergone continuous evolution in recent years. In this evolution, many of the functionalities offered by these systems have been adapted through the introduction of network services that achieve high levels of interconnectivity. The high availability of access to communications networks has enabled the development of new applications that introduce control functions with higher levels of intelligence and adaptation. In these applications, it is necessary to manage different components of an application according to their levels of criticality. The concept of "Industry 4.0" has recently emerged to describe high levels of automation and flexibility in production. The digitization and extensive use of information technologies has become the key to industrial systems. Due to their growing importance and social impact, industrial systems have become part of the systems that are considered critical. This evolution of industrial systems forces the appearance of new technical requirements for software architectures that enable the consolidation of multiple applications in common hardware platforms-including those of different criticality levels. These enabling technologies, together with use of reference models and standardization facilitate the effective transition to this approach. This article analyses the structure of Industry 4.0 systems providing a comprehensive review of existing techniques. The levels and mechanisms of interaction between components are analyzed while considering the impact that the handling of multiple levels of criticality has on the architecture itself-and on the functionalities of the support middleware. Finally, this paper outcomes some of the challenges from a technological and research point of view that the authors identify as crucial for the successful development of these technologies.

[EN] In hard real-time embedded systems, switching to multicores is a step that most application domains delay asmuch as possible. This is mainly due to the number of sources of indeterminism, which mainly involve sharedhardware resources, such as buses, caches, and memories. In this paper, a new task model that considersthe interference that task execution causes in other tasks running on other cores due to memory contentionis proposed. We propose a scheduling algorithm that calculates the exact interference. We also analyse andcompare existing partitioning algorithms and propose three strategies to allocate tasks to cores to schedule asmany tasks as possible and minimise total interference.

With the ever-increasing industrial demand for bigger, faster and more efficient systems, a growing number of cores is integrated on a single chip. Additionally, their performance is further maximized by simultaneously executing as many processes as possible. Even in safety-critical domains like railway and avionics, multicore processors are introduced, but under strict certification regulations. As the number of cores is continuously expanding, the importance of cost-effectiveness grows. One way to increase the cost-efficiency of such a System on Chip (SoC) is to enhance the way the SoC handles its power consumption. By increasing the power efficiency, the reliability of the SoC is raised because the lifetime of the battery lengthens. Secondly, by having less energy consumed, the emitted heat is reduced in the SoC, which translates into fewer cooling devices. Though energy efficiency has been thoroughly researched, there is no application of those power-saving methods in safety-critical domains yet. The EU project SAFEPOWER (Safe and secure mixed-criticality systems with low power requirements) targets this research gap and aims to introduce certifiable methods to improve the power efficiency of mixed-criticality systems. This article provides an overview of the SAFEPOWER reference architecture for low-power mixed-criticality systems, which is the most important outcome of the project. Furthermore, the application of this reference architecture in novel railway interlocking and flight controller avionic systems was demonstrated, showing the capability to achieve power savings up to 37%, while still guaranteeing time-triggered task execution and time-triggered NoC-based communication., QC 20210616

[Resumen] En sistemas de tiempo real y, en general, en sistemas críticos, hay una tendencia en alza en utilizar aplicaciones con diferentes niveles de criticidad. Las soluciones basadas en hipervisores son una forma de implementar sistemas de criticidad mixta ya que proporcionan aislamiento temporal y espacial. Sin embargo, la ejecución de una partición puede ser afectada por la ejecución en otros núcleos, lo que se conoce comúnmente como interferencias, poniendo en peligro la ejecución en el tiempo especificado. En este artículo se intenta contribuir dando soluciones realistas a este problema. Se propone una solución de control de la planificación con dos controladores al nivel del hipervisor. Uno de los controladores está orientado a limitar el uso de recursos compartidos a través de la limitación en el uso de los buses en los núcleos no críticos. El otro controlador mide la actividad del núcleo crítico y tomas decisiones sobre la ejecución de los núcleos no críticos.

[EN] Partitioned architectures isolate software components into independent partitions whose execution will not interfere with other partitions, preserving temporal and spatial isolation. Hierarchical scheduling can effectively be used to schedule these systems. Schedulability analysis of hierarchical real-time systems is based on prior knowledge of the local and the global scheduling algorithms. In a partitioned system with safety and security issues and certification assurance levels, global scheduling is usually generated using a static table. Therefore, each partition must allocate task jobs only in the temporal windows reserved for that partition. Even if the static table can come originally from a periodic server or other scheduling policy, the final plan may be modified due to changes in the system requirements. As a consequence, the CPU assignment to a partition does not have to correspond to any known policy. In this case, it is not possible to use existing scheduling analysis for hierarchical systems. This paper studies a new scheduling problem: a hierarchical system in which global policy is not known but provided as a set of arbitrary time windows.

[Resumen] Actualmente, las aplicaciones embebidas se consideran de complejidad creciente y, como consecuencia, de mayor dificultad para su desarrollo y validación. Debido a estas características, existe un gran interés en ejecutar múltiples aplicaciones sobre una única plataforma (mono o multinúcleo). En los sistemas de tiempo real, cada vez más se ejecutan aplicaciones con diferentes niveles de criticidad donde múltiples componentes con diferentes restricciones de tiempo real se integran en una misma plataforma computacional. Al mismo tiempo en el que proliferan los sistemas de criticidad mixta, la plataforma computacional está migrando de mono núcleo a multinúcleo. El presente trabajo describe la planificación de sistemas particionados multinúcleo, desde la asignación de tareas a núcleos hasta la generación de la planificación para cada procesador.