31 results on '"Duarte, Rui Policarpo"'
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2. Designing Hardware/Software Systems for Embedded High-Performance Computing
3. Fault-Tolerant Architecture for On-board Dual-Core Synthetic-Aperture Radar Imaging
4. Algorithm-Specific Optimizations for On-Board Real-Time Backprojection on FPGA
5. Variation-Aware Optimisation for Reconfigurable Cyber-Physical Systems
6. CardioWheel: ECG Biometrics on the Steering Wheel
7. A Unified Framework for Over-Clocking Linear Projections on FPGAs under PVT Variation
8. Energy-Efficient and Real-Time Wearable for Wellbeing-Monitoring IoT System Based on SoC-FPGA
9. Variation-Aware Optimisation for Reconfigurable Cyber-Physical Systems
10. A Review of Synthetic-Aperture Radar Image Formation Algorithms and Implementations: A Computational Perspective
11. On-Board Processing of Synthetic-Aperture Radar Backprojection Algorithm in FPGA
12. CardioWheel: ECG Biometrics on the Steering Wheel
13. Reconfigurable Embedded Architectures for On-Board Synthetic-Aperture Radar Processing
14. Configurable Hardware Core for IoT Object Detection
15. Coarse-Grained Reconfigurable Computing with the Versat Architecture
16. Moving Deep Learning to the Edge
17. Stochastic Theater: Stochastic Datapath Generation Framework for Fault-Tolerant IoT Sensors
18. On the Feasibility of GPON Fiber Light Energy Harvesting for the Internet of Things
19. Fast Convolutional Neural Networks in Low Density FPGAs Using Zero-Skipping and Weight Pruning
20. Embedded Fault-Tolerant Accelerator Architecture for Synthetic-Aperture Radar Backprojection
21. Stochastic Processors on FPGAs to Compute Sensor Data Towards Fault-Tolerant IoT Systems
22. Parallel dot-products for deep learning on FPGA
23. XtokaxtikoX: A stochastic computing-based autonomous cyber-physical system
24. A hybrid ASIC/FPGA fault-tolerant artificial pancreas
25. ARC 2014 Over-Clocking KLT Designs on FPGAs under Process, Voltage, and Temperature Variation
26. Enhancing stochastic computations via process variation
27. Zero-latency datapath error correction framework for over-clocking DSP applications on FPGAs
28. Over-clocking of Linear Projection Designs through Device Specific Optimisations
29. Pushing the performance boundary of linear projection designs through device specific optimisations (abstract only)
30. Enhancing stochastic computations via process variation.
31. High-level linear projection circuit design optimization framework for FPGAs under over-clocking
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