40 results on '"Temes, G. C."'
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2. Bandpass Delta Sigma A/D convertor using two-path multibit structure
3. Multibit sigma-delta modulator with reduced sensitivity to DAC nonlinearity
4. Multibit oversampled Sigma-Delta A/D convertor with nonuniform quantisation
5. Low-phase-error offset-compensated switched-capacitor integrator
6. A double-sampled low-distortion cascade ΔΣ modulator with an adder/integrator for WLAN application
7. A 63 dB 16 mW 20 MHz BW double-sampled ΔΣs analog-to-digital converter with an embedded-adder quantizer
8. High-speed ADC with error correction
9. Part 2: Design, Simulation Techniques, and Architectures for Oversampling Converters: Architectures for High-Order Multibit ΣΔ Modulators.
10. Part 2: Design, Simulation Techniques, and Architectures for Oversampling Converters: DIGITALLY CORRECTED MULTI-BIT ΣΔ DATA CONVERTERS.
11. High-linearity SAR-VCO MASH ΔΣ ADC with second-order noise shaping.
12. Multi-step capacitor-splitting SAR ADC.
13. Comparator-based buffer with resistive error correction.
14. Low-power parasitic-insensitive switched-capacitor integrator for delta-sigma ADCs.
15. Two-step split-junction SAR ADC.
16. Double-sampled ΔΣ modulator with relaxed feedback timing.
17. Dynamic biasing scheme for high-speed/ low-power switched-capacitor stages.
18. Enhanced split-architecture Δ-Σ ADC.
19. Noise-shaped filter implementation.
20. Power efficient noise-coupled ΔΣ ADC with simple delay cells.
21. Wide-band high-accuracy ΔΣ ADC using segmented DAC with DWA and mismatch shaping.
22. Fully passive third-order noise shaping SAR ADC.
23. Passive switched-capacitor filter with complex poles for high-speed applications.
24. GaAs Differential Amplifiers
25. Efficient technique for excess loop delay compensation in continuous-time ▵ ∑ modulators.
26. Two-step incremental analogue-to-digital converter.
27. Noise-shaping SAR ADC using three capacitors.
28. Accuracy-enhanced switched-capacitor stages using low-gain opamps.
29. Multi-step extended-counting analogue-todigital converters.
30. High-precision switched-capacitor integrator using low-gain opamp.
31. Part 2: Design, Simulation Techniques, and Architectures for Oversampling Converters: MULTIBIT OVERSAMPLED Σ-Δ A/D CONVERTOR WITH DIGITAL ERROR CORRECTION.
32. Switched-R tuning technique for Gm-C filters.
33. Power-up calibration techniques for double-sampling ΔΣ modulators.
34. Improved architecture for low-distortion ΔΣ ADCs.
35. Noise-coupled continuous-time delta-sigma ADCs.
36. Single-loop ΔΣ modulator with extended dynamic range.
37. Efficient floating double-sampling integrator for ΔΣ ADCs.
38. Noise-coupled ΔΣ ADCs.
39. Split-set data weighted averaging.
40. High-speed ΔΣ ADC with error correction.
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