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Your search keyword '"Zheng, Zheyang"' showing total 200 results
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200 results on '"Zheng, Zheyang"'

1. Lattice-aligned gallium oxynitride nanolayer for GaN surface enhancement and function extension

Author

Chen, Junting, Zhao, Junlei, Feng, Sirui, Zhang, Li, Cheng, Yan, Liao, Hang, Zheng, Zheyang, Chen, Xiaolong, Gao, Zhen, Chen, Kevin J., and Hua, Mengyuan

Subjects
Physics - Applied Physics, Condensed Matter - Materials Science
Abstract

Gallium nitride (GaN), as a promising alternative semiconductor to silicon, is of well-established use in photoelectronic and electronic technology. However, the vulnerable GaN surface has been a critical restriction that hinders the development of GaN-based devices, especially regarding device stability and reliability. Here, we overcome this challenge by converting the GaN surface into a gallium oxynitride (GaON) epitaxial nanolayer through an in-situ two-step "oxidation-reconfiguration" process. The oxygen plasma treatment overcomes the chemical inertness of the GaN surface, and the sequential thermal annealing manipulates the kinetic-thermodynamic reaction pathways to create a metastable GaON nanolayer with wurtzite lattice. This GaN-derived GaON nanolayer is a tailored structure for surface reinforcement and possesses several advantages, including wide bandgap, high thermodynamic stability, and large valence band offset with GaN substrate. These enhanced physical properties can be further leveraged to enable GaN-based applications in new scenarios, such as complementary logic integrated circuits, photoelectrochemical water splitting, and ultraviolet photoelectric conversion, making GaON a versatile functionality extender., Comment: 13 pages, 6 figures, submitted under review

Published
2022

2. Comparing Machine and Human Learning in a Planning Task of Intermediate Complexity

Author

Zheng, Zheyang (Sam), Lin, Xinlei (Daisy), Topping, Jake, and Ma, Wei Ji

Subjects
Artificial Intelligence, Cognitive Neuroscience, Learning, Machine learning, Other, Comparative Analysis, Comparative Studies, Neural Networks
Abstract

Deep reinforcement learning agents such as AlphaZero have achieved superhuman strength in complex combinatorial games. By contrast, the cognitive science of planning has mostly focused on simple tasks for experimental and computational tractability. Using a board game that strikes a balance between complexity and tractability, we find that AlphaZero agents improve in value function quality and planning depth through learning, similar to human in previous modeling work. In addition, these metrics reflect causal contributions to AlphaZero's playing strength. Yet the strongest contributor is the policy quality. The decrease in policy entropy also drives the increase in planning depth. The contribution of planning depth to performance is lessened in late training. These results contribute to a joint understanding of machine and human planning, providing an interpretable way of understanding the learning and strength of AlphaZero, while generating novel hypothesis on human planning.

Published
2022

10. HyFET—A GaN/SiC Hybrid Field-Effect Transistor

Author

Feng, Sirui, primary, Zheng, Zheyang, additional, Wang, Yuru, additional, Lyu, Gang, additional, Liu, Kai, additional, Cheng, Yan, additional, Chen, Junting, additional, Chen, Tao, additional, Zhang, Li, additional, Song, Wenjie, additional, Liao, Hang, additional, Ng, Yat Hon, additional, Hua, Mengyuan, additional, Cheng, Kai, additional, Wei, Jin, additional, and Chen, Kevin J., additional

Published
2023
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15. Interfacial band parameters of ultrathin ALD–Al2O3, ALD–HfO2, and PEALD–AlN/ALD–Al2O3 on c-plane, Ga-face GaN through XPS measurements.

Author

Gong, Jiarui, Zheng, Zheyang, Vincent, Daniel, Zhou, Jie, Kim, Jisoo, Kim, Donghyeok, Ng, Tien Khee, Ooi, Boon S., Chen, Kevin J., and Ma, Zhenqiang

Subjects
*QUANTUM tunneling, *HETEROJUNCTION bipolar transistors, *SURFACE passivation, *ATOMIC layer deposition, *X-ray photoelectron spectroscopy, *TRANSISTORS
Abstract

Ultrathin oxides (UOs) and ultrathin nitrides (UNs) play a crucial role in forming lattice-mismatched semiconductor heterostructures that are fabricated by using semiconducting grafting approach. The grafting approach has shown its great potential to realize GaN-based heterojunction bipolar transistors by fulfilling the missing high-performance p-type nitrides with other p-type semiconductors. A handful of UO and UN dielectrics readily available by atomic layer deposition (ALD) satisfy the requirements of double-sided surface passivation and quantum tunneling for semiconductor grafting. Due to the states existing between the UO or UN conduction band and that of the GaN, the ALD deposited UO or UN layer can generate significant effects on the surface band-bending of GaN. Understanding the band parameters of the interface between UO or UN and c-plane Ga-face GaN can guide the selection of interfacial dielectrics for grafted GaN-based devices. In this study, we performed x-ray photoelectron spectroscopy measurements to obtain the band-bending properties on c-plane, Ga-face GaN samples coated by different ALD cycles of ultrathin-HfO2 or ultrathin AlN. The valence band spectra of GaN coated with ultrathin-ALD–Al2O3, ALD–HfO2, or PEALD–AlN/ALD–Al2O3 were further analyzed to calculate the valence and conduction band offsets between the ALD dielectrics and the Ga-face GaN under different thicknesses and post-deposition annealing conditions of the dielectrics. [ABSTRACT FROM AUTHOR]

Published
2022
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17. Gate Driver Design for SiC Power MOSFETs With a Low-Voltage GaN HEMT for Switching Loss Reduction and Gate Protection

Author

Shu, Ji, Sun, Jiahui, Zheng, Zheyang, and Chen, Kevin J.

Abstract

The design of gate drivers for silicon carbide (SiC) power mosfets needs to address various adverse effects induced by the parasitic inductance in the gate loop, such as false turn-on, gate overstress, and reduced switching speed. In this work, a single-polarity gate driver design featuring a low-voltage (LV) gallium nitride (GaN) high-electron-mobility transistor (HEMT) for Miller clamping is presented. The lateral LV GaN HEMT can switch at a much higher speed than that of the SiC mosfet, so that the proposed gate driver can well suppress false turn-on with a user-friendly off-state gate voltage of 0 V. Meanwhile, the reverse-conduction characteristics of the LV GaN HEMT allow the clamping of negative voltage spikes to protect the SiC mosfet against gate overstress, which is shown to be detrimental to the gate reliability. In addition, the LV GaN HEMT can accelerate the turn-off process and suppress the gate-loop oscillation, thereby further reducing the switching loss, as verified by experiment results.

Published
2024
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18. Characteristics and Evaluation Approaches of Human-Body-Model Electrostatic Discharge Across Schottky p-GaN Gate HEMTs

Author

Sun, Jiahui, Zheng, Zheyang, Zhang, Li, and Chen, Kevin J.

Abstract

The human-body-model (HBM) electrostatic discharge (ESD) robustness can be directly evaluated through the ESD simulator designed for product qualification or indirectly by the transmission line pulse (TLP) I–V system. Although the TLP test can be used to estimate drain-to-source HBM ESD robustness of Si mosfets, it causes misleading estimation for GaN HEMTs. To understand this miscorrelation, the behaviors of 100-V Schottky-type p-GaN gate HEMTs and Si mosfets under HBM ESD tests are characterized and compared in this work, especially the rise time (tR) of terminal voltages in the devices. In drain-to-source ESD of the Si mosfet and gate-side ESD of the GaN HEMT, the high leakage current and the device voltage clamping result in short tR (∼10 ns) and strong ESD robustness. In most other HBM ESD tests, the two devices behave like variable capacitors with long tR (>100 ns) due to the insignificant leakage current. Moreover, the breakdown voltage of GaN HEMTs is dependent on the voltage stress time. Since the appropriate HBM–TLP correlation is based on the assumption of short tR and weak time dependence of device breakdown, the TLP I–V test is not suitable for HBM ESD robustness evaluation of GaN HEMTs. Instead, a more accurate and simpler estimation of HBM ESD robustness can be realized by a versatile pulse I–V system with adjustable tR.

Published
2024
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19. GaN Power Integration Technology and Its Future Prospects

Author

Wei, Jin, Zheng, Zheyang, Tang, Gaofei, Xu, Han, Lyu, Gang, Zhang, Li, Chen, Junting, Hua, Mengyuan, Feng, Sirui, Chen, Tao, and Chen, Kevin J.

Abstract

The planar nature of the GaN heterojunction devices provides extended dimensions for implementing monolithic power integrated circuits. This article presents a comprehensive review of the advancements in GaN power integration. Basic building blocks in a power integration platform based on p-GaN gate HEMT technology are discussed, including high- and low-voltage transistors, lateral field-effect rectifiers, resistors, and capacitors. Exemplary designs of monolithic gate driving circuit and detection/protection circuits based on this platform are demonstrated. Technologies to address other challenges, including the lack of mature complementary logic (CL) and the substrate-induced crosstalk effect, are also demonstrated. More forward-looking development of power integration based on wide bandgap semiconductors is also presented in a hybrid GaN/SiC field-effect transistor that is expected to harness the complementary merits of GaN and SiC, and ON-chip GaN-based nonvolatile memory device that could provide versatile intelligence.

Published
2024
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20. Gate Characteristics of Enhancement-Mode Fully Depleted p-GaN Gate HEMT

Author

Sun, Jiahui, Mouhoubi, Samir, Silvestri, Marco, Zheng, Zheyang, Ng, Yat Hon, Shu, Ji, Chen, Kevin J., and Curatola, Gilberto

Abstract

The conventional ${p}$ -GaN in Schottky-type ${p}$ -GaN gate HEMTs is converted into an insulator-like ${p}$ -GaN, i.e., fully depleted ${p}$ -GaN in the reverse-biased Schottky junction under forward gate bias ( ${V}_{\text {GS}}$ ), by inadequate activation of Mg. Consequently, the gate current ( ${I}_{\text {G}}$ ) is reduced by 3–5 orders of magnitude at ${V}_{\text {GS}}$ of 7-V over a temperature range of 25 °C–150 °C, compared with devices adopting conventional adequate activation. The fully depleted ${p}$ -GaN converts the current-balance-based forward ${V}_{\text {GS}}$ division in the conventional partially depleted ${p}$ -GaN gate stack, into thickness-based voltage division in ${p}$ -GaN and AlGaN between gate and channel, which is like that in a MIS (metal-insulator-semiconductor) gate. As a result, the hole current through the Schottky junction is significantly reduced while the electron spillover current starts to dominate at high forward ${V}_{\text {GS}}$ . Besides, hot carriers are excluded from the forward gate breakdown mechanism.

Published
2023
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21. GaN Power Integration Technology and Its Future Prospects

Author

Wei, Jin, primary, Zheng, Zheyang, additional, Tang, Gaofei, additional, Xu, Han, additional, Lyu, Gang, additional, Zhang, Li, additional, Chen, Junting, additional, Hua, Mengyuan, additional, Feng, Sirui, additional, Chen, Tao, additional, and Chen, Kevin J., additional

Published
2023
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42. A GaN Power Integration Platform Based on Engineered Bulk Si Substrate with Eliminated Crosstalk between High-Side and Low-Side HEMTs

Author

Lyu, Gang, primary, Wei, Jin, additional, Song, Wenjie, additional, Zheng, Zheyang, additional, Zhang, Li, additional, Zhang, Jie, additional, Cheng, Yan, additional, Feng, Sirui, additional, Ng, Yat Hon, additional, Chen, Tao, additional, Zhong, Kailun, additional, Liu, Jiapeng, additional, Zeng, Rong, additional, and Chen, Kevin J., additional

Published
2021
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