1. Feasibility of monolithic and 3D-stacked DC-DC converters for microprocessors in 90nm technology generation
- Author
-
Tanay Karnik, Volkan Kursun, Gerhard Schrom, Jae-Hong Hahn, Donald S. Gardner, Peter Hazucha, Siva G. Narendra, and Vivek De
- Subjects
Engineering ,business.industry ,Motherboard ,Electrical engineering ,Integrated circuit ,Decoupling capacitor ,Inductor ,law.invention ,CMOS ,law ,Low-power electronics ,Electronic engineering ,Voltage droop ,business ,Decoupling (electronics) - Abstract
Rapidly increasing input current of microprocessors resulted in rising cost and motherboard real estate occupied by decoupling capacitors and power routing. We show by analysis that an on-die switching DC-DC converter is feasible for future microprocessor power delivery. The DC-DC converter can be fabricated in an existing CMOS process (90nm-180nm) with a back-end thin-film inductor module. We show that 85% efficiency and 10% output voltage droop can be achieved for 4:1, 3:1, and 2:1 conversion ratios, area overhead of 5% and no additional on-die decoupling capacitance. A 4:1 conversion results in 3.4x smaller input current and 6.8x smaller external decoupling.
- Published
- 2004
- Full Text
- View/download PDF