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In system LSI design, a desirable system is one that allows the designer to describe, partition, and verify systems, and to generate circuits efficiently. In this paper, we describe a C-based system LSI design system called Bach which we have developed. Using the example of an MEPG-4 video codec design, we summarize its design flow, effects and current issues.

In this paper, we propose a cell synthesis method for a Salicide process. Our method utilizes the local interconnect between adjacent transistors, which is available in some Salicide processes, and optimizes the transistor placement of a cell considering both area and the number of local interconnects. In this way we reduce the number of metal wires and contacts. The circuit model is not restricted to conventional series-parallel CMOS logic, and our method enables us to synthesize CMOS pass-transistor circuits. Experimental results show that our method uses the local interconnect effectively, and optimizes both cell area and metal wire length.

In this paper, a new method for the design of complex multimedia ASIC is introduced. Using this design method, VLSI with embedded software and high-speed emulators can be developed concurrently. The method has proven to be effective through actual design of VLSI for audio compression and decompression in a Mini-Disc system.

A layout approach is attempted dedicatedly for MMICs (monolithic microwave integrated circuits), on which predominant layout elements are transistors, resistors, capacitors, inductors, coplanar waveguides, T junctions, etc., formed by the GaAs fabrication process. The layout issue typical of such MMICs consists essentially in how to realize a single layer placement of different shapes of layout elements under a variety of spacing, orientating, and shaping constraints. Each layout element is modeled to simplify placement tasks subject to different placement constraints, and then a set of the interconnection requirements among elements is represented by a graph, to which a planarization algorithm is effectively applied. As a result of this planarization, a placement procedure is constructed mainly by repeated application of a merging scheme. A number of experimental results are also shown to demonstrate the practicability of the described layout approach.