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Ultrafast third order nonlinearity in silicon photonics is promising for all-optical signal processing beyond 100 Gbit/s. However, the coexistence of slower dynamical responses, such as mesoscopic Drude free-carrier plasma or thermal nonlinearities, degrades high-speed signal integrity. Here, we introduce atomic-layer graphene onto the silicon nanophotonic platform to leverage its unique nondegenerate two-photon absorption and ultrafast carrier dynamics, demonstrating broadband and fast bitrate transmission through cross-absorption modulation. Multichannel error-free optical transmission across telecommunication C- and L-bands is demonstrated with 10−12 bit-error rates at a data transmission rate of 1 Gbps. The bandwidth of the hybrid silicon–graphene structure is demonstrated at least up to 25 GHz. The broadband cross-absorption modulation over 640 nm in graphene–silicon optoelectronics provides a promising scalable material platform for high-speed all-optical signal processing.

In this Letter, we report observations for the optomechanical oscillator (OMO) synchronization in an air-slot photonic crystal (PhC) cavity driven by a single laser source. Two very-close mechanical modes are found in the air-slot PhC OMO cavity and can be locked to each other at drive powers above the threshold with different detunings. The improvement in phase noise (−70 dBc/Hz at 10 kHz offset) for the synchronized OMO is reported as well. The stable frequency tones obtained open a path toward reconfigurable synchronized oscillator networks.

An alternative surface passivation process for high-k Ge metal-oxide-semiconductor (MOS) device has been studied. The surface SiH4 annealing was implemented prior to HfO2 deposition. X-ray photoelectron spectroscopy analysis results show that the SiH4 surface passivation can greatly prevent the formation of unstable germanium oxide at the surface and suppress the Ge out-diffusion after the HfO2 deposition. The electrical measurement shows that an equivalent oxide thickness of 13.5A and a leakage current of 1.16×10−5A∕cm2 at 1V gate bias was achieved for TaN∕HfO2∕Ge MOS capacitors with the SiH4 surface treatment.

The thermal stability and electrical characteristics of HfTaO gate dielectric with polycrystalline-silicon gate have been investigated. The incorporation of Ta into HfO2 enhances the crystallization temperature of film dramatically. Transmission electron microscopy micrographs confirm that HfTaO with 43% Ta film remains amorphous even after activation annealing at 950°C for 30s, and the formation of low-κ interfacial layer is observably reduced. The capacitance–voltage curve of metal–oxide–semiconductor capacitor using HfTaO gate dielectric fits well with simulated curve, indicating good interface property between HfTaO and substrate. In addition, the boron penetration behaviors of HfTaO films are sufficiently suppressed as manifested by the narrow flat-band voltage shift. The negligible flat-band voltage shift in HfTaO with 43% Ta film is observed and attributed to its amorphous structure after device fabrication.

Electron mobility in strained silicon and various surface oriented germanium ultrathin-body (UTB) metal-oxide semiconductor field-effect transistors (MOSFETs) with sub-10-nm-body thickness are systematically studied. For biaxial tensile strained-Si UTB MOSFETs, strain effects offer mobility enhancement down to a body thickness of 3nm, below which strong quantum confinement effect renders further valley splitting via application of strain redundant. For Ge channel UTB MOSFETs, electron mobility is found to be highly dependent on surface orientation. Ge⟨100⟩ and Ge⟨110⟩ surfaces have low quantization mass that leads to a lower mobility than that of Si in aggressively scaled UTB MOSFETs.

Formation of Ge nanocrystals embedded in HfAlO high-k dielectric by co-sputtering of HfO2, Al2O3, and Ge, followed by rapid thermal annealing was demonstrated. Analysis by transmission electron microscopy and x-ray photoelectron spectroscopy confirmed the formation of nonoxidized Ge nanocrystals with a minimum size of about 5nm embedded in HfAlO dielectric. We also demonstrated the application of such nanocrystals in nonvolatile memory devices, achieving a 2.2V memory window as obtained from the C–V characterization of the memory device.

The in situ deposition process of SiGe nanocrystals on SiO2 and HfO2 substrates was studied using Auger electron spectroscopy, atomic force microscopy, and x-ray photoelectron spectroscopy. The Ge concentration in SiGe nanocrystals increased with deposition time at equal Si/Ge flow rates. Analysis indicated that the nucleation of Ge takes place preferentially on prenucleated Si on the dielectric. Memory transistors were fabricated using SiGe nanocrystals and HfO2 tunneling/control dielectrics as a gate stack. Memory effects from floating SiGe nanocrystals in HfO2 were clearly observed at room temperature from metal–oxide–semiconductor field effect transistor devices with a threshold voltage shift of about 0.5 V with the application of +4 V.

Metal-oxide-semiconductor capacitors were fabricated on germanium substrates by using metalorganic-chemical-vapor-deposited HfO2 as the dielectric and TaN as the metal gate electrode. It is demonstrated that a surface annealing step in NH3 ambient before the HfO2 deposition could result in significant improvement in both gate leakage current and the equivalent oxide thickness (EOT). It was possible to achieve a capacitor with an EOT of 10.5 A and a leakage current of 5.02×10−5 A/cm2 at 1 V gate bias. X-ray photoelectron spectroscopy analysis indicates the formation of GeON during surface NH3 anneal. The presence of Ge was also detected within the HfO2 films. This may be due to Ge diffusion at the high temperature (∼400 °C) used in the chemical-vapor deposition process.

We demonstrate the enhanced fast photoresponsivity in graphene hybrid structures by combining the ultrafast dynamics of graphene with improved light-matter interactions in slow-light photonic crystal waveguides. With a 200 μm interaction length, a 0.8 mA/W photoresponsivity is achieved in a graphene-silicon Schottky-like photodetector, with an operating bandwidth in excess of 5 GHz and wavelength range at least from 1480 nm to 1580 nm. Fourfold enhancement of the photocurrent is observed in the slow light region, compared to the wavelength far from the photonic crystal bandedge, for a chip-scale broadband fast photodetector.

The rutile stoichiometric phase of RuO2, deposited via reactive sputtering, was evaluated as a gate electrode on chemical vapor deposited ZrO2 and Zr silicate for Si–p-type metal–oxide–semiconductor (PMOS) devices. Thermal and chemical stability of the electrodes was studied at annealing temperatures of 400, 600, and 800 °C in N2. X-ray diffraction was measured to study grain structure and interface reactions. The resistivity of RuO2 films was 65.0 μΩ cm after 800 °C annealing. Electrical properties were evaluated on MOS capacitors, which indicated that the work function of RuO2 was ∼5.1 eV, compatible with PMOS devices. Post-RuO2 gate annealing up to 800 °C, resulted in only a 1.4 A equivalent oxide thickness (Tox-eq) change and 0.2 V flatband voltage change for Zr silicate and a 4 A Tox-eq change for ZrO2 dielectrics. Tantalum electrodes were also studied on ZrO2 as a comparison of the stability of RuO2 electrodes.

In this paper, a bistable optical-driven silicon-nanowire memory is demonstrated, which employs ring resonator to generate optical gradient force over a doubly clamped silicon-nanowire. Two stable deformation positions of a doubly clamped silicon-nanowire represent two memory states (“0” and “1”) and can be set/reset by modulating the light intensity (

Driven by the need to reduce the power consumption of mobile devices, and servers/data centers, and yet continue to deliver improved performance and experience by the end consumer of digital data, the semiconductor industry is looking for new technologies for manufacturing integrated circuits (ICs). In this quest, power consumed in transferring data over copper interconnects is a sizeable portion that needs to be addressed now and continuing over the next few decades. 2.5D Through-Si-Interposer (TSI) is a strong candidate to deliver improved performance while consuming lower power than in previous generations of servers/data centers and mobile devices. These low-power/high-performance advantages are realized through achievement of high interconnect densities on the TSI (higher than ever seen on Printed Circuit Boards (PCBs) or organic substrates), and enabling heterogeneous integration on the TSI platform where individual ICs are assembled at close proximity (

Tantalum oxide films were deposited on Si substrates by chemical vapor deposition using the precursor Ta[N(CH3)2]5, and an oxidizing agent—O2, H2O, or NO. Temperatures ranged between 400 and 500 °C and total pressures between 10−3 and 9 Torr. NO did not lead to satisfactory film growth rates. Insignificant (

Ultrathin (8–23 A) silicon oxynitrides have been studied in the temperature range of 560–1000 °C in 4 Torr of NO using a sequential growth and analysis approach. X-ray photoelectron spectroscopy indicates that with increasing growth temperature and time, a bonding structure with predominantly Si–O rather than Si–N formation is favored. Simultaneously, the average volume fraction of N (N/N+O) in the dielectric decreases, as a consequence of which the N1s binding energy increases by 0.2–0.8 eV from its initial value of 397.8 eV at a thickness of 8 A. A correlation of the electrical characteristics of NO grown oxynitrides with nitrogen content and location has been made. A film growth mechanism that takes into account the removal of previously incorporated N by NO is also proposed.

High‐quality chemical vapor deposited (CVD) stacked oxynitride gate dielectrics have been fabricated by in situ rapid thermal multiprocessing. Bottom thin oxynitrides were formed by rapid thermal processing (RTP) of Si in nitric oxide (NO) or nitrous oxide (N2O) ambient, followed by rapid thermal chemical vapor deposition (RTCVD) of SiO2 films using SiH4 and N2O. The stacked dielectrics were then subjected to in situ rapid thermal annealing in an O2 ambient. Results show that CVD stacked oxynitride gate dielectrics have improved endurance to interface state degradation, higher charge to breakdown values, and significantly reduced defect densities compared to control thermal gate oxide.

In this letter, we report on the impact of the suppression of boron diffusion via nitridation of SiO2 on gate oxide integrity and device reliability. SiO2 subjected to rapid thermal nitridation in pure nitric oxide (NO) is used to fabricate thin oxynitride gate dielectrics. Both n+ polycrystalline silicon (polysilicon) gated n‐MOS (metal–oxide semiconductor) and p+‐polysilicon gated p‐MOS devices were subjected to anneals of different times to study the effect of dopant diffusion on gate oxide integrity. As expected, an advanced oxynitride gate dielectric will effectively alleviate the boron‐penetration‐induced flatband voltage instability in p+‐polysilicon gated p‐MOS capacitors due to the superior diffusion barrier properties. However, such improvements are observed in conjunction with some degradation of the oxide reliability due to the boron‐blocking/accumulation inside the gate dielectric. Results show that even though the oxide quality is slightly degraded for NO‐nitrided SiO2 with p+‐polysilicon ga...

The surface morphology of Cz Si(100) after H2 bake has been investigated. It is found that at temperatures as low as 950 °C, and bake times as short as 25 s, steps and terraces are formed by the H2 annealing. The evolution of the step and terrace structure can be clearly seen by virtue of temperature differences across the wafer. The steps are two‐atomic layer steps at straight edges, whereas one‐atomic layer steps occur when the edge line is irregular.

The impact of nitrogen (N) concentration and distribution on the electrical and reliability properties of rapid‐thermally NO‐annealed oxides is studied. The use of NO‐annealing of thermally grown SiO2 provides an excellent way to isolate the effects of N, since this method allows for the incorporation of varying N profiles in the oxide without a simultaneous increase in dielectric thickness. Results show that the electrical properties of the dielectric under gate and substrate Fowler–Nordheim injection are highly sensitive to the N profile in the dielectric. While interface endurance (ΔDit) is seen to improve monotonically with increasing N concentrations for both +Vg and −Vg, the same is not observed for charge‐to‐breakdown (QBD) properties. It is found that although QBD improves with NO nitridation under +Vg, it shows a turnaround behavior under −Vg, i.e., for a 10‐s NO‐annealed oxide the QBD value is improved over control oxide while further nitridation is seen to degrade QBD under −Vg. The presence of bulk N and the nonuniform N distribution in the dielectric is responsible for this behavior.

The diffusion and activation of low‐energy implanted B in F preamorphized Si during rapid thermal annealing has been studied. Compared with low‐energy B or BF2 implant into crystalline Si, low‐energy B ion implantation into F preamorphized Si allows the formation of shallow junctions with reduced junction depth and increased B activation. F preamorphization suppresses the B transient enhanced diffusion in the low B concentration region resulting in a steep dopant profile which is necessary for shallow junction formation. Secondary ion mass spectroscopy and cross‐sectional transmission electron micrograph results show F accumulation near the surface and at end‐of‐range defects. The interaction of F with defects is believed to reduce B diffusion in the low B concentration region. Low‐energy B implant into F preamorphized Si followed by rapid thermal annealing has been demonstrated as a promising process for shallow junction formation.

The nitridation of clean Si(100)‐2×1 with NO2 has been studied using Auger electron spectroscopy (AES). In this letter we demonstrate that the interaction of Si(100) with NO2 leads to the efficient incorporation of nitrogen (N) and oxygen (O) in single crystal Si as opposed to the case of N2O on Si(100). A comparative study of the incorporation efficiency of N and O by the reaction of NO2 and N2O with Si(100) over a wide temperature range has been performed. It is observed that only a few Langmuirs (L) of NO2 is required to saturate the Si surface while reaction with N2O is not as favorable. At temperatures ranging from room temperature to 1000 °C, varying proportions of N and O are incorporated into the Si by NO2. Repeated dosing and annealing cycles indicate that continued incorporation of N and O is possible even through a nitrogen‐rich Si layer.

The diffusion and activation of boron following the rapid thermal annealing (RTA) of ion‐implanted boron and BF2 are investigated. The early stage of RTA is characterized by the enhancement of boron diffusion and the suppression of dopant activation throughout the impurity depth profile. This phenomenon is explained and modeled by considering the reaction kinetic between the electrically activated boron species and the inactive boron‐silicon interstitialcy. The self‐interstitial supersaturation created by ion implantation damage is believed to lower the boron activation during RTA by forming electrically inactive boron interstitialcies. A model that accurately predicts both the enhanced diffusion and the suppressed activation of boron during RTA is presented.

Effects of NH3 nitridation on the chemical and electrical properties of N2O oxides have been studied. Compared with NH3‐nitrided SiO2, NH3 nitridation does not degrade the electrical properties of N2O oxides, thus resulting in superior impurity diffusion barrier properties, while preserving excellent interface immunity to hot‐carrier injection and much lower charge trapping. Correlation studies between the chemical and electrical properties of NH3‐nitrided N2O and NH3‐nitrided SiO2 have been done to explain these results.

The properties of thermally oxidized porous Si were studied by Fourier‐transform infrared spectroscopy and secondary ion mass spectroscopy. The results show that residual hydrogen exists in the 1000 °C/10 min thermally oxidized porous Si film in the form of SiOH bonds. The removal of these hydrogen atoms by annealing at 1000 °C in N2 reduces the photoluminescence.

The chemical structure and composition of ultrathin N2O oxides have been investigated using angle resolved x‐ray photoelectron spectroscopy and compared to those of reoxidized NH3‐nitrided SiO2. It is found that N2O oxide shows a second nitrogen‐related bond (N—O bonds) in close proximity to the SiO2/Si interface in addition to the typically observed Si—N bonds in reoxidized NH3‐nitrided SiO2. In addition, the change of the difference between Si 2p and O 1s binding energies in the N2O oxide and reoxidized NH3‐nitrided SiO2 with the take‐off angle is negligible due to the interfacial nitrogen incorporation.

We have investigated the phenomenon of photoluminescence (PL) increase in anodically oxidized porous Si with increasing laser illumination time by transmission Fourier transform infrared spectroscopy (FTIR), PL spectroscopy, and electron paramagnetic resonance. The adsorption of oxygen without hydrogen loss was observed during laser illumination by FTIR. The PL intensity increased linearly, while the dangling bond (DB) density decreased with increasing illumination time. By assuming that the decrease of DB density has a linear response to the illumination time, we identify that the change in DB density is mainly responsible for the observed PL increase after laser illumination.

We have studied the mechanism of photoluminescence (PL) shift by hydrofluoric (HF) vapor phase etching in oxygen ambient. Vapor phase etching offers greater efficiency and flexibility, along with reduced damage and contamination for luminescence studies of porous Si. An initial blue shift followed by a red shift was observed in most cases. Transmission Fourier‐transform infrared spectroscopy showed identical bonding environment before and after vapor phase etching, suggesting that the role of surface passivation is irrelevant to the observed PL shift.

We have studied the mechanism of photoluminescence (PL) change in porous Si layers (PSLs) by gradually replacing the hydrogen‐terminated surface with an oxygen‐terminated surface by anodic oxidation at room temperature. The observed PL change did not follow the change in the silicon hydrides detected by transmission Fourier transform spectroscopy (FTIR). FTIR spectra show that the silicon hydrides decreased while the PL increased. The results of this study show that the polysilane species is not solely responsible for efficient luminescence from PSLs. In addition, an enhancement of PL intensities after laser exposure was observed from anodically oxidized PSLs.

This letter discusses the reliability characteristics of metal‐oxide‐semiconductor capacitors with chemical‐vapor‐deposited Ta2O5 gate dielectric films. To be compatible with the conventional polycrystalline Si‐gate process, SiO2 or Si3N4 film was deposited on Ta2O5 as the top dielectric layer. It is found that under high‐field stress, interface state generation is enhanced with the presence of the top dielectric layers, probably due to the anode‐field increase caused by the positive‐charge buildup in the stacked dielectrics capacitors. The significant positive‐charge build‐up in capacitors with top dielectrics is believed to be due to the hole‐injection‐barrier from Ta2O5 to SiO2 or Si3N4 and/or damage creation in the Ta2O5 films.

We have developed a new, minimal damage approach for examination of luminescent porous Si (PS) layers by transmission electron microscopy (TEM). In this approach, chemically etched (CE) PS layers are fabricated after conventional plan‐view TEM sample preparation. Our TEM studies show that crystalline, polycrystalline, and amorphous phases exist in the same CE sample. The microstructure is believed to gradually change from crystalline to amorphous during chemical etching in a HF‐HNO3‐H2O solution. The microcrystallites in the polycrystalline region are estimated to be 15–100 A, while the pore size is on the order of 400 A.

We demonstrate the enhanced four-wave mixing of monolayer graphene on slow-light silicon photonic crystal waveguides. 200-μm interaction length, a four-wave mixing conversion efficiency of −23 dB is achieved in the graphene-silicon slow-light hybrid, with an enhanced 3-dB conversion bandwidth of about 17 nm. Our measurements match well with nonlinear coupled-mode theory simulations based on the measured waveguide dispersion, and provide an effective way for all-optical signal processing in chip-scale integrated optics.

In this paper, we present the dual band absorption characteristics of complementary metamaterial absorber in near infrared (1.3–2.5 μm) region. The dual band absorption is caused by two distinct resonance mechanisms—electrical resonance and cavity resonance. Electrical resonance occurs in the metal layer—top complementary metamaterial and the cavity resonance occurs in the spacer cavity formed between the top complementary metamaterial and bottom metal reflector layers. In order to elucidate the resonant mechanisms and study the effects of geometrical variations on both the resonant absorption behaviours, two sets of experiment were performed. It was seen that with increasing complementary metamaterial pattern dimension, the electrical resonance absorption peak showed a blue shift, while the cavity resonance showed a slight red shift. However, on the other hand, for the increase in spacer thickness, the cavity resonance peak showed a strong red shift, while the electrical resonance peak remained uninfluenced. The reason for these geometrical dependencies, for both resonances, is conceptually analysed. Furthermore, the design was optimized to attain single absorption band by engineering the cavity and electrical resonances to be at the same wavelength. The single absorption band was successfully realized, however, the peak wavelength showed a red shift from the electrical resonance as in dual band absorber case. The reason for the shift was further explored to be caused due to the strong coupling of electrical and cavity resonances. This approach of utilizing different resonant mechanisms for absorption at different wavelengths provides the means to achieve multiband absorbers, using a simple design and low cost fabrication process.

We experimentally demonstrate a micro-electro-mechanically switchable near infrared complementary metamaterial absorber by integrating the metamaterial layer to be the out of plane movable microactuator. The metamaterial layer is electrostatically actuated by applying voltage across the suspended complementary metamaterial layer and the stationary bottom metallic reflector. Thus, the effective spacing between the metamaterial layer and bottom metal reflector is varied as a function of applied voltage. With the reduction of effective spacing between the metamaterial and reflector layers, a strong spectral blue shift in the peak absorption wavelength can be achieved. With spacing change of 300 nm, the spectral shift of 0.7 μm in peak absorption wavelength was obtained for near infrared spectral region. The electro-optic switching performance of the device was characterized, and a striking switching contrast of 1500% was achieved at 2.1 μm. The reported micro-electro-mechanically tunable complementary metamaterial absorber device can potentially enable a wide range of high performance electro-optical devices, such as continuously tunable filters, modulators, and electro-optic switches that form the key components to facilitate future photonic circuit applications.

We present the fabrication of highly P-doped single crystal silicon electrodes on a silicon probe through complementary metal-oxide-semiconductor (CMOS)-compatible processes. The electrode with diameter of 50 μm and a separation of 200 μm is designed for recording/stimulating purposes. Electrochemical impedance spectroscopy indicates that the interfacial impedance of silicon electrodes at 1 KHz is 2.5 ± 0.4 MΩ, which is equivalent to the result reported from the gold (Au) electrode. To further enhance the charge storage capacity, composites of multi-wall carbon nanotubes (MWCNTs) and Au nanoparticles are electroplated onto the highly P-doped silicon electrode after surface roughness treatments. With optimized electroplating processes, MWCNTs and Au nanoparticles are selectively coated onto the electrode site with only a minimum enlargement in physical diameter of electrode (

This letter compares the effects of two different oxidation techniques, i.e., rapid thermal and conventional wet (steam) oxidations, on the dielectric breakdown and charge trapping characteristics of thin Si3N4 films deposited on rapid thermally nitrided polycrystalline silicon. Results show that, in addition to the low thermal budget, rapid‐thermal‐oxidized Si3N4 shows superior time‐dependent dielectric breakdown characteristics in terms of reduced defect densities and improved film intrinsic properties. Compared to wet‐oxidized dielectrics, suppressed charge trapping is observed for rapid‐thermal‐oxidized Si3N4 stacked dielectrics.

This letter describes the metal‐oxide‐semiconductor characteristics of chemical vapor deposited Ta2O5 films. With the passivation of bottom ultrathin SiO2 layer (∼3.4 nm), an excellent interface (i.e., low fixed charge and interface state densities) has been achieved. In this study, different top dielectrics such as SiO2 and Si3N4 were used to be compatible with conventional polycrystalline Si‐gate process. By using top dielectrics deposited on Ta2O5, such as SiO2 and Si3N4, the leakage current is found to be greatly suppressed by three orders of magnitude for −Vg. For +Vg, the leakage current behaviors are believed to be governed by the Fowler–Nordheim tunneling through the bottom SiO2 layer. Under high‐field stress, however, interface state generation was found to be enhanced with the presence of the top dielectric layer.

In this letter, the stress‐induced leakage current (SILC) is studied in N2O gate oxide. Compared to control thermal oxide grown in O2, N2O oxide shows suppressed SILC, and the suppression is more pronounced under substrate electron injection. Moreover, the dependence of SILC on stress current density is smaller for N2O oxide. The suppressed SILC in N2O oxide is attributed to the nitrogen incorporation during N2O oxidation, which reduces the electron trap generation rate and the density of weak oxide spots.

Room‐temperature photoluminescence (PL) from Si chemically etched (CE) in HF‐HNO3‐based solution has been observed. Scanning electron microscopy reveals that the etched Si has a surface morphology similar to that of luminescent porous Si fabricated by conventional anodization. PL spectra show an order of magnitude smaller luminescent intensity and a shorter wavelength intensity peak for CE Si. A CE Si thickness limitation was observed. The formation of CE Si can be readily explained by a local anodization model.

The formation of photoluminescent porous Si in an etchant solution made from the HF‐HNO3‐CH3COOH system is reported. The porous Si is characterized on the basis of its photoluminescence (PL) spectra and the degradation of the PL during exposure to laser irradiation. The surface topography as characterized by atomic force microscopy (AFM) reveals features on the order of 400–600 A. The effect of annealing the porous Si in vacuum on the PL intensity is described and correlated to the breakdown of Si—H bonds on the porous Si surface.

We have studied photoluminescence (PL) from porous Si anodized laterally along the length of the Si wafer. Broad PL peaks were observed with peak intensities at ∼640 to 720 nm. Strong PL intensity could be observed from 550 to 860 nm. Room‐temperature peak intensities were within an order of magnitude of peak intensities of AlGaAs/GaAs multi‐quantum wells taken at 4.2 K, and total intensities were comparable. A blue shift of peak intensities from ∼680 to 620 nm could be observed after thermal anneal at 500 °C in O2 and subsequent HF dip.

Charge trapping and interface state generation in ultrathin (58‐A equivalent oxide thickness) stacked Si3N4/SiO2 (NO) films prepared by rapid thermal processing have been studied. Results show that the charge trapping characteristics of stacked films is comparable to those of pure SiO2, but interface state generation, especially under positive gate polarity stressing, is significantly enhanced. The high interface state generation rate under positive gate bias in stacked NO layers is explained by enhanced hole injection from the gate due to the low hole injection barrier at the polycrystalline‐Si gate/nitride interface.

The composition of ultrathin oxides grown on both [100] and [111]Si substrates in pure N2O in a conventional furnace has been studied using Auger electron spectroscopy (AES) analysis, chemical etching, and electrical measurements. Results show a peak nitrogen concentration at the Si‐SiO2 interface which decreases from the Si‐SiO2 interface to the oxide surface. This nitrogen distribution is responsible for superior electrical properties of metal‐oxide‐semiconductor (MOS) devices with these films as gate dielectrics.

Growth kinetics of ultrathin SiO2 films formed by rapid thermal oxidizing Si substrates in N2O has been studied in this communication. Results show that the linear‐parabolic law still can be applied to the oxidation of Si in N2O and the interfacial nitrogen‐rich layers in these films result in oxide growth in the parabolic regime by impeding oxidant diffusion to the SiO2/Si interface even for ultrathin oxides. The parabolic rate constant B exhibits an activation energy of 1.42 eV, which is the activation energy for oxidant diffusion in the interfacial nitrogen‐rich layer.

In this letter, the electrical properties of thin low‐pressure chemical vapor deposited (LPCVD) SiO2 annealed in N2O ambient have been studied and compared with thermal oxide of identical thickness. It is shown that N2O‐annealed CVD oxide exhibits less interface state generation and less flatband voltage shift under constant current stress than thermal oxide. It also has excellent uniformity and comparable breakdown characteristics. An oxynitride film formation at the Si/SiO2 interface by annealing in N2O is speculated to be the cause of these improvements.

For chamber base pressure ≊5×10−4 mbar in a rapid thermal processing chemical vapor deposition system, a 900 °C H2 prebake for 60 s results in relatively high defect densities in the GexSi1−x epitaxial layer due to surface damage caused by the H2 prebake. We have demonstrated that a very low thermal budget in situ preclean (800 °C/15 s) can reduce the defect densities. In addition, the use of a Si buffer layer grown at 1000 °C for 60 s prior to the GexSi1−x growth is capable of significantly reducing defect densities.

Radiation‐hardened, fluorinated gate oxides have been obtained by rapid thermal processing of silicon in O2 with diluted NF3. Diluted NF3 is used as a source of fluorine and is introduced during the initial stage of rapid thermal processing. It is found that optimum amounts of fluorine incorporated at the Si/SiO2 interface improve resistance against x‐ray radiation; however, excessive amounts of fluorine degrade the radiation hardness.

We have demonstrated, for the first time, that the epitaxial growth temperature can be lowered by dopant incorporation using rapid thermal processing chemical vapor deposition. Heavily arsenic‐doped epitaxial layers with very abrupt dopant transition profiles and relatively uniform carrier distributions have been achieved at 800 °C. In addition, it is found that defect formation is closely related to dopant concentration.

Chemical composition and growth kinetics of ultrathin SiO2 films formed by rapid thermal oxidizing Si substrates in N2O have been studied. Both Auger electron spectroscopy (AES) and x‐ray photoelectron spectroscopy (XPS) revealed nitrogen pile‐up at the SiO2/Si interface. Nitrogen concentration at the oxide surface and throughout the bulk was found to be low, similar to reoxidized/nitrided oxides. The nitrogen 1s electron binding energy determined by XPS in the oxide also indicated that these nitrogen atoms were bonded to Si. Electrical characterization showed that N2O oxides exhibited less interface state generation under hot‐electron stressing as compared with the control oxide. Growth kinetics study showed that after an initial stage of fast growth, the oxidation rate was reduced significantly due to the formation of a nitrogen‐rich layer at the Si/SiO2 interface which blocked oxidant diffusion to the interface.

We have used rapid thermal processing chemical vapor deposition (RTPCVD) for silicon epitaxial growth on silicon‐on‐insulator (SOI) substrates. The surface morphology of SOI rapid thermal annealed in different ambients was also examined. A short, high‐temperature H2 anneal formed an undulating SOI surface, which planarized after RTPCVD. However, severe surface pitting was observed after a high‐temperature N2 anneal. No significant changes in the defect density of the silicon layers occurred after RTPCVD and no stacking faults were observed in the epilayers.

In this letter, rapid thermal processing chemical vapor deposition has been used to grow high quality in situ doped silicon epitaxial layers. Device quality epilayers have been obtained for both boron and phosphorus doping with abrupt dopant transition profiles. The mobility values of these doped epilayers are very close to the values for bulk silicon under the same doping concentration.

The carrier effective mobility μeff in the inversion layer for both n‐ and p‐channel metal‐oxide‐semiconductor field‐effect transistors with ultrathin gate dielectrics prepared by rapid thermal reoxidation (RTO) of rapid thermal nitrided (RTN) SiO2 has been studied. It is found that although RTN/RTO degraded the low‐field μeff, it improved significantly the electron μeff under high normal field compared to control SiO2. The effect of RTN/RTO on the hole effective mobility has also been examined and found to be quite different than on the electron effective mobility. A physical mechanism is discussed to account for the observation.