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The 9th edition of the Workshop on Metallization and Interconnection for Crystalline Silicon Solar Cells was held as an online event but nevertheless reached the workshop goals of knowledge sharing and networking. The technology of screen-printed contacts of high temperature pastes continues its fast progress enabled by better understanding of the phenomena taking place during printing and firing, and progress in materials. Great improvements were also achieved in low temperature paste printing and plated metallization. In the field of interconnection, progress was reported on multiwire approaches, electrically conductive adhesives and on foil-based approaches. Common to many contributions at the workshop was the use of advanced laser processes to improve performance or throughput.

This article gives a summary of the 8th Metallization and Interconnection workshop and attempts to place each contribution in the appropriate context. The field of metallization and interconnection continues to progress at a very fast pace. Several printing techniques can now achieve linewidths below 20 µm. Screen printing is more than ever the dominating metallization technology in the industry, with finger widths of 45 µm in routine mass production and values below 20 µm in the lab. Plating technology is also being improved, particularly through the development of lower cost patterning techniques. Interconnection technology is changing fast, with introduction in mass production of multiwire and shingled cells technologies. New models and characterization techniques are being introduced to study and understand in detail these new interconnection technologies.

This paper summarizes the trends in metallization and interconnection technology in the eyes of the participants of the 8th Metallization and Interconnection Workshop. Participants were asked in a questionnaire to share their view on the future development of metallization technology, the kind of metal used for front side metallization and the future development of interconnection technology. The continuous improvement of the screen-printing technology is reflected in the high expected percentage share decreasing from 88% in three years to still 70% in ten years. The dominating front side metal in the view of the participants will be silver with an expected percentage share of nearly 70% in 2029. Regarding interconnection technologies, the experts of the workshop expect new technologies to gain significant technology shares faster. Whereas in three years soldering on busbars is expected to dominate with a percentage share of 71% it will drop in ten years to 35% in the eyes of the participants. Multiwire and shingling technologies are seen to have the highest potential with expected percentage shares of 33% (multiwire) and 16% (shingling) in ten years.

A concept that could provide a thin monocrystalline-silicon absorber layer without resorting to the expensive step of epitaxy would be very appealing for reducing the cost of solar cells. The empty-space-in-silicon technique by which thin films of silicon can be formed by reorganization of regular arrays of cylindrical voids at high temperature may be such a concept if the high quality of the thin film could be ensured on centimeter-large areas. While previous works mainly investigated the influence of the porous array on the final structure, this work focuses on the practical aspects of the high-temperature step and its application to large areas. An insight into the defects that may form is given and the origin of these defects is discussed, providing recommendations on how to avoid them. Surface roughening, pitting, formation of holes, and silicon pillars could be attributed to the nonuniform reactions between Si, SiO2, and SiO. Hydrogen atmospheres are therefore preferred for reorganization of macropo...

Polycrystalline silicon (pc-Si) thin-films with a grain size in the range of 0.1–100 μm grown on top of inexpensive substrates are economical materials for semiconductor devices such as transistors and solar cells and attract much attention nowadays. For pc-Si, grain size enlargement is thought to be an important parameter to improve material quality and therefore device performance. Aluminum-induced crystallization (AIC) of amorphous Si in combination with epitaxial growth allows achieving large-grained pc-Si layers on nonsilicon substrates. In this work, we made pc-Si layers with variable grain sizes by changing the crystallization temperature of the AIC process in order to see if larger grains indeed result in better solar cells. Solar cells based on these layers show a performance independent of the grain size. Defect etching and electron beam induced current (EBIC) measurements showed the presence of a high density of electrically active intragrain defects. We therefore consider them as the reason fo...

The stable hydrogen isotope deuterium (D), which is released during the annealing of deuterated silicon nitride films, diffuses through the crystalline silicon and is captured by a thin, amorphous layer of silicon sputtered on the rear surface. We report on the measurement of the concentration of “penetrated” D by secondary ion mass spectrometry to monitor the flux of D diffusing through single-crystalline silicon wafers. The penetrated D content in the trapping layer increases with the annealing time. However, the flux of D injected into the silicon from the silicon nitride layer decreases as annealing time increases.

The studies of porous silicon as a one-dimensional photonic crystal have led to solutions allowing the fabrication of broad photonic band gaps as large as several hundreds nanometers for various types of applications. In this work we demonstrate the use of the chirping process, i.e., the gradual increase in the spatial period of the structure, as it is used in image processing, to design porous silicon broad-band reflectors for thin-film silicon solar cells. Modeling of those layers is done using linear design method and a simulation software. Such chirped structures are fabricated by an anodization process. Samples are prepared on mono and multicrystalline silicon substrates with 15, 40, 60, and 80 layers. The reflectance spectra of such prepared porous reflectors are evaluated and the results show an increase in bandwidth of over 50% of the total width in comparison with the conventional, unchirped reflectors. We demonstrate clear advantages of introducing chirped multilayer structures over conventional...

Defect etching revealed a very large density (similar to 10(9) cm(-2)) of intragrain defects in polycrystalline silicon (pc-Si) layers obtained through aluminum-induced crystallization of amorphous Si and epitaxy. Electron-beam-induced current measurements showed a strong recombination activity at these defects. Cathodoluminescence measurements showed the presence of two deep-level radiative transitions (0.85 and 0.93 eV) with a relative intensity varying from grain to grain. These results indicate that the unexpected quasi-independence on the grain size of the open-circuit voltage of these pc-Si solar cells is due to the presence of numerous electrically active intragrain defects. (c) 2007 American Institute of Physics.

Grain boundaries are known to be the main limiting factor for a high performance of polysilicon solar cells. Defects at these grain boundaries serve as recombination centers for minority and majority carriers. Grain boundaries are also known to be paths for enhanced hydrogen diffusion, which results in passivation of part of the defects. In this paper, we show that grain boundaries are also paths for an enhanced phosphorus diffusion that limits the effect of hydrogen passivation. Phosphorus spikes along the grain boundaries enhance the junction area and determine the collection and the recombination volumes. Avoiding this preferential diffusion of phosphorus atoms during emitter formation, we obtained open-circuit voltages (Voc) up to 536mV on polysilicon material with a grain size of only 0.2μm. These high Voc values can only be accounted for by theory if a much smaller grain boundary recombination velocity is assumed than what was previously accepted for p‐n junctions on fine-grained polysilicon solar c...

Hydrogenation by high temperature rapid annealing of SiNx:H is found to be very effective on the defects responsible for the carrier trapping effect in multicrystalline silicon. The passivation effect is reversible and is annihilated by a long thermal annealing. As for the passivation of deep, lifetime killing defects, the efficiency of “trap” removal by the short thermal treatment depends on the density of the SiNx:H layer. This effect is, in fact, well correlated with performance improvement observed in solar cells. The parallelism between the trap and recombination center passivation effects suggests that they originate from the same defect.

Heterostructures, such as the crystalline silicon (c-Si)/plasma-enhanced chemical vapor deposited (PECVD) hydrogenated amorphous silicon (a-Si:H) structure, form a possibility in the development of a low recombination rear contact for photovoltaic devices fabricated from p-type c-Si(p) substrates. To find a good compromise between limited charge carrier recombination at the surface and a limited resistivity of the contact, a sandwich structure, such as c-Si(p)∕a-Si:H(i)∕a-Si:H(p+) has been proposed in the past. However, in this letter, we report that whereas a very thin intrinsic a-Si:H layer (∼3nm) may still yield very low values for the surface recombination velocity of low resistivity (0.5–1.5Ωcm) c-Si(p) wafers, the surface passivation properties are lost when this intrinsic film is subsequently covered by a PECVD a-Si:H(p+) layer. This phenomenon suggests that surface recombination does not take place at the c-Si(p)∕a-Si:H(i) interface, but more likely in the defect-rich PECVD a-Si:H(p+) material, by tunneling of minority carriers through the thin a-Si:H(i) layer.

In this article, we report on the use of direct plasma-enhanced chemical vapor deposited silicon nitride (SiNx) films deposited at low excitation frequency (440 kHz) on low-resistivity (1.5 Ω cm) p-type Czochralski silicon substrate surfaces with different textures, to elucidate the influence of microroughness of the substrate surface on the surface-passivating properties of thin SiNx films. Whereas flat surfaces get the best passivation from Si-rich SiNx films, the optimum passivation shifts towards stoichiometric nitride as the microroughness increases, which points to the increasing relative importance of a charge-induced field effect. When short high-temperature (firing) treatments are applied upon passivation layer deposition, the process window to yield good surface passivation broadens, although very Si-rich films tend to suffer from blistering.