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A switching device, with a p‐type delta‐doped sheet in the center of an InGaAs‐GaAs quantum well, has been fabricated and demonstrated. An N‐shaped negative‐differential‐resistance phenomenon resulting from the resonant‐tunneling effect through the miniband is observed in the current‐voltage measurement. From the experimental results, it is seen that the temperature plays an important role in device operation. The influences of temperature upon the peak‐current voltage, valley‐current voltage, peak‐current density, and valley‐current density are studied and discussed.

Sequential resonant-tunneling behavior of a resonant-tunneling bipolar transistor with five-period i-InP/n-InGaAs superlattice emitter has been demonstrated. An interesting multiple negative differential resistance (NDR) phenomena resulting from the creation and extension of the high-field domain in a superlattice is observed at room temperature. Furthermore, the employing of a thin n-InGaAs emitter layer between an InP/InGaAs superlattice and p+-InGaAs base layer helps to lower the potential spike at the base–emitter junction and the reduce neutral–emitter recombination current. Experimentally, transistor performance, incorporating multiple NDR, with a relatively large current gain of 454 and an offset voltage as low as 80 mV, is achieved.

An AlGaAs/GaAs/InGaAs resonant-tunneling heterostructure-emitter bipolar transistor with negative-differential-resistance (NDR) behavior has been fabricated and demonstrated. Typical device performances with current gain of 140 incorporating an N-shaped NDR with a peak-to-valley current ratio of 5.3 are obtained at room temperature. The NDR behavior is believed to mainly result from a double-barrier-like resonant-tunneling effect. In other words, the on and off electron resonant tunneling from a depleted GaAs emitter through an InGaAs quantum well and ultrathin base toward a collector layer yield the interesting NDR behavior. Consequently, the proposed device provides a good potential for applications in amplifiers, low-power consumption, and logic currents.

The confinement effect and electrical characteristics of heterostructure-emitter bipolar transistors with an AlGaInP bulk-confinement layer and an AlGaInP/GaAs superlattice-confinement layer are first demonstrated and compared by experimentally results. In the two devices, the relatively large valence band discontinuity at AlGaInP/GaAs heterojunction provides excellent confinement effect for holes to enhance current gain. As to the AlGaInP/GaAs superlattice-confinement device, part of thermionic-emission electrons will be trapped in the GaAs quantum wells of the superlattice. This will result in lower collector current and current gain as compared with the bulk-confinement device. Nevertheless, the superlattice-confinement device exhibits a larger current-gain cutoff frequency, which can be attributed that the tunneling behavior is included in the carrier transportation and transporting time across the emitter region could be substantially reduced.

We report an improved camel‐gate field effect transistor using a high‐medium‐low doped channel. A 1000‐A‐thick n=1×1017 cm−3 GaAs layer is employed to form the camel gate, which prevents the planar‐doped barrier from being dropped abruptly. In addition to transition channel, a thin (200 A) heavily doped (n=5×1017 cm−3) GaAs layer works as the main active channel to enhance the current drivability and transconductance. For our 1.5×100 μm2 device, the maximum current density of over 850 mA/mm was obtained. Moreover, an enhanced voltage‐independent transconductance was also observed. Generally, the device exhibits a transconductance of 220 mS/mm which is compatible to that of MESFETs and is two‐ or threefold to that of reported camel‐gate FETs. In addition, the proposed device demonstrates a large gate voltage swing for high transconductance operation. Due to the excellent device performance, our devices do hold promise for both large signal and digital circuits application, simultaneously.

A GaAs/n+‐In0.2Ga0.8As/GaAs doped‐channel field‐effect transistor structure has been fabricated and studied. A typical transistor performance with a threshold voltage of about −3.0 V and transconductance of up to 160 mS/mm is obtained in the lower gate‐source voltage (VGS

A high performance metal‐insulator‐semiconductor–like pseudomorphic field‐effect transistor utilizing an n−‐GaAs/n+‐In0.2Ga0.8As two‐layer structure was fabricated and demonstrated. The n−‐GaAs layer is used as the Schottky contact layer whereas the n+‐In0.2Ga0.8As quantum well is employed as the active channel. Due to the excellent properties of the InGaAs layer and carrier confinement effect at the In0.2Ga0.8As–GaAs heterointerface, the device under study shows the advantages of high breakdown voltage, high current capability, very large gate voltage swing for high transconductance operation, and ease of fabrication. For a 2×100 μm2 gate device, a breakdown voltage of 17.4 V, a maximum drain saturation current of 930 mA/mm, a maximum extrinsic transconductance of 230 mS/mm, and a very wide gate voltage range larger than 3 V with the extrinsic transconductance higher than 200 mS/mm are obtained. Therefore, the device has great potential for use in high speed, high power, and large input signal circuit ap...

The performance of an InGaP/GaAs superlattice-emitter bipolar transistor with InGaAs/GaAs superlattice-base structure is demonstrated by experimental results. The injecting electrons from superlattice emitter are easy to transport into the superlattice-base region for promoting the collector current by tunneling behavior. Furthermore, the average energy gap of base regime is substantially reduced by the use of InGaAs/GaAs superlattice structure for the requirement of low turn-on voltage. Experimentally, the transistor exhibits a maximum common-emitter current gain of 295 and a relatively low collector-emitter offset voltage of only 16 mV. In particular, the ideality factor of collector current near to unity is obtained.

Specific treatments of the base surface of InGaP∕GaAs heterojunction bipolar transistors are studied experimentally. The dual treatment method, based on the combination of ledge and sulfur passivation, shows better temperature-dependent characteristics including higher dc gain, lower saturation voltage, lower base-emitter junction turn on voltage, lower leakage current, lower collector and base current ideality factors nC and nB, and wider collector current operating regimes over the measured temperature range (300–400K). Therefore, the dual surface treatment method provides promise for high-performance electronic applications.