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Graphene based FET exhibit some extraordinary properties like flexibility and stability in different environments, that makes it a satisfactory device for sensors. Detection of RNA, DNA, lactose, hydrogen peroxide and acetylcholine are reviewed in this paper. Recent advancement in GFET’s properties analysis is also reviewed for different sensor. In future, by insertion of other materials on GFET or by making GFET of superior attributes will open a door for bringing advancements in sensors based on GFET.

One of the major downsides of traditional Metal Oxide Silicon Field Effect Transistor (MOSFET) is scaling which hinders designing of energy efficient devices; to get over this constraint Carbon Nano Tube Field Effect Transistor (CNTFET) is used. This paper presents the designing of energy efficient logic gates using CNTFET. The structure of CNTFET is almost similar to that of MOSFET except it comprises of single or group of nanotubes as the channel material. Using Stanford CNTFET model, designing of CNTFET based logic gates are manifested. For design and simulation HSPICE software is used in accordance of Stanford CNTFET model. Power consumption and delay of logic gates are observed, while changing the operating voltage keeping temperature constant. Figure of Merit (FOM) is computed by replacing MOSFET with CNTFET.

The paper reports a tunable interface electronics for High Electron Mobility Transistors (HEMTs) based Field Effect Transistor (FET) sensor. The approach presented in the work can estimate both the ‘on resistance’ and drain current of the FET sensor while maintaining a constant drain-source voltage (VDS). The interface electronics consist of a full Wilson current mirror with a floating voltage-controlled resistance which is controlled by the output of an integrator forming a closed-loop feedback control. The bias point for the sensor is set by the external voltage, Vbias and the difference between the sensor drain-source voltage, VDS and Vbias is fed to the integrator as an error signal. The output of the integrator, Vc varies the tunable resistance which in turn varies the current in the current mirror branch. This current is mirrored to the sensor branch and continues to vary until the drain-source voltage, VDS matches the applied external bias voltage, Vbias. At this point, the circuit is at the balanced state and the corresponding control voltage, Vc represents the sensor signal. The circuit is evaluated with SPICE simulation and experimentally verified using a prototype PCB. Experimental results revealed that the circuit can work for a range of 200Ω to 2000Ω with an absolute relative error of less than ±1%. The circuit can also be tuned for the desired working range and allows the user to apply external bias potential based on the sensor’s requirement. The proposed circuit has great potential as a bio-chemical interface circuit for FET based sensors.

This paper reported on performance assessment of a field-effect transistor-based biosensor with different widths of the silicon nanowire transducer channel. Silvaco ATLAS device simulation software was used to model the device design with three different channel widths, which are 100, 150, and 200 nm. In this simulation, the bounded target biomolecules during actual detection using the biosensor were represented by several negative interface charge density values applied on the surface of the transducer channel. Increase in accumulation of hole carriers beneath the channel’s surface was observed due to the availability of negative interface charges on the surface, hence increased the output drain current. Furthermore, width reduction of the device’s channel had allowed more significant change in drain current due to application of different interface charge density values and increased the device’s sensitivity. Among the simulated devices, silicon nanowire field-effect transistor-based biosensor with transducer channel width of 100 nm had shown highest sensitivity (-56.45 nA/e−cm2) with lowest interface charge density detection (2.79×1010 e/cm-2), which means it enhances the interface charge detection by providing better response and allows lower limit of detection. Therefore, in actual detection, possibility for reaction of the transducer channel to the specific target biomolecule can be increased.

The electrical performance of suspended few-layer MoTe2 field-effect-transistors with ionic liquid gating has been investigated. The suspended structure not only enhances the mobility of MoTe2 by removing the influence of the substrate but also allows ions to accumulate on both the top and the bottom surface of MoTe2. The consequent increase in the gate capacitance resulted in an improved subthreshold swing (∼73 mV/dec) and on-off ratio (106) at room temperature for suspended MoTe2 compared to substrate-supported devices. Suspended transistors with ionic liquid gating enable a larger charge density compared to ionic liquid gated supported devices and may provide a useful platform to study screening physics in 2D materials.

By using a transparent conductive oxide (TCO) gate for the short-wave infrared (SWIR) region, the high optical responsivity of 180 A/W at 1550 nm and the broadband photosensitivity up to 1800 nm are demonstrated in InGaAs photo field-effect transistors (photoFETs) with front-side illumination (FSI). The photoresponse of the InGaAs photoFETs through the TCO gate can be reasonably explained by the photovoltaic effect in the photoFET operation. It was found that the spectral responsivity characteristics of TCO gate InGaAs photoFETs exhibit higher and broader responsivity compared with those of the InGaAs photodiode. The TCO gate InGaAs photoFETs are the most promising architecture for a high responsivity and broadband SWIR FSI photodetector for monolithic integration with optical communication devices and Si-LSI.

Despite successful applications of solution-processed organic–inorganic hybrid perovskites (OIHPs) such as archetypical methylammonium lead iodide (MAPI) in high-performance optoelectronic devices including solar cells and light emitting diodes, their application in field-effect transistors (FETs) remains relatively limited due to the unresolved issues caused by ion migration in OIHPs, such as screening of gate electric fields, lowered device on-off ratios and field-effect mobility, and large hysteresis in the FET transfer characteristics. Here, we report improved performances of the MAPI-based FET via a polymer-additive-based grain boundary (GB) passivation approach that suppresses the ion migration. Polycaprolactone (PCL) was incorporated into the MAPI FET as a GB-passivation additive as confirmed by scanning electron and atomic force microscopies. Unlike the typical n-type behavior and large transfer hysteresis in the starting, pristine MAPI FETs, the GB passivation by PCL led to a drastically reduced hysteresis in FET transfer characteristics, while hinting at an ambipolar transport and slight improvement in mobility, indicating a reduced ion migration in the PCL-incorporated MAPI FET. The effect of PCL GB passivation in suppressing ion migration was directly confirmed by the measured, increased activation energy for ion migration in the PCL-incorporated MAPI. The results not only represent the first report of the polymer-additive-based mitigation of the ion migration in the MAPI FET but also suggest potential utilities of the approach for enabling high-performance OIHP FETs and electronic devices in general.

A DC model for silicon carbide (SiC) metal–oxide–semiconductor field effect transistors (MOSFETs) is proposed in this paper using a hybrid modeling method based on the artificial neural network and artificial bee colony (ABC) algorithm. A multi-layer perceptron neural network using the Levenberg–Marquardt (LM) method is applied to model SiC MOSFETs based on the data provided by the datasheet. The search strategy of artificial bees is improved based on the standard ABC, which enhances the search ability of the standard ABC. In view of the sensitivity of the LM method to the initial value, the improved ABC algorithm is adopted to help the neural network find initial weights and biases, which improves the accuracy of the modeling results. Comparing the modeling results with the I–V curves in the datasheet, the accuracy of the DC model is verified under different temperatures. In addition, the small signal parameters gm and gd that are not exposed in the training process also fit well with the datasheet, which fully demonstrates the feasibility of this hybrid modeling method.

Increasing optical confinement is critical to lowering laser thresholds and increasing modal gain in semiconductor lasers. Here, mode-solver calculations are used to demonstrate that improvements to optical confinement are possible in organic field-effect transistor geometries by using high refractive index cladding layers. Optical experiments show that the proposed structure increases the efficiency of amplified spontaneous emission (ASE) and lowers ASE thresholds without incurring additional losses. The results suggest that the structure can be used to improve optical confinement for both optically pumped and electrical injection organic lasers where thin, low refractive index active materials are required.

In this work, we report on fabrication and characterization of a field effect transistor (FET) based on a ZnO/MgO bilayer employing a top-gate configuration. X-ray diffraction patterns show that the resulting ZnO and MgO films grow epitaxially with planes (002) and (111) parallel to the substrate surface, respectively. Typical current–voltage curves for different applied gate voltages are obtained, and the results are well fitted using standard FET equations. From these fittings, an extracted electronic mobility of μ = 0.8 cm2/V s was obtained in close agreement with the value extracted from Hall effect measurements. A threshold voltage of VTH=−34±3 V was obtained, which is the value that can be explained by the polarization difference of both materials. UV illumination shifts the VTH to VTH=−43±1 V. These findings show how the intrinsic properties of transparent conducting oxides can determine key parameters of a FET device.

Taking inspiration from the brain, neuromorphic systems are thought to be a potential computational platform to solve the problems of the “von-Neumann bottleneck.” Artificial synaptic devices hold the potential to emulate the multi-synapse system to perform complex functions by applying anisotropic materials. Here, we demonstrate a synaptic device based on a two-dimensional ReS2 material, exhibiting synaptic functions such as short-term plasticity, long-term plasticity, paired-pulse facilitation, and spike-rate dependent plasticity. More importantly, benefiting from the broken symmetry of the ReS2 crystal, the devices showed obvious anisotropy of response behavior to the same input signal. In addition, the synaptic performance can also be modulated by laser irradiation. Our results provide possibilities for two-dimensional materials to mimic the biological axon-multisynapse systems with additional optical modulation.

We propose an analytical model to reproduce the non-monotonic instability of the threshold voltage in 4H-SiC MOSFETs submitted to a positive gate stress bias. Experimental analysis of the threshold voltage transients indicates that both electron and hole trappings take place in the gate dielectric or at the dielectric/semiconductor interface, responsible for a V-TH increasing-decreasing-increasing pattern. At low/moderate stress fields (< 7 MV/cm), the electron trapping kinetics responsible for a positive V-TH shift are modeled by a rate equation considering a trapping-inhibition model, which explains the logarithmic degradation kinetics. In the high field regime (> 8 MV/cm), we propose that electrons can tunnel through the SiO2, be accelerated by the high field, and generate holes through impact ionization (II) or anode hole injection. These holes are then trapped in the oxide, thus generating a negative V-TH shift. This second process has an exponential time-dependency, as found through the analysis of the corresponding rate equations. The time constant of the positive V-TH shift is evaluated as a function of stress voltage and temperature. The results indicate that the time constant is strongly dependent on the electric field (that accelerates electrons to generate holes), and not thermally activated, in agreement with theoretical considerations.

In this report, the thermal performance of a hydrogen (H)-terminated diamond field-effect transistor (FET) is investigated using Raman spectroscopy and electrothermal device modeling. First, the thermal conductivity (κdiamond) of the active diamond channel was determined by measuring the temperature rise of transmission line measurement structures under various heat flux conditions using nanoparticle-assisted Raman thermometry. Using this approach, κdiamond was estimated to be 1860 W/m K with a 95% confidence interval ranging from 1610 to 2120 W/m K. In conjunction with measured electrical output characteristics, this κ was used as an input parameter for an electrothermal device model of an H-terminated diamond FET. The simulated thermal response showed good agreement with surface temperature measurements acquired using nanoparticle-assisted Raman thermometry. These diamond-based structures were highly efficient at dissipating heat from the active device channel with measured device thermal resistances as low as ∼1 mm K/W. Using the calibrated electrothermal device model, the diamond FET was able to operate at a very high power density of 40 W/mm with a simulated temperature rise of ∼33 K. Finally, the thermal resistance of these lateral diamond FETs was compared to lateral transistor structures based on other ultrawide bandgap materials (Al0.70Ga0.30N, β-Ga2O3) and wide bandgap GaN for benchmarking. These results indicate that the thermal resistance of diamond-based lateral transistors can be up to ∼10× lower than GaN-based devices and ∼50× lower than other UWBG devices.

Moore's Law state that, the number of transistors in silicon chip will be doubled every 2 years. The size of Metal Oxide Semiconductor Field Effect Transistor (MOSFET) will be scaled down. MOSFET is a semiconductor device that used for switching and amplifying. As the MOSFET shrunk down, there will be Short Channel Effect (SCE) occur which can affect the performance of chi p. Therefore, Silicon on Insulator (SOI) technology have been introduced as a solution to the problem. The aim of this research is to investigate the effect of channel doping concentration of SOI MOSFET using SILVACO TCAD Simulator. By adding a layer of buried oxide (BOX ) on the top of silicon substrate, the electrical characteristic of MOSFET can be improved and the performance will increase. Simulation results were observed using TCAD tools, SILVACO (ATHENA, ATLAS and Tony-Plot). Based on the observation, increasing dose of doping concentration leads to increasing on threshold voltage (Vt) and decrease the leakage current (Ioff).

We have employed the density functional theory (DFT) to study structural, electronic and vibrational properties of H-passivated Si/Ge core-shell nanowire. The dynamical stability of the NW is analyzed by formation energy and phonon dispersion curve. We have observed that there is a decrease in band gap in the core/shell as compared to its corresponding pure nanowires, which may be due to the strain induced at Ge-shell in presence of Si-core. The Si/Ge nanowire shows direct band gap of 1.47 eV. The stable structure with direct band gap nanowire could show potential applications in the field of the sensors, bipolar and FET transistor. The original version of this article supplied to AIP Publishing contained an error in Figure 2, whereas the images displayed in Figure 2 were a copy of those displayed in Figure 1. This has been corrected in the updated and re-published version of this article on 18 December 2020

Sb2Se3 nanostructures has been prepared by fast and facile microwave assisted solvothermal process by two routes with different solvents such as Oleylamine and 1-5 pentane diol which were named as S1 and S3 respectively. Structural properties of S1 shows an orthorhombic polycrystalline nature while highly (211) oriented structures has been observed in S3. The length (diameter) of the as prepared S1 sample of the nanorods were found to be as∼600nm (∼ 50nm). Interestingly, morphology of S3 showedpolypod (spider) kind of shape as similar to commercially available Field Effect transistor (FET) and transistor devices with length (legs) of nanorods as 1-3 µm and diameter as ∼150 nm. Temperature dependent resistance measurements indicates thermal activation behavior with activation energy∼4.4 meV at high temperature and 3D VRH mechanism in the moderate temperature. Temperature dependent thermopower shows a value of S=21.08 µV/K and with the obtained electrical coductivity (σ =124.50 Sm-1), the thermoelectric power factor was calculated to be (P.F.)=0.06 µW/ mK2 around the room temperature.

The performance of N-type double gate junctionless Field Effect Transistor(JLFET) at different silicon thickness is studied using TCAD simulations. The performance of the device is highly dependent on silicon thickness. The different parameters like ON current, OFF current, ON/OFF current ratio, Subthreshold Slope(SS) and threshold Voltage has been studied at different silicon thickness varied from 6nm to 12nm. It is observed from the simulations that with the increase in silicon thickness the device performance has degraded. The best performance parameters are obtained when the silicon thickness is 6nm. This paper also demonstrates the correlation between the gate work function and the silicon thickness for better device performance. Further, an improvement in the performance parameters even on increasing the silicon thickness has been observed on increasing the work function of the gate material.

2D-TMDC materials are supposed to be suitable materials for the electronic industry requirements due to tunable bandgap. 2D-MoS2 has an advantage over the graphene as it has direct bandgap and high on/off ratio. In this work, 2D-MoS2 nanostructures have been synthesized using a simple and cost-effective liquid phase exfoliation (LPE) method in the organic solvent without any additives. The synthesized MoS2 has up to 4-layer thick nanosheets structure which is confirm by the FESEM and Raman studies. From the UV-Visible absorption spectroscopy, the bandgap of the material is found to be 1.79 eV. This synthesized material is used as the channel material in the field effect transistor. The field effect transistor (FET) device have been fabricated in the top-gate configuration. It has been found that the current on/off ratio is of the order of 104.

Fabrication of planar field effect transistor (FET) on a glass substrate using simple stencil based printing is reported in this work. Water was used as gating medium which is useful in sensing application. Polyaniline in semiconducting form was used as the channel material which was obtained by aging freshly prepared material. It was observed that the device is best operated below one volt. The device was found to be symmetric with shcotky barrier height of 0.5 for both drain and source junction. It was observed the threshold factor (Difference of gate voltage and threshold voltage) was found to be 0.7 V. The device fabricated was stable over time and over voltage cycles. This allows us to use these water gated FETs for different biological and sensing applications.

Here, we report fabrication and characterization of thin film transistor based on graphene oxide (GO). Thin film of GO was deposited on n ++Si/SiO2substrate by drop-casting. Output characteristics of graphene oxide field effect transistor (GOFET) show gate effect without saturation. The non-existence of saturation is due to high carrier concentration in the channel which is made up of graphene oxide. Threshold voltage of 1.06V has been calculated from transfer characteristics.

The Performance of gate misaligned N-type conventional double gate junctionless field effect transistor (JLFET)and N-type rectangular core-shell (RCS) based JLFET is studied. The misalignment of the gate is studied towards the source side. The performance parameters analyzed are ON current, OFF current, ON/OFF current ratio, Subthreshold slope and threshold voltage. These “Figure of Merits” are compared with the conventional double gate junctionless transistor under same conditions of gate misalignment. The proposed RCS based structure exhibits superior performance under perfectly aligned gate condition and is less sensitive to the effect of gate misalignment as compare to conventional JLFET. It is shown that RCS based double gate junctionless FET has the tolerance limit of 50% gate misalignment whereas conventional structure does not offer the flexibility to gate misalignment.

Surface Morphology of active material in organic electronics is an important factor which determines the performance of device. Here we have grown the Schottle cock type phthalocyanine: p-type SnPc and n-type SnOPc organic molecules at different substrate temperatures. The surface morphologies of Schottle cock type phthalocyanineare different from that in planer phthalocyanine molecules. The grain size of p-type SnPc and n-type SnOPc molecules increases with the growth temperature and at particular temperature the surface morphology consist the grains larger than 200 nm. Field effect transistor based on SnOPc organic molecules show the charge carrier mobility and threshold voltage are 1.3x10−4 cm2/Vs and ∼20 V respectively.

The performance of p and n-type rectangular core shell double gate junctionless field effect transistor (RCS_DGJLT) on varying oxide thickness is studied. The oxide thickness plays a vital role to achieve good gate capacitance. The impact of oxide thickness on short channel effects is also studied. The oxide thickness is varied from 0.5nm to 2nm in both p and n-type RCS-DGJLT. The impact on the device performance on increasing the oxide thickness is observed to be almost same for both the types of device. The performance of the devices is analyzed on the basis of different parameters like OFF current, ON current, ON/OFF current ratio, subthreshold slope and threshold voltage. It is observed that oxide thickness of 1nm gives better performance for n-type and p-type RCS-DGJLT at channel length of 20nm. Further, a comparison is shown between conventional DGJLT (no core) with RCS-DGJLT (with core=4nm). The RCS-DGJLT exhibits an excellent device performance on the basis of performance parameters.

We report on a method for fabricating balanced hole and electron transport in ambipolar organic field-effect transistors (OFETs) based on the co-evaporation of zinc-phthalocyanine (ZnPc) and its fluorinated derivative (F 8 ZnPc). The semiconducting behaviour of the OFET can be tuned continuously from unipolar p-type, with a hole mobility in the range of (1.7 ± 0.1) × 10 -4 cm 2 /Vs, to unipolar n-type, with an electron mobility of (1.0 ± 0.1) × 10 -4 cm 2 /Vs. Devices of the pristine ZnPc and F 8 ZnPc show a current on/off ratio of 10 5 . By co-evaporating the p-type ZnPc with the n-type F 8 ZnPc, we fabricate ambipolar transistors and complementary-like voltage inverters. For the ambipolar devices, the optimum balance between the hole and electron mobilities is found for the blend of 1:1.5 weight ratio with hole and electron mobilities of (8.3 ± 0.2) × 10 -7 cm 2 /Vs and (5.5 ± 0.1) × 10 -7 cm 2 /Vs, respectively. Finally we demonstrate application of the ambipolar devices in a complementary-like voltage inverter circuit with the performance comparable to an inverter based on separate ZnPc and F 8 ZnPc OFETs.

Nanoelectronic devices emulating neuro-synaptic functionalities through their intrinsic physics at low operating energies are imperative toward the realization of brain-like neuromorphic computers. In this work, we leverage the non-linear voltage dependent partial polarization switching of a ferroelectric field effect transistor to mimic plasticity characteristics of biological synapses. We provide experimental measurements of the synaptic characteristics for a 28 nm high-k metal gate technology based device and develop an experimentally calibrated device model for large-scale system performance prediction. Decoupled read-write paths, ultra-low programming energies, and the possibility of arranging such devices in a cross-point architecture demonstrate the synaptic efficacy of the device. Our hardware-algorithm co-design analysis reveals that the intrinsic plasticity of the ferroelectric devices has potential to enable unsupervised local learning in edge devices with limited training data.

Correlation between the sidewall surface states and off-state breakdown voltage of AlGaN/GaN heterojunction field effect transistors (HFETs) is investigated for the first time. HFETs explored in this work were realized on a variety of isolation features including conventional mesa, non-slanted fin, and slanted fin. The output and transfer characteristics of the devices from all categories of the fabricated AlGaN/GaN HFETs were studied, and a link between the separation of isolation feature sidewalls in the drain access region and the breakdown voltage was observed. Simulation results showed that by shrinking the width of the isolation feature geometry, the peak of the electric field at the drain edge of the gate is reduced as a result of tailoring its profile when a more resistive path is imposed on the drain access region. While HFETs realized on fins of smaller width benefit more from the depleting effect of acceptor sidewall surface states and consequently a higher off-state breakdown voltage, they suffer from a lower current density in the on-state. The slanted fin isolation feature geometry that we proposed here, while maintaining high breakdown voltage in the off-state, reduces the resistance in the on-state, which is represented by its highest Baliga's figure of merit among the three categories of isolation feature geometries. The proposed solution for achieving an improvement to the off-state breakdown voltage of AlGaN/GaN HFETs relies on a technology that has already been explored as a successful alternative for the realization of enhancement-mode transistors (i.e., with positive threshold voltage).

Here, we study the temperature-dependent transport properties of OFETs with the prototypical OSC 6,13-bis(triisopropylsilylethynyl)pentacene (TIPS-pentacene) co-processed with polystyrene (PS) as the active layer. The active layer is deposited directly on SiO2 using the bar-assisted meniscus shearing (BAMS) method. The co-processing with PS favors a consequential decrease in interfacial trap densities as previously reported. Furthermore, we demonstrate how this processing method leads to devices exhibiting activation energies well below the current state of the art for TIPS-pentacene on SiO2 or other dielectrics. Altogether, our study reports on TIPS-pentacene thin films exhibiting an activation energy (Ea) as low as 15 meV when the active material is blended with PS and processed via BAMS. Such an unprecedentedly low value originates not only from a decrease in the interfacial trap densities but also from trapping energies much shallower than previously reported elsewhere for the same material. This allows us to clarify the previously reported notion that significant passivation of interfacial traps occurs following the separation of PS from TIPS-pentacene into an individual layer at the interface with the insulator and to confirm that the enhanced transport originates from a synergistic effect wherein both trapping density and depth are reduced., E.O. and I.S. acknowledge the financial support of the Natural Sciences and Engineering Research Council of Canada (NSERC) (funding Reference Nos. RGPIN-201805092 and RGPIN-2017-06748), the Fonds de recherche du Québec-Nature et technologies (FRQNT). E.O. also acknowledges the financial support of the Canadian Foundation for Innovation (CFI) through the John R. Evans Leaders Fund (JELF). M.M.T. acknowledges funding by the Spanish Ministry with the Project No. GENESIS PID2019-111682RB-I00 and through the “Severo Ochoa” Programme for Centers of Excellence in R&D (No. FUNFUTURE CEX2019-000917-S) and the Generalitat de Catalunya (No. 2017-SGR-918). A.T. acknowledges his FPU fellowship and is enrolled in the UAB Materials Science Ph.D. program. M.B.R. cordially thanks NSERC for support through the Canada Graduate Scholarships–Master's program and the Centre québécois sur les matériaux fonctionnels (CQMF) for his summer scholarship., With funding from the Spanish government through the ‘Severo Ochoa Centre of Excellence’ accreditation (CEX2019-000917-S).

Magnetic tunnel junctions (MTJ) with MgO/Fe based interfaces and out-of-plane spin direction form the basis of present-day spin-transfer-torque magnetic random-access memory (STT-MRAM) devices. They are a leading type of nonvolatile memory due to their very long endurance times and lack of reliability problems. Many semiconductor devices, such as the field effect transistor or nonvolatile memories, have undergone fundamental changes in materials design as dimensional scaling has progressed. Here, we consider how the future scaling of the MTJ dimensions might affect materials choices and compare the performance of different tunnel barriers, such as 2D materials like h-BN with the existing MgO tunnel barriers. We first summarize key features of MgO-based designs of STT-MRAM. We then describe general aspects of the deposition of 2D materials and h-BN on metals. We compare the band structures of MgO and h-BN with their band gaps corrected for the GGA band error. The different absorption sites of h-BN on Fe or Co are compared in terms of physisorbtive or chemisorbtive bonding sites and how this affects their spin-polarized bands and the transmission magneto-resistance (TMR). The transmission magneto-resistance is found to be highest for the physisorptive sites. We look at how these changes would affect the overall TMR and how scaling might progress.

Charge-independent biomolecule detection using field-effect transistors (FETs) with single-crystal and large-area epitaxial graphene films fabricated on SiC substrates is demonstrated. To obtain clean graphene channel surfaces, FETs were fabricated using stencil mask lithography, which is a resist-free fabrication process. Proteins with various isoelectric points (pI: 5.6–9.9) were used as targets. Transfer characteristics [drain current (𝐼D) vs solution-gate voltage (𝑉G) characteristics] were measured by changing the pH of the buffer solution. The 𝐼D–𝑉G characteristics exhibited a clear negative gate voltage shift for both positively and negatively charged proteins, indicating that the epitaxial graphene FETs could not detect the charge type of the protein and electrons were doped by the adsorption of both positively and negatively charged proteins. These results cannot be explained by conventional electrostatic effects. Therefore, it can be concluded that the detection of biomolecules by the epitaxial graphene FETs occurred through charge transfer from the proteins. Moreover, the dissociation constants between the proteins and epitaxial graphene films were as small as 100 pM, indicating the high sensitivity of the graphene FETs.

The gate-tunable Josephson junction, generally achieved in planar Josephson field-effect transistors (JoFETs), is a key element for the applications of superconducting devices. At present, the performance of these systems with planar JoFETs is often impeded by the large channel length, which, at best, lies in the range of tens of nanometers. In contrast, the channel length in vertical junctions can be easily scaled down to nano-scale to realize the strong Josephson coupling. However, the vertical junctions are believed to be insensitive to the field-effect due to the atomic screening of electric fields in metals. Here, we report on a novel realization of few-layer black phosphorus (BP)-based vertical JoFETs using an electric-double-layer configuration. In transport experiments, using junctions of different shape, superconducting quantum interference device-like magnetic diffraction patterns of the junction critical current and anomalous Shapiro steps on current voltage characteristics are observed, strongly indicating that the critical current density in the junctions is highly inhomogeneous and peaked at the edges or even near the junction corners. The electric-field tunability of the Josephson coupling could be attributed to the edge- or corner-dominated supercurrent density profile combining with the carrier diffusivity in the few-layer BP. The ability to control the vertical Josephson coupling provides us with new opportunities to study high-performance and high-temperature superconducting Josephson field-effect transistors operating on an atomic-scale channel length.

We use full-band quantum transport simulations to show that monolayer platinum diselenide (PtSe2) tunnel field-effect transistors (TFETs) can deliver high ON currents (ION) under biaxial tensile strain, while maintaining a sub-60 mV/dec subthreshold swing. When strained, monolayer PtSe2 develops a lower effective mass and a small gap across which an efficient tunneling can occur, translating to a high ION when used in a TFET channel. At a drain voltage of 0.8 V and OFF current of 1×10−7 μA/μm, a simulated device with a 5% strained channel has an ION > 116 μA/μm, which is three orders of magnitude greater than that of the unstrained unoptimized device. The corresponding I60 is also increased by 600 times. This improvement comes at a reasonable cost of degradation in the OFF state and has a minimal effect on the switching characteristics down to 10 nm channel length. Our results present the mechanical flexibility of 2D materials as a powerful tuning parameter toward their use in high-performance tunneling devices.

When the boundary conditions of the source and drain are asymmetric, the plasma waves may become unstable in the channel of a field effect transistor (FET). We use the quantum magnetohydrodynamic model to study the influence of the quantum Bohm potential, Fermi statistical pressure, and electron spin effects on the stability of THz plasma waves propagating perpendicular to the magnetic field in the FET. A dispersion equation governing the THz plasma oscillation is obtained. Numerical results have shown that the presence of spin effects has enlarged the instable range of β, enhanced the instability increment, and made the frequency of THz plasma waves larger. The research shows that nanometer FETs with spin effects have advantages in realizing practical terahertz radiation.

In this paper, negative transconductance (NTC) behavior in molybdenum disulfides (MoS2) field effect transistors (FETs) is investigated. Combining experimental observation and numerical analysis, we demonstrate that positive shift in the device transfer curves results from the electron trapping/de-trapping processes, where the defect densities at the MoS2/SiO2 interface are reduced when the temperature T decreases from 300 to 200 K. Moreover, the main types of defects that affect the device electrical performance are the interface defect and bulk sulfur vacancy VS in which VS induces the p-type doping effect. While decreasing T below 100 K, NTC occurs when their active layer thickness t (=41 and 35 nm) is larger than the Debye length λ (28 nm). Considering the n-type doping effect induced by the interface defects and the p-type doping caused by the bulk S vacancies, these two opposite doping regions are carefully implemented in simulation at T = 70 K. A vertical barrier induced by the inhomogeneous electron distribution enlarges with the increased gate bias VGS and, thereafter, leads to the unconventional increase in the contact and total resistances with t > λ. While t ≦ λ, the barrier and NTC behavior disappear. The current IDS and transconductance g obtained from the simulation confirm the low-temperature NTC mechanism related to the defects as discussed above. The material defects and physical origin of NTC discussed in the multilayer MoS2 transistors provide the theoretical foundation for designing and realizing novel structures of functional devices via defect engineering in the two-dimensional FET.

We report normally-off operations in partially-gate-recessed Al x Ti y O(AlTiO)/AlGaN/GaN metal-insulator-semiconductor (MIS) field-effect transistors (FETs), where aluminum titanium oxide AlTiO, an alloy of Al 2 O 3 and TiO 2, is employed as a gate insulator. Since AlTiO is useful for interface charge engineering owing to a trend that the AlTiO/AlGaN interface fixed charge is suppressed in comparison with Al 2 O 3, we investigated combining the interface charge engineering with a partial gate recess method for AlTiO/AlGaN/GaN MIS-FETs. For AlTiO with a composition of x / ( x + y ) = 0.73, a suppressed positive interface fixed charge at the AlTiO/recessed-AlGaN interface leads to a positive slope in the relation between the threshold voltage and the AlTiO insulator thickness. As a result, we successfully obtained normally-off operations in partially-gate-recessed AlTiO/AlGaN/GaN MIS-FETs with favorable performances, such as a threshold voltage of 1.7 V, an on-resistance of 9.5 Ω mm, an output current of 450 mA/mm, a low sub-threshold swing of 65 mV/decade, and a rather high electron mobility of 730 cm 2 / V s. The results show that the interface charge engineering in combination with partial gate recess is effective for the GaN-based normally-off device technology.

We report first-principles molecular dynamics (MD) simulations that unveil the interface structures of amorphous mixed oxide (Al2O3)1−x(SiO2)x and GaN polar surfaces. The MD allows us to perform the melt and quench (simulated annealing) simulations to forge distinct amorphous samples. We find that the dangling bonds are completely absent at all the obtained interfaces. This annihilation is due to the diffusion of appropriate species, O for (Al2O3)1−x(SiO2)x/GaN(0001) and Al and Si for (Al2O3)1−x(SiO2)x/GaN(000 1 ¯), from the amorphous to the interface and the subsequent formation of strong bonds with both ionicity and covalency at the interface. This absence of the dangling bond indicates the superiority of (Al2O3)1−x(SiO2)x films to Al2O3 or SiO2 as a gate oxide for the GaN–metal–oxide–semiconductor field effect transistor.

This paper studies a composite device composed of ferroelectric random access memory (FeRAM) and metal-oxide-semiconductor field effect transistor. The relationship between the hysteresis characteristics and VG is reported, and the on/off ratios under different writing voltages are presented. The gm–VG curve of the forward and reverse sweeping shows that under forward sweep a very clear instability appears while voltage increases. The reasons for this can be explained according to the voltage divider rule, the ID formula, and gm formula of transistors, which show that there is polarization of the ferroelectric material. Accordingly, a method is proposed to determine the critical point of the ferroelectric capacitor polarization in this 1T1C structure, which is advantageous because it identifies the appropriate reading voltage necessary for an effective program state of the 1T1C device. This method was shown in three 1T1C and three FeRAMs devices with different ferroelectric areas. Finally, this method was verified by the P–V loop of FeRAMs.

HfO2-based ferroelectrics are considered a promising class of materials for logic and memory applications due to their CMOS compatibility and ferroelectric figures of merit. A steep-slope field-effect-transistor (FET) switch is a device for logic applications in which a ferroelectric gate stack exploits a stabilized negative capacitance regime capable to differentially amplify the surface potential in a metal–oxide–semiconductor FET structure, resulting in the improvement of the subthreshold swing and overdrive. In a number of relevant studies of negative capacitance, intrinsic (thermodynamic) switching is assumed, since alternative switching scenarios predict undesirable hysteretic responses in logic devices. However, there is little support from the experimental data showing that the polarization reversal in HfO2-based ferroelectrics is really driven by the intrinsic switching mechanism. In this work, polarization hysteresis loops are measured over wide temperature ranges on polycrystalline Si-doped HfO2 (Si:HfO2) capacitors. The analysis herein, which is based on the classic Landau–Ginzburg–Devonshire theory, yields the temperature-dependent dielectric susceptibility values, which fit the Curie–Weiss law. The extrapolated Curie temperature value is in line with the data obtained for other HfO2-based ferroelectrics using different techniques. The work also illustrates a method to evaluate the ferroelectric equivalent negative capacitance value and range of voltages, aiming at study and optimization of a stabilized negative capacitance FET. This study indicates that the intrinsic switching provides an adequate description of the polarization hysteresis in Si:HfO2 films. This confirms the usability of hafnia-based ferroelectrics for negative capacitance logic devices, and the important role that the intrinsic mechanism plays in the dielectric response of these materials.

Tuning the electrical transport properties of a nanoelectronic device with a p-type Schottky contact remains a grand challenge. To solve this issue, we explore the effectiveness of asymmetric O doping on performance improvements of the graphene/WSe2(1−x)O2x (Gr/WSe2(1−x)O2x) heterostructure using first-principles calculations. The results show that graphene and the WSe2(1−x)O2x monolayer could form a stable van der Walls interface. Further, the controlled asymmetric O doping at different positions and concentrations regulates the electronic properties of the Gr/WSe2(1−x)O2x heterostructure in terms of the type and the height of the Schottky barrier. It is found that a transformation of a Schottky contact from an n-type to p-type is realized by changing the position of the O dopant from inside to outside, and a high Schottky barrier height of 0.72 eV in the undoped Gr/WSe2 heterostructure can be reduced to 0.06 and 0.09 eV for the O doing inside and outside the interface, respectively. In addition, when the O doping concentration increases to 67% both inside and outside of the interface, the Ohmic contacts are observed. Last, the controllable Schottky contact in the Gr/WSe2(1−x)O2x heterostructure is induced by the charge redistribution of the interface, which is caused by the shift of the Fermi level. This work may provide a promising method to improve the electronic performance of the Gr/WSe2 nano field effect transistors.

Bilayer p-n heterojunctions are promising structures to construct ambipolar organic field-effect transistors (aOFETs) for organic integrated circuits. However, due to the lack of effective strategies for high-quality p-n heterojunctions with clear interfaces, the performance of aOFETs is commonly and substantially lower than that of their unipolar counterparts, which hinders the development of aOFETs toward practical applications. Herein, a one-step solution crystallization strategy was proposed for the preparation of high-quality bilayer p-n heterojunctions. A mixed solution of a p- and an n-type organic semiconductor was dropped on a liquid substrate, and vertical phase separation occurred spontaneously during crystallization to produce bilayer p-n heterojunctions composed of molecularly thin two-dimensional molecular crystals. Due to the clear interface of the bilayer p-n heterojunctions, the maximum mobility (average mobility) reached 1.96 cm2 V−1 s−1 (1.12 cm2 V−1 s−1) for holes and 1.27 cm2 V−1 s−1 (0.61 cm2 V−1 s−1) for electrons in ambient air. So far as we know, these values were the highest among double-channel aOFETs measured in ambient air. This work provides a simple yet efficient strategy to construct high-quality bilayer p-n heterojunctions, which lays a foundation for their application in high-performance optoelectronic devices.

Low-dimensional transitional metal sulfide and halide perovskite heterostructures have attracted considerable attention due to their wide applicability in optoelectronics. We present detailed research that combines two-dimensional MoS2 and Cs2PbI4 into heterostructures and investigate the electronic structure, charge carrier transfer, and optical properties of two kinds of heterostructures (1T-MoS2/Cs2PbI4 and 2H-MoS2/Cs2PbI4) based on density functional theory. It is predicted that both interfacial contacts for 1T-MoS2/Cs2PbI4 exhibit p-type Schottky contacts and the Schottky barrier heights of interfacial contacts can be largely tuned based on interfacial engineering. The 2H-MoS2/Cs2PbI4 heterostructure demonstrates type II band alignment, which can effectively enhance photogenerated carrier separation and optical absorption coefficients. The tunable Schottky barrier heights in 1T-MoS2/Cs2PbI4 and the type II band alignment in the 2H-MoS2/Cs2PbI4 heterostructure would provide the potential application in future designs of field effect transistor and photovoltaic applications.

The high capacitance from an electrolyte dielectric layer used in a thin film transistor architecture results in the development of electrolyte-gated organic field effect transistors (EGOFETs), which are able to operate at lower voltages compared with the commonly organic field effect transistors. When ions diffuse into the semiconductor, changing its conductive properties, the resulting devices are named organic electrochemical transistors (OECTs). In this case, an increase in channel conductivity occurs due to ionic doping. Depending on the gate voltage range operation, it is possible to obtain a de-doping process, suitable for achieving a low off-current. In this work, a simple and easy method is proposed based on an additional dielectric layer deposition of poly(methyl methacrylate) at the electrolyte dielectric/semiconductor interface, which provides: (i) good efficiency to block the diffusion of anions into the channel, resulting in an EGOFET for a gate voltage range up to − 0.6 V and (ii) an improvement in the on–off ratio in approximately three orders of magnitude for OECTs due to the low off-current obtained without promoting ionic de-doping in the channel, for a gate voltage range up to − 1.1 V. Both modes of operation were obtained in the same transistor structure. In addition, parameters such as field effect mobility, on–off ratio, and threshold voltage were also estimated for different transistor structures and gate voltage ranges.

Although the surface conductivity of a hydrogen-terminated diamond (H-diamond) enables production of high-performance field effect transistors (FETs), the total ionizing dose effect is yet to be clarified for H-diamond FETs. We fabricated a RADiation hardened H-terminated Diamond metal–oxide–semiconductor FET (RADDFET) using an oxide gate dielectric deposited at high temperatures. This paper describes its stable operation after 1 MGy irradiation. H-diamond films were prepared using microwave plasma assisted chemical vapor deposition with a p+ layer for reduction of contact resistance. The Al2O3 passivation layer was deposited by atomic layer deposition at 450 °C to achieve operation in high-temperature environment; then a RADDFET was fabricated on them using a Ru electrode. Several current–voltage characteristics were compared before irradiation and after certain dose levels up to 1 MGy. Before they were irradiated in air, the dose rate was measured using a cellulose triacetate film dosimeter. Even after an irradiation level of 1 MGy, the off-current at gate bias voltage (VG) of 3 V was more than six orders of magnitude lower than the on-current at VG of −6 V. Variation of the drain current density (JDS) in the measurements was less than 2%. The threshold voltage shifted approximately 1.7 V with 3 kGy of x ray irradiation, but no marked degradation was confirmed at higher levels. The subthreshold swings were 238, 215, and 264 mV/decade, respectively, after irradiation of 100 kGy, 300 kGy, and 1 MGy. These results indicate that the RADDFET was very stable at higher doses after initial stabilization.

In MoS2 field-effect transistors, the current or voltage fluctuations related to either mobility- or number-dependent relationships are characterized by low-frequency noise. This noise can typically be used to evaluate the application limits of MoS2-based electronic devices. In this work, the low-frequency noise characteristics of single-crystal bilayer MoS2 grown by chemical vapor deposition (CVD) are systematically investigated and found to offer significant performance improvements compared with those based on the monolayer MoS2 channel. At f = 100 Hz, the normalized drain current power spectral density (SI/Id2) is 2.4 × 10−10 Hz−1 and 3.1 × 10−9 Hz−1 for bilayer and monolayer MoS2 transistors, respectively. The 1/f noise behavior can be accurately described by McWhorter's carrier number fluctuation model for both transistor types, suggesting that carrier trapping and de-trapping by dielectric defects is the dominant mechanism of 1/f noise in CVD MoS2 transistors. Furthermore, a minimal WLSI/Id2 of 3.1 × 10−10 μm2/Hz (where W is the gate width and L is the gate length) is achieved at Vbg = 3 V by effectively reducing the contact resistance of bilayer MoS2 transistors using a back-gate voltage. These results demonstrate that CVD bilayer MoS2 is a promising candidate for future large-scale 2D-semiconductor-based electronic applications with improved noise performance.

Tunnel field-effect transistors (TFETs) have attracted immense interest as a promising alternative to complementary metal–oxide semiconductors for low-power-consumption applications. However, conventional TFETs introduce both random dopant fluctuations and ambipolar current issues at negative gate voltages for sub-6-nm technology nodes. In this study, we address the performance of charge plasma-driven doping-less TFETs, including sub-3-nm thick compact drain (CD) geometry/SiGe-channel/Ge source layers for suitable bandgap engineering. An ultrathin CD frame and heteromaterials are adopted for use as channels/sources to improve the ambipolarity and ON-state features, respectively. Simulation demonstrates a clear reduction in the ambipolar current from 3.3 × 10−14 to 3.0 × 10−17 A at gate (VG)/drain (VD) voltages of −1.5/1.0 V and an enhancement in the ON-current from 2.0 × 10−5 to 8.6 × 10−5 A at VG = 1.5 and VD = 1.0 V, compared with conventional TFETs. In addition, diverse fabrication-friendly metals applicable to industry fieldwork sites are tested to determine how the metal work functions influence the outputs. The use of Ti/W/Ni as the drain/channel/source materials, respectively, yields an enhanced ambipolar current of 1.2 × 10−20 A and an ON-current of 3.9 × 10−5 A.

As an essential member of group-V layered materials, gray arsenic (g-As) has recently begun to draw researchers’ attention due to fantastic physical properties predicted by theoretical calculation. However, g-As presents semimetal behavior as the thickness exceeds bilayers, which hinders its further device applications, such as in logic electronics. Herein, we report the growth of high quality gray arsenic–phosphorus–tin (g-AsPSn) alloys via a simple one-step chemical vapor transport process. The as-grown g-AsPSn alloy remains the same layered rhombohedral structure as g-As, while the g-AsPSn alloy shows an opened bandgap compared with g-As. Infrared absorption and photoluminescence spectra reveal a narrow optical bandgap of 0.2 eV. A field effect transistor based on few-layer g-AsPSn alloy flakes shows a typical p-type semiconductor behavior and a relatively high mobility of ∼66 cm2 V−1 S−1 under ambient conditions. It can be envisioned that the synthesized two-dimensional layered narrow-gap g-AsPSn alloy presents considerable potential applications in electronics and infrared optoelectronics.

We systematically investigated the electrical properties of spiral-type and smooth Bi2Se3 nanoplates through field effect transistor and conductive atomic force microscopy (CAFM) measurement. It is observed that both nanoplates possess high conductivity and show metallic-like behavior. Compared to the smooth nanoplate, the spiral-type one exhibits the higher carrier concentration and lower mobility. CAFM characterization reveals that the conductance at the screw-dislocation edge is even higher than that on the terrace, implying that the dislocation can supply excess carriers to compensate the low mobility and achieve high conductivity. The unique structure and electrical properties make the spiral-type Bi2Se3 nanoplates a good candidate for catalysts and gas sensors.

This paper presents non-reciprocal information transfer between two mass-spring chains enabled using an electromechanical cell incorporating a metal–oxide–semiconductor field effect transistor (MOSFET). Mechanical information propagating through an input chain is converted into an electrical signal, and vice versa for an output chain, using a permanent magnet and a conducting coil in each chain. The conducting coils are coupled electrically via a MOSFET, leading to giant isolation and unidirectional signal transfer. We present theory, numerical simulations, and an experimental demonstration of the concept. The proposed system can be implemented as a “sonocoupler”, an acoustic analog of an optocoupler, which can isolate one mechanical system from another while transmitting information in a unidirectional manner.

Ambient suspended particulate matter (PM) (primarily with particle diameter 2.5 µm or less, i.e., PM2.5) can adversely affect ecosystems and human health. Currently, optical particle sensors based on light scattering dominate the portable PM sensing market. However, the light scattering method has poor adaptability to different-sized PM and adverse environmental conditions. Here, we design and develop a portable PM sensing microsystem that consists of a micromachined virtual impactor (VI) for particle separation, a thermophoretic deposition chip for particle collection, and an extended-gate field-effect transistor (FET) for particle analysis. This system can realize on-site separation, collection, and analysis of aerosol particles without being influenced by environmental factors. In this study, the design of the VI is thoroughly analyzed by numerical simulation, and mixtures of different-sized silicon dioxide (SiO2) particles are used in an experimental verification of the performance of the VI and FET. Considering the low cost and compact design of the whole system, the proposed PM analysis microsystem has potential for PM detection under a wide range of conditions, such as heavily polluted industrial environments and for point-of-need outdoor and indoor air quality monitoring.