1. Solution-processed thin film transistors incorporating YSZ gate dielectrics processed at 400 °C.
- Author
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Antoniou, Giorgos, Halcovitch, Nathan R., Mucientes, Marta, Milne, William I., Nathan, Arokia, MacManus-Driscoll, Judith L., Kolosov, Oleg V., and Adamopoulos, George
- Subjects
DIELECTRIC thin films ,THIN film deposition ,DIELECTRICS ,THIN film transistors ,DENSITY of states ,ELECTRON mobility ,DIELECTRIC films ,ELECTRON traps - Abstract
This work investigates a solution process for yttria-stabilized zirconia (YSZ) thin film deposition involving the addition of yttria nanoparticles, at 400 °C, in air. Different yttrium doping levels in the YSZ were studied and a wide range of optical, structural, surface, dielectric, and electronic transport properties were also investigated. An optimum yttrium doping level of 5% mol. resulted in the smoothest films (R
RMS ∼ 0.5 nm), a wide bandgap (∼5.96 eV), a dielectric constant in excess of 26, and a leakage current of ∼0.3 nA cm−2 at 2 MV/cm. The solution-processed YSZ films were incorporated as gate dielectrics in thin films transistors with solution-processed In2 O3 semiconducting channels. Excellent operational characteristics, such as negligible hysteresis, low operational voltages (5 V), electron mobility in excess of 36 cm2 V−1 s−1 , high on/off current modulation ratio on the order of 107 , and low interfacial trap density states (<1012 cm−2 ), were demonstrated. In addition, excellent film homogeneity was achieved over a large area (16 × 16 cm2 ), with both film thickness and capacitance deviation of <1.2%. [ABSTRACT FROM AUTHOR]- Published
- 2022
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