1. Toward Multiple-Bit-Per-Cell Memory Operation With Stable Resistance Levels In Phase Change Nanodevices
- Author
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Barry Cushing Stipe, Aisha Gokce, Ibrahim Cinar, Jordan A. Katine, Servet Ozdemir, Egecan Cogulu, and Ozhan Ozatay
- Subjects
010302 applied physics ,Materials science ,Condensed matter physics ,business.industry ,Subthreshold conduction ,Electrical engineering ,02 engineering and technology ,021001 nanoscience & nanotechnology ,01 natural sciences ,Electronic, Optical and Magnetic Materials ,Amorphous solid ,Phase-change memory ,0103 physical sciences ,Electrode ,Intermediate state ,Charge carrier ,Electrical and Electronic Engineering ,Current (fluid) ,0210 nano-technology ,business ,Order of magnitude - Abstract
Resistance drift of the amorphous states of multilevel phase change memory (PCM) cells is currently a great challenge for the commercial implementation of a reliable multiple-bit-per-cell memory technology. This paper reports observation of a stable intermediate state for a multilevel PCM cell that is achieved through nonuniform heating with a square current injection top electrode. Drift coefficient of the intermediate state is an order of magnitude lower than reset and has weaker temperature dependence. Using finite-element simulations and an analytical model for the subthreshold current–voltage characteristics, based on thermally activated hopping of charge carriers across Coulombic donor-like traps, we conclude that the defect density is two orders of magnitude larger in the intermediate state. We attribute the low drift coefficient of the intermediate state to a large number of stable interfacial defects which dominate the electron transport. Current findings give way to a more stable ultrahigh-density PCM device.
- Published
- 2016