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SM4 national security algorithm has been widely used in data encryption and decryption, However, with the explosive growth of the data volume of the Internet, there are problems such as the slow speed and high CPU utilization of the SM4 algorithm running in pure software mode, while the field programmable gate array or dedicated integrated circuit based on Verilog/VHDL has problems such as poor flexibility and difficulty in upgrading and maintenance. In order to solve the above problems, a design scheme of heterogeneous reconfigurable computing system based on SM4algorithm is proposed. Using high-level synthesis and heterogeneous reconfigurable technology, the customized computing architecture of SM4 algorithm’s electronic cipher book mode and counter mode is designed by optimizing the allocation and transmission of data memory, optimizing the loop, vectorizing the kernel and adding computing units, and the system is deployed on the FPGA heterogeneous platform. The experimental results show that the customized computing architecture of SM4-ECB and SM4-CTR, two mainstream operating modes, on the Intel Stratix 10 GX2800,has a throughput of 109.48Gbps and 63.73Gbps respectively, which is 232.63 times and 141.62 times the throughput of the corresponding mode on the Intel Xeon E5-2650 V2 CPU. The performance of the whole heterogeneous reconfigurable computing system composed of this core module, including data input, encryption and decryption, and output, has also reached 4.90 times and 3.56 times of that of pure software mode. This paper not only realizes customized acceleration for specific modes, but also flexibly supports different computing modes through hardware reconfiguration, taking into account the flexibility and efficiency of the system. [ABSTRACT FROM AUTHOR]