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Abstract: This paper presents a comprehensive numerical modeling for the threshold-voltage transients of nitride-based memory devices during programming, erasing and data retention. The developed numerical tool self-consistently solves the Poisson, continuity and trapping equations in the nitride layer using a drift-diffusion formalism. The continuity equation has been discretized using the Scharfetter–Gummel scheme and a modified Gummel-map has been optimized to ensure fully convergence of the equations. The numerical model is able to describe the memory device operation for different gate bias regimes, therefore addressing both the program/erase and the retention conditions. Finally, numerical results are shown to carefully reproduce experimental data on template devices with different gate stack compositions, validating the physical assumptions and making the model a valuable tool for nitride memories investigation and design. [ABSTRACT FROM AUTHOR]

In this work we investigate the impact of quantum mechanical effects on the device performance of n-type silicon nanowire transistors (NWT) for possible future CMOS applications at the scaling limit. For the purpose of this paper, we created Si NWTs with two channel crystallographic orientations 〈1 1 0〉 and 〈1 0 0〉 and six different cross-section profiles. In the first part, we study the impact of quantum corrections on the gate capacitance and mobile charge in the channel. The mobile charge to gate capacitance ratio, which is an indicator of the intrinsic performance of the NWTs, is also investigated. The influence of the rotating of the NWTs cross-sectional geometry by 90° on charge distribution in the channel is also studied. We compare the correlation between the charge profile in the channel and cross-sectional dimension for circular transistor with four different cross-sections diameters: 5 nm, 6 nm, 7 nm and 8 nm. In the second part of this paper, we expand the computational study by including different gate lengths for some of the Si NWTs. As a result, we establish a correlation between the mobile charge distribution in the channel and the gate capacitance, drain-induced barrier lowering (DIBL) and the subthreshold slope (SS). All calculations are based on a quantum mechanical description of the mobile charge distribution in the channel. This description is based on the solution of the Schrödinger equation in NWT cross sections along the current path, which is mandatory for nanowires with such ultra-scale dimensions. [ABSTRACT FROM AUTHOR]