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This paper investigates the thermo-mechanical stress experienced by axial lead fuses used in power electronics. Based on some experience, the approach used in this paper is pure thermal cycling, and the found failure mechanisms have been investigated through X-ray imaging. A two-step analysis, i.e. microscopic inspection and FEM thermo-mechanical simulation have been carried out based on the real geometry, including core and isolation materials, as well as the arc quenching one, which is typically quartz sand. The failure mechanism hypothesis of higher temperature variation at the end hole of the fuse element has been confirmed thanks to the analysis performed. Finally, the fatigue analysis is presented obtained by FEM-based fatigue tool. [ABSTRACT FROM AUTHOR]

The short-circuit oscillation mechanism in IGBTs is investigated in this paper by the aid of semiconductor device simulation tools. A 3.3-kV IGBT cell has been used for the simulations demonstrating that a single IGBT cell is able to oscillate together with the external circuit parasitic elements. The work presented here through both circuit and device analysis, confirms that the oscillations can be understood with focus on the device capacitive effects coming from the interaction between carrier concentration and the electric field. The paper also shows the 2-D effects during one oscillation cycle, revealing that the gate capacitance changes according with the shape of the electric field due to the charge distribution in the n-base. It has been identified that the time-varying capacitance leads to parametric oscillations together with the stray gate inductance, which limit the reliability of the IGBT. [ABSTRACT FROM AUTHOR]

This paper proposes a novel mission-profile-based reliability analysis approach for stress on bond wires in Silicon Carbide (SiC) MOSFET power modules using statistics and thermo-mechanical FEM analysis. In the proposed approach, both the operational and environmental thermal stresses are taken into account. The approach uses a two-dimension statistical analysis of the operating conditions in a real one-year mission profile sampled at time frames 5 min long. For every statistical bin corresponding to a given operating condition, the junction temperature evolution is estimated by a thermal network and the mechanical stress on bond wires is consequently extracted by finite-element simulations. In the final step, the considered mission profile is translated in a stress sequence to be used for Rainflow counting calculation and lifetime estimation. [ABSTRACT FROM AUTHOR]

In this paper, an experimental study is proposed to investigate the failure effects in IGBT large-area devices due to hard gate driving strategies. Thanks to quasi-3D simulations, a large overcurrent is predicted in few cells and corresponds to a large spike in the gate voltage during collector voltage transient, which is able to trigger the device instability. An interpretation of the phenomenon is given that attributes such spike to a strong current imbalance on the large area device, so that a latch-up failure mechanism is proposed. [ABSTRACT FROM AUTHOR]

Highlights: [•] We investigated the short circuit behaviour of GaN HFET devices. [•] We demonstrated that an unstable phenomenon takes place. [•] We demonstrate that the threshold voltage begins to decrease at high temperature. [•] We hypothesize that the observed instability is related to the gate voltage decrease. [Copyright &y& Elsevier]

Abstract: A new concept for testing of power devices, in particular IGBTs, under unclamped inductive switching (UIS) conditions has been adopted and presented in this paper. The testing apparatus is completely FPGA-based and is capable of setting each time of the test (especially the protection one) with a precision of 20ns. Furthermore, the FPGA embeds a microprocessor, which is responsible for the complete control of the apparatus by a personal computer. Fourth- and fifth-generation, low- and medium-voltage IGBTs have been tested thanks to the presented apparatus, and the collected results have been presented, evidencing significant behavioural differences between the two technologies. [Copyright &y& Elsevier]

Abstract: In this paper we present an experimental study of the gate damage exhibited by commercial n-channel power MOSFETs during ion exposure. The investigation has been performed in different bias conditions showing a strongly non linear relationship between the bias voltages at which the gate damage occurred. In addition, the gate damage observed at V GS =0V is quite dissimilar from what observed at negative gate-source voltages. In facts, at low gate-source voltage bias the gate damage mechanism progressively appears like a cumulative effect, while at higher voltage bias an abrupt gate damage reveals a typical single event effect. [Copyright &y& Elsevier]

Abstract: Thanks to an ad-hoc experimental test equipment, the reliability of MOSFET devices in soft-switching operations has been investigated aimed to discovering the role of the freewheeling phase in the device reliability reduction. Extensive tests at several temperatures, on-state currents, reverse current peaks, dc-voltages and gate timings have been done, showing that specific devices for soft-switching are needed to improve the overall converter reliability. Standard commercial MOSFETs are more prone to failures descending from huge power dissipation at the gate turn-off, related to preceding body diode usage. [Copyright &y& Elsevier]

Even though low voltage MOSFETs are fairly intrinsically robust to SEB, the high current pulses that arise in certain charge generating mechanisms may lead to circuit malfunction. In this work, for the first time, the current pulses induced by ion impacts in new generation commercial power MOSFETs are characterized by a statistical analysis. This approach allows us to evidence the existence, in these devices, of two different charge generation mechanisms. Furthermore, the capability to easily quantify these phenomena provides useful information for the design of circuits using these MOSFETs. The pulse shape and the total charge generated by the impact of an energetic ion are studied in relation to the energy and species of the ion and the applied voltage between drain and source. [Copyright &y& Elsevier]

This paper presents a novel loading evaluation procedure to be used for IGBT power cycling. The method is a combination of experimental life tests and finite element analysis digital twin. It was validated and predicted the life-time with 2.77% error, compared to the 8.78% error of the reference. • Damage model calibration method utilizing digital twin modelling in addition to experimental results • Methodology is presented and used on experimental results from multiple experiments. • Methodology found superior loading quantities to conventional fitting resulting in lower R^2 error. [ABSTRACT FROM AUTHOR]

The aim of this paper is to provide an extensive overview about the state-of-art commercially available SiC power MOSFET, focusing on their short-circuit ruggedness. A detailed literature investigation has been carried out, in order to collect and understand the latest research contribution within this topic and create a survey of the present scenario of SiC MOSFETs reliability evaluation and failure mode analysis, pointing out the evolution and improvements as well as the future challenges in this promising device technology. [ABSTRACT FROM AUTHOR]

Power cycling (PC) test is one of the important test methods to assess the reliability performance of power device modules related to packaging technology, in respect to temperature stress. In this paper, an advanced power cycler with a real-time V CE _ ON and V F measurement circuit for the IGBT and diode, which for the wear-out condition monitoring are presented. This advanced power cycler allows to perform power cycling test cost-effectively under conditions close to real power converter applications. In addition, an intelligent monitoring strategy for the separation of package-related wear-out failure mechanisms has been proposed. By means of the proposed method, the wear-out failure mechanisms of an IGBT module can be separated without any additional efforts during the power cycling tests. The validity and effectiveness of the proposed monitoring strategy are also verified by experiments. [ABSTRACT FROM AUTHOR]

An experimental characterization of the behavior of GaN power HEMTs during heavy ion irradiation is presented. It is demonstrated that normally off GaN power HEMTs are affected by a significant charge amplification mechanism. These devices are subjected to damages implying relevant increases of the drain leakage current. The damages are permanent and cumulative and depend on the biasing conditions. Higher voltage devices rated at 100 V and 200 V suffer from Single Event Burnouts which take place at biasing voltages lower than the maximum rated one. [ABSTRACT FROM AUTHOR]

The susceptibility of MW-level IGBT power modules to critical gate voltage oscillations during short circuit events has been evidenced experimentally. This paper proposes a sensitivity analysis method to better understand the oscillating behavior dependence on different operating conditions (i.e., collector–emitter voltage, gate-emitter voltage and temperature). A study case on 1.7 kV/1 kA IGBT power modules is presented. The proposed study helps to understand the oscillation mechanism by revealing its relationship with different working conditions. Moreover, the study can be helpful to understand the oscillation phenomenon, as well as to further improve the device performance during short circuit. [ABSTRACT FROM AUTHOR]

This paper proposes an accurate method to estimate the junction temperature using the on-state collector-emitter voltage at high current. By means of the proposed method, the estimation error which comes from the different temperatures of the interconnection materials in the module is compensated. Finally, it leads to satisfactory estimated results. The proposed method has been verified by means of an IR (Infra-Red) camera during power converter operations when the loading current is sinusoidal. [ABSTRACT FROM AUTHOR]

Highlights: [•] We propose a new method for stability analisys of IGBTs. [•] We use the K stability factor from Stern. [•] We demonstrated that an increase in the collector current reduces stability. [•] We demonstrated that an increase in the gate resistance reduces stability. [Copyright &y& Elsevier]

Abstract: The behavior of medium voltage commercial power MOSFETs, first degraded with increasing γ-rays doses and subsequently irradiated with heavy ions, is presented. It is shown that the degradation of the gate oxide caused by the γ irradiation severely corrupt the SEE robustness and drastically modify the physical behavior of the device under test after the impact of a heavy ion. A decrease of the critical voltages at which destructive burnouts and gate ruptures appear has been detected in all devices previously irradiated with γ-rays, the amount of the critical voltage reduction is strictly related to the amount of the absorbed γ-rays dose. Furthermore, at the failure voltage, the behavior of the device is affected by the conduction of a current through the gate oxide. Moreover the SEGR of the device appears at lower voltages due to the reduction of the Fowler–Nordheim limit in the γ-irradiated devices. [Copyright &y& Elsevier]

Abstract: An experimental characterization of new-generation normally-off vertical channel 1200V SiC JFETs under unclamped repetitive stress (URS) is presented. The drain and gate leakage currents are monitored, and their time evolution is recorded. The degradation of the leakage characteristics has been compared with repeated short circuits tests, at the same stress energy, thus demonstrating that different mechanisms take place in these conditions. Furthermore, a post-failure analysis of the surface of the device by means of a optic microscope indicates that a termination weakness could be the major cause for the device leakage increment and consequent failure. [Copyright &y& Elsevier]

Abstract: In this paper we present an experimental study aimed to identify the test conditions at which latent damages are created for different ion species with different energy losses both in the oxide and in the silicon. Moreover, with the help of 3-D finite element simulation, we give an interpretation for explaining the role played by the charge generated during the ion strike in starting the creation of the latent damage and in defining its amount. [Copyright &y& Elsevier]

Abstract: The behaviour in terms of robustness during unclamped operations of power IGBT modules is presented. The experimental characterization is aimed to identify the main instable phenomena during unclamped turn-off in power IGBT modules. Several devices of different generations, current and voltage ratings have been analyzed. Thanks to a non-destructive experimental set-up, it is possible to observe instable phenomena without causing the damage of the device under test. In this paper, it is shown that the destructive conditions during unclamped operations are preceded by precursors on the gate side which indicate instable phenomena taking place inside the device. The dependence of the destructive phenomenon on the driver conditions are widely and exhaustively analyzed. [Copyright &y& Elsevier]

Abstract: In this paper we present the results of an experimental work aimed to study the formation of “gate oxide damages” in patterned MOS capacitors during heavy ion irradiation. The samples under test are derived from 100V power MOSFETs. The damages on these structures have the same nature of the corresponding MOSFET but can be much more easily characterized. The gate damages resulting from both 79Br and 197Au ion irradiations are presented for different test conditions. [Copyright &y& Elsevier]

Abstract: The results presented in this paper are related to an experimental study that has the aim to evidence the formation of “latent gate oxide damages” in medium voltage power MOSFETs during the impact with energetic particles. The understanding of these “latent defectiveness” can be an helpful aid in the comprehension of the mechanisms of breach of the oxide layer of MOS structures induced by single energetic particles impact (single event gate rupture). To properly detect the presence of “latent damages” we have developed a high resolution experimental set-up and identified an appropriate region in which the device have to be biased in order to trigger this kind of damage. [Copyright &y& Elsevier]

A non-invasive temperature sensing method for high-voltage SiC MOSFET chips based on the measurement of light emission during reverse conduction is proposed. The method is based on a compact sensing circuit that can be easily embedded in the package, allowing online temperature estimation. The effectiveness of the circuit has been confirmed by the analysis of a commercial SiC power module. The proposed temperature sensing strategy is fast, inexpensive, accurate, and non-invasive. [ABSTRACT FROM AUTHOR]

This paper proposes a study on the possibility of using measurable electrical quantities in a DC/DC converter to infer the state of health of active and passive components. We worked out the dependence of several features of the output voltage waveform on the parametric drift of the main switch, the diode, the tank inductor, and the output capacitor. The goal is to use these findings for the implementation of machine-learning algorithms for indirect condition monitoring, i.e., not relying on the direct measurement of the critical parameters. The case study is a buck converter based on silicon-carbide MOSFETs. Simulation results show the sensitivity of various output voltage signal features to these parameters and also their correlations, and as a result, the most appropriate features for the condition monitoring purpose. The same approach can be implemented for other converters. • We proposed a simulation-based feature engineering of terminal signals for the condition monitoring of SiC converters. • We identified and selected time-domain feature sets for machine learning approaches to detect or predict faults and failures. • The time-domain features of the terminal values are investigated, including both the transient and steady-state ones. • We analyzed the features using correlation and sensitivity, and also introduced a modified sensitivity criterion. • We chose feature sets to monitor parametric drifts of components and checked their compliance with theories and experiments. [ABSTRACT FROM AUTHOR]

Thermal stress during abnormal events can severely affect the reliability of power semiconductor devices. This paper proposes a method to estimate the junction temperature T j evolution of insulated-gate bipolar transistors (IGBTs) during short circuit (SC). After the extensive non-destructive SC characterization of a commercial discrete 1.2 kV/40 A IGBT device and a proper calibration procedure, the IGBT SC current I SC is proved to be a suitable temperature-sensitive electrical parameter (TSEP) for an accurate and fast T j estimation. The method is easy to implement and shows promising performance for initial test temperature up to 150 °C. The T j estimation method takes into account self-heating effects and the dependence on the collector-to-emitter voltage V CE in a wide range of operating conditions. The estimated temperature has shown good agreement with simulation results based on the finite-element analysis (FEM) of the chip geometry. The results indicate that T j can be temporarily much higher than the datasheet maximum operating T j , without catastrophic failures, which represents a considerable threat to the reliability of these devices. • The IGBT short-circuit current represents a suitable electrical parameter for a non-invasive junction temperature estimation; • A calibration can be performed by mapping the current peak at different test temperatures and collector voltages; • A 1.2-kV IGBT has been tested under 10-μs short circuit pulses up to 150 °C and 700 V to demonstrate the calibration; • The calibration shows significant sensitivity and linearity, while the estimatied temperature matches FEM simulations. [ABSTRACT FROM AUTHOR]

When the device works in the real-field application, short-circuit events could happen along the whole lifetime of the component. In order to investigate the degradation effects of short-circuit events on power cycling, a mixed accelerated aging test combined with a repetitive short-circuit test has been performed for the 1.2-kV/20-A SiC MOSFET power module. The short-circuit robustness and repetitive short-circuit performance are analysed on the fresh device at first in order to understand the different levels of degradation. Then, the power cycling test is performed for two matched devices with the selected test conditions; one of them undergoes a number of short-circuit events and the other one, without short-circuit stress, is used as the reference. The experimental results exhibit a major implication of short-circuit degradation on power cycling and it would accelerate the degradation process of SiC MOSFETs. [ABSTRACT FROM AUTHOR]

This paper provides an insight into the impact of aging-related parameter drift in the operation of a 1.2 kV discrete SiC power MOSFET in a TO-247-4 package. First, the on-state and switching behavior of the pristine component is characterized using a physics-based, temperature-dependent PSpice model, optimized and validated with experimental data under a wide range of operational conditions. The package parasitic elements and lumped thermal network are extracted from finite element simulation of the device geometry. Subsequently, the degradation of several parameters, including threshold voltage and thermal impedance, are introduced in the model, based on the aging data reported in the literature for the same device and packaging technology. Hence, both models, with and without aging, are used to simulate and compare the thermal stress on the component during a mission profile for a traction inverter application. The simulations show a significant impact of the aged parameters on the device electrical and thermal performance for the given mission profile, leading to larger thermal stress at a chip and package level. [ABSTRACT FROM AUTHOR]

The aim of this paper is to present a comparison between failure analyses results performed on power SiC devices. Various devices have been submitted to SC (Short-circuit) stress and ITASC (Inverter Test with Accelerated Switching Conditions) method. Some similarities have been detected, as well as the same failure mode represented by a gate-source shorted-circuit. • Short-circuit have been performed to lead the SiC device to failure, however not in complete destruction; • ITASC method is used to define a hard switching condition up to device degradation; • The failure analysis performed on SiC devices after SC and ITASC stresses shows a same failure mode: shorted gate-source. • SC and ITASC stresses present different failure mechanisms. [ABSTRACT FROM AUTHOR]

This investigation focuses on determining the temperature-dependent leakage current limits which compromise the blocking safe operating area for silicon IGBT technologies. A discussion of a proper characterization method for selecting the maximum rated junction temperature for devices operating at high temperatures is given by comparing the different testing methods: Static performance (including and excluding self-heating effects), Short Circuit Safe Operating area and High-Temperature Reverse Bias. Additionally, a thermal model is used to predict the junction temperature at which thermal runaway takes place. In this paper guidelines are proposed based on the correlation among short circuit withstand capability and off-state leakage current for guarantying reliable operation and ensuring that they are thermally stable under parameter variations. This study is helpful to facilitate application engineers for defining the correct stability criteria and/or margins in respect of thermal runaway. [ABSTRACT FROM AUTHOR]

Molded IGBT modules are widely used in low power motor drive applications due to their advantage like compactness, low cost, and high reliability. Thermo-mechanical stress is generally the main cause of degradation of IGBT modules and thus much research has been performed to investigate the effect of temperature stresses on IGBT modules such as temperature swing and steady-state temperature. The temperature swing duration is also an important factor from a real application point of view, but there is a still lack of quantitative study. In this paper, the impact of temperature swing duration on the lifetime of 600 V, 30 A, 3-phase molded Intelligent Power Modules (IPM) and their failure mechanisms are investigated. The study is based on the accelerated power cycling test results of 36 samples under 6 different conditions and tests are performed under realistic electrical conditions by an advanced power cycling test setup. The results show that the temperature swing duration has a significant effect on the lifetime of IGBT modules. Longer temperature swing duration leads to the smaller number of cycles to failure. Further, it also shows that the bond-wire crack is the main failure mechanism of the tested IGBT modules. [ABSTRACT FROM AUTHOR]

The failure of SiC Schottky diodes due to the impact of high energy heavy ions is investigated by means of electro-thermal and thermal finite element simulations. In particular, 3D ATLAS simulation of a small portion of the diode structure is used for computing the dissipated power density, which is subsequently used as input for the thermal COMSOL simulation of the complete system including chip and packaging. Results show that, as a consequence of the ion penetrating through the device, the temperature at the Schottky barrier becomes bigger than the SiC melting point for a time large enough to cause permanent damages to the SiC lattice. Simulation results are in good agreement with experiments presented in the literature. [ABSTRACT FROM AUTHOR]

Abstract: The paper describes the design of switching converters suitable for power supply application in the LHC proton accelerator, in operation since 2010 at the European Organization for Nuclear Research (CERN) in Geneva (Switzerland). Experiments running at LHC must reliably operate in a harsh environment, due to radiation, high magnetic fields, and stringent thermal constraints. The followed approach takes into account the very tight reliability requirements during all the design stages, from the choice of circuit topologies and radiation hard power components, to the thermal layout and material optimization. Results carried out on prototypes are reported. [Copyright &y& Elsevier]

Abstract: A new test methodology for the analysis of SEE in power MOSFET is presented. It is based on the combined use of an Ion Electron Emission Microscope (IEEM) and an experimental set-up which is able to acquire the drain signals associated to the impacts during the irradiation. The charge generation sensitivity map of a 200V power MOSFET has been measured. It indicates the areas where the impacting particles generate the maximum charge. This map is strictly correlated with the sensitivity map of the device to SEB. [Copyright &y& Elsevier]

Abstract: The behaviour in terms of robustness during turn-off of power IGBT modules is presented. The experimental characterisation is aimed to identify the main limits during turn-off in power IGBT modules in typical hard switching applications. In this paper an experimental characterization of high power IGBT modules at output currents beyond RBSOA, at high junction temperatures and under different driving conditions is presented. Several devices of different generations, current and voltage ratings have been considered. The experimental characterisation has been performed by means of a non-destructive experimental set-up where IGBT modules are switched in presence of a protection circuit that is able to prevent device failure at the occurrence of any possible instable behaviour. The experimental analysis confirms the very good robustness of high power IGBT modules which can withstand large current overstress well beyond the declared RBSOA limits even at temperatures larger than those one declared by manufacturers. A comparison between IGBT device generation is also presented. [Copyright &y& Elsevier]

Abstract: The behaviour in terms of robustness of series-connected high power IGBT modules is presented, arranged in a topology which ensures voltage balance on IGBT’s and diodes by means of a simple auxiliary circuit applied directly on the high power devices, which are used in hard switching mode. Analyses in terms of IGBT and diode SOA (safe operating area), collector to emitter voltage gradient and short circuit condition are reported as well as an extended experimental characterisation. Both analyses confirm superior switching rating and system reliability, by using two series-connected IGBT in substitution of a single module, same current and double voltage rated. Moreover, thanks the auxiliary circuit presence, the robustness of total system is maintained also in extreme operating conditions. [Copyright &y& Elsevier]

Abstract: Sharp voltage gradients act as a stimulus for high power IGBT modules, which can exhibit a potentially instable high frequency behaviour. In fact, they can act as a radio frequency amplifier and, in particular operating conditions, the interaction between the device and the control or the external circuit can cause self-sustaining oscillations or the enhancement of the unevenness in current distribution inside a power module thus having a significant impact on the reliability of the power converter. Moreover, this RF amplification worsen the generated EMI (Electro Magnetic Interference). This paper presents an extensive experimental investigation about the high frequency behaviour of IGBT high power modules. The measurements were performed by means of an original experimental set-up that was specifically conceived and constructed. The data are analysed with the help of a theoretical small signal model which is able to describe RF behaviour of high power IGBT modules. [Copyright &y& Elsevier]

Abstract: We present a 3-D simulation analysis related to an experimental study which clarifies the role played by the parasitic BJT activation on the interaction between generated charge and electric field during ion impact in SEB/SEGR of power MOSFET. This activation is caused by the movement of the holes deposited during the ion impact and gives rise to a huge amount of charge that is sustained by avalanche multiplication. During SEGR phenomena this generated charge interact with the high electric field that is formed underneath the gate oxide thus causing damages to it. During SEB phenomena the generated charge causes a double injection phenomenon to take place that induces an electrical instability and, then, the MOSFET destruction. [Copyright &y& Elsevier]

When the SiC MOSFET works in the normal operating conditions, its remaining useful lifetime used to be estimated based on the monitored parameters and the lifetime model derived from accelerated tests. In this case, the degradation caused by abnormal events has not been considered. Therefore, it makes sense to investigate the effect of short-circuit degradation on the remaining useful lifetime of SiC MOSFETs. A different number of repetitive short-circuit events have been introduced into the accelerated power cycling tests to assess the impact. The experimental results indicate a gate degradation with the increasing number of short-circuit repetitions, which leads to higher conduction loss and earlier failure. Further failure analysis is achieved by performing lock-in thermography, scanning electron microscopy, and focused ion beam. • The mixed power cycling tests with different short-circuit stress are performed on 1000-V 22-A SiC MOSFETs. • A larger number of short-circuit repetitions induce higher gate leakage current, temperature swing and earlier failure. • A dielectric silicon dioxide crack is observed, which may form the higher gate leakage current. • The inhomogeneity of aluminium grains size might be caused by a strong vertical temperature gradient during the test. [ABSTRACT FROM AUTHOR]

In this paper, an original study on moisture absorption and desorption inside silicone gel for power modules is presented. Silicone gel from two suppliers has been cured at different conditions and exposed to a defined humid environment for a defined amount of time. The mass of gel, the relative humidity, and the temperature at a certain depth beneath the gel surface have been measured, and the moisture diffusion coefficients inside the specimens have been calculated. For the two materials we observed significantly-different changes in gel mass, but similar humidity levels deep inside the gel. The influence of curing and bake-out conditions as well as the difference in absorption and transport in the materials has also been discussed. [ABSTRACT FROM AUTHOR]

Nowadays, MOSFET SiC semiconductors short circuit capability is a key issue. SiC/Si Cascodes are compound semiconductors that, in some aspects, show a similar MOSFET behaviour. No interlayer dielectric insulation suggests, in theory, Cascode JFETs as more robust devices. The purpose of this paper is to compare the drift and degradation of two commercial devices static parameters by exposing them to different levels of repetitive 1.5 μs short-circuit campaigns at 85% of its breakdown voltage. Short-circuit time has been set experimentally, and longer times result in catastrophic failure of MOSFET devices due to over self-heating. For this purpose, pre- and post-test short circuit characterizations are presented. • Si/SiC Cascode shows an improvement of drain-source leakage current after the high voltage short-circuit tests. • Si/SiC Cascode shows lower peak current degradation than MOSFET influenced by a lower JFET saturation current. • ON resistance increase is higher in the Si/SiC Cascode than SiC MOSFET. [ABSTRACT FROM AUTHOR]