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Highlights • Flexible perovskite solar cells were printed using lead acetate as precursor. • The effect of the processing temperature was investigated. • The effect of PCBM layer thickness was correlated with the device performance. • We report an average efficiency of 5% and a maximum efficiency of 6.5%. Abstract The impressive increase of power conversion efficiency of hybrid perovskites within a few years has made perovskites one of the most promising materials for photovoltaic applications. However, the route to their commercialization necessitates the establishment of reliable and reproducible large–area fabrication of high efficient perovskite-based solar cells. In this paper, we report the fabrication of flexible, printed, lead acetate – based perovskite solar cells under ambient conditions by slot–die coating. The adoption of lead acetate as a precursor ensured the fast crystallization of the perovskite by one–step deposition method, without a further annealing step, suggesting a rapid and low–temperature procedure. The optimization of the processing temperature and the thickness of PCBM layer were proved to be key factors for device performance. The crystal formation of perovskite was confirmed by X-Ray Diffraction and the thickness values of each layer of the inverted device structure were derived by Spectroscopic Ellipsometry. Moreover, Atomic Force Microscopy verified the low value of roughness of perovskite film along with the effective planarization of PC 60 BM layer. Finally, we report a reproducible, scalable, Roll–to–Roll compatible fabrication process of efficient perovskite solar cells exhibiting performance up to 6.5%. [ABSTRACT FROM AUTHOR]

Flexible Organic Field-Effect Transistors (OFETs) constitute nowadays a highly promising field of the organic and printed electronics due to their multiple applications (flexible displays, sensors etc.). However, their cost-effective fabrication by large area Roll-to-Roll compatible printing methods still remains a challenge for their integration to commercial products. In this work, the moderate speed (1 m/min) process of the flexible cross-linked Poly(4-vinyl phenol) (PVP) polymer gate dielectric layer was carried out by integrating a slot-die method that mimics the Roll-to-Roll (R2R) coating conditions, in combination to an airbrush spray method for the solution-processing of the 6,13-bis(triisopropylsilylethynyl)-pentacene (TIPS-PEN) organic semiconductor. Particularly, the PVP dielectric was slot-die-coated over a 90 × 15 cm2 substrate, while subsequently the TIPS-PEN semiconductor was sprayed onto the 15 × 20 mm2 cPVP-patterned plastic substrates. Α surface investigation study on the well-formed slot-die-coated cPVP strips was conducted, revealing desirable dielectric film topography as a result of the good control over the coating process. A detailed analysis of the cPVP thickness evolution along the 90 × 1.3 cm2 patterned stripe, was carried out. The morphological analysis of the sprayed TIPS-PEN layer over the cPVP film revealed well-organized large crystalline domains across the channel area, as a result of the sufficient crystallization time and the excellent cPVP surface morphology. The fabricated bottom gate/top contact flexible OFETs exhibited excellent I-V electrical characteristics with a maximum mobility of 0.21 cm2/V, negligible hysteresis, low threshold voltages (average value of −0.1 V) and on/off current ratios in the range of 103 to >104. These results demonstrate the potentiality of the proposed scalable methods for the large scale fabrication of high performance low-cost OFET devices. Image 1 • Slot-die coating of cPVP dielectric film onto 90 × 15 cm2 PET/IMI substrate. • Smooth slot-die-coated cPVP films with RMSR values in the range of 0.5–0.7 nm. • Spray-coating of TIPS-Pentacene semiconductor onto slot-die-coated cPVP dielectric. • Well-ordered large-sized crystalline domains across the device channel area. • Mobility values up to 0.21 cm2/Vs, negligible hysteresis, on/off current ratio 103 to >104. [ABSTRACT FROM AUTHOR]