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In this work, a dual-sided buffer template, which allows the deposition of YB 2 Cu 3 O 7-δ (YBCO) coated conductors on both sides, has been proposed and investigated. Theoretically, in contrast to traditional YBCO structure on one side, the performance of critical current in YBCO films has been improved by two times. In this buffer structure, the dual-sided Y 2 O 3 films were grown on a flexible metal template by a home-made reel-to-reel dynamic direct current sputtering system and the film growth parameters were systematically investigated. The microstructure were characterized by in situ reflection high-energy electron diffraction monitoring in real time during the deposition stage. X-ray diffraction, and atomic force microscopy were used to detect the biaxial texture and surface morphology, respectively. What's more, by the application of stopping and range of ions in matter software, it helped us to understand the influence of deposition parameter to the growth rate of Y 2 O 3 films. Finally, the biaxial texture of dual-sided Y 2 O 3 film yielded out-of-plane texture of Δ ω = 4.2° and in-plane texture of Δ Φ = 5.2° for one side, as well as Δ ω = 5° and Δ Φ = 5.3° for the second side. Subsequently, the dual-sided YBCO superconducting films were coated on the above Y 2 O 3 buffer layer by low-cost metal-organic chemical vapor deposition method with critical current of 30 A/cm and 60 A/cm for each side. [ABSTRACT FROM AUTHOR]

• Dynamic current hysteresis that can well capture the effect of the trap energy level, trap density and scan rate is proposed. • This Dynamic current hysteresis model based on trap kinetics is well compatible with SPICE simulations. • The methodology of this hysteresis model can be well extended to other trap kinetics theory and emerging devices. This paper proposes a dynamic current hysteresis model for the Indium Gallium Zinc Oxide Thin Film Transistor (IGZO-TFT). Based on the Shockley-Read-Hall (SRH) theory, a kinetic equation that accurately describes the interface trap's capture/emission behaviour is presented, which can incorporate the effect of interface trap density, trap energy level and scan rate dependency. Further, the kinetic equation is solved using a sub-circuit approach, combined with a calibrated TFT static current model, to achieve an accurate simulation of the current hysteresis of IGZO-TFT. This model has been validated with numerical TCAD simulations and has been shown to precisely reflect the effect of trap energy level, trap density and scan rate on the current hysteresis characteristics. [ABSTRACT FROM AUTHOR]

• The infrared emissivity presents periodical fluctuation phenomenon along edge length. • The peaked frequency is inclined to shift towards lower region with area ratio increased. • There exists intrinsic attenuation which is probably attributed to the diffuse scattering. Composites or structures with adequate infrared reflection and microwave transmission are favorable from practical point of view. In this paper, oriented flaky aluminum filled pyramidal-frustum shaped periodic coatings was developed, and the effect of area of flaky aluminum powder filled coating on the infrared emissivity as well as microwave transmission behavior was intensively studied combined experiments with simulation. Results shown that the increments of oriented flaky aluminum filled coating could effectively reduce infrared emissivity. After spraying flaky aluminum filled periodic structures on the microwave absorbing material, the frequency corresponding to minimal reflection loss is inclined to shift towards lower frequency. Numerical simulation results shown that reflection coefficient gradually increases with increasing in frequency and area ratio of flaky aluminum filled coating. Besides, there exists intrinsic attenuation of flaky aluminum filled pyramidal-frustum shaped periodic coating, which is probably attributed to the diffuse scattering within step edge region. [ABSTRACT FROM AUTHOR]

A precision bandgap reference (BGR) with high power supply ripple rejection (PSRR) and low temperature coefficient (TC) is proposed for the peripheral compensation circuitry of active-matrix organic light-emitting diode (AMOLED) displays. The PSRR is enhanced by a coupling structure of the power supply and a feedback loop of the start-up circuit. Furthermore, a high-order nonlinear compensation method is proposed to reduce the temperature coefficient by utilizing the systematic nonlinear offset voltage within the bandgap circuit. Measurement results of the proposed BGR implemented in an industrial 0.25-μm CMOS process demonstrate a TC of 4.99 ​ppm/°C in a wide temperature range of −40 ​°C–130 ​°C. A PSRR around −80 dB is also achieved by the proposed circuit at low frequency. [ABSTRACT FROM AUTHOR]