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In this paper a new low-voltage low-power instrumentation amplifier (IA) is presented. The proposed IA is based on supply current sensing technique where Op-Amps in traditional IA based on this technique are replaced with voltage buffers (VBs). This modification results in a very simplified circuit, robust performance against mismatches and high frequency performance. To reduce the required supply voltage, a low-voltage resistor-based current mirror is used to transfer the input current to the load. The input and output signals are of voltage kind and the proposed IA shows ideal infinite input impedance and a very low output one. PSPICE simulation results, using 0.18 μm TSMC CMOS technology and supply voltage of ±0.9 V, show a 71 dB CMRR and a 85 MHz constant −3 dB bandwidth for differential-mode gain (ranging from 0 dB to 18 dB). The output impedance of the proposed circuit is 1.7 Ω and its power consumption is 770 µW. The method introduced in this paper can also be applied to traditional circuits based on Op-Amp supply current sensing technique. [ABSTRACT FROM AUTHOR]

In this paper, analysis and design of a new current-mode instrumentation amplifier (CMIA) circuit is presented. The proposed circuit employs two Current Operational Amplifiers (COA) as active building blocks, one resistor and two transistors operating as variable resistors to electronically control the differential-mode gain. The main feature of the proposed CMIA is that unlike most previously reported CMIAs, its CMRR has negligible sensitivity to mismatches. In addition, in the proposed circuit both active building blocks operate in negative feedback loop which results in an overall enhanced performance. SPICE simulation results using 0.18 μm TSMC CMOS parameters and supply voltage of ±0.9 V show a constant CMRR of about 51 dB regardless of mismatches and wide bandwidth ranging from 14.8 MHz to about 3 MHz for differential-mode gains between 3 and 18 dB, respectively. [ABSTRACT FROM AUTHOR]

In this paper a new topology for implementing Current-Mode Instrumentation Amplifiers (CMIA) is presented. The proposed CMIA is based on two single input-multiple output (SI-MO) current operational amplifiers (COAs) as basic building blocks and 2 resistors. To electronically control the differential-mode gain, a transistor operating in triode region is used which acts as a variable resistor. The significant feature of the proposed CMIA is that the active building blocks operate in closed loop configuration. Therefore it exhibits numerous remarkable features such as improved frequency performance, low THD and very low input impedance. In addition, it has fully differential output which reduces the output noise and increases its application. The proposed CMIA is analyzed and simulated with SPICE program using parameters of 0.18 µm CMOS technology and supply voltage of ±0.9 V. [ABSTRACT FROM AUTHOR]

In this paper, new analog memristor emulator circuits based on current backward transconductance amplifier (CBTA) and passive elements are proposed. They emulate both types of memristor (incremental and decremental) just by interchanging the CBTA output terminals. It uses only one CBTA, two resistors, one capacitor and one multiplier emulating grounded memristor. They consist of less CMOS transistors and have wider output ranges compared to other designed emulator circuits. The CMOS implementation of the CBTA using 0.18 μm level-7 TSMC CMOS technology parameters is also proposed. It uses 23 CMOS transistors operating with the ±0.9 V DC supply voltage. Theoretical derivations and related results are validated using SPICE simulations. [ABSTRACT FROM AUTHOR]

A novel current-mode rms-to-dc converter architecture is introduced in this paper. It is constructed from a current squaring stage and a lowpass filter with low cutoff frequency realized using the concept of Log-Domain filtering. Due to the employment of the current-splitter, two-quadrant operation capability is achieved by the converter. The Log-Domain technique offers the benefits of large-signal operation and realization of the required time-constant using a capacitor of an integrable value. Another attractive feature of the proposed scheme is its low-power operation capability originated from the employment of MOS transistors operated in the subthreshold region and its simple circuitry. [ABSTRACT FROM AUTHOR]

A novel circuit configuration for the realization of low power single-input three-output (SITO) current mode (CM) filters employing only MOS transistors are presented. The proposed circuit can realize low-pass (LP), band-pass (BP) and high-pass (HP) filter functions simultaneously at three high impedance outputs without changing configuration. Despite the other previously reported works, the proposed circuit is free from resistors and passive capacitors. Instead of passive capacitors; the gate-source capacitor of MOS transistor is used making the proposed circuit ideally suitable for integration. Compared to other works, the proposed filter has also the lowest number of transistors and lowest power consumption. The proposed circuit exhibits low-input and high-output impedances, which is highly desirable for cascading in CM signal processing. Moreover, it is center frequency can be electronically adjusted using a control current without a significant effect on quality factor (Q) granting it the highly desirable capability of electronic tunability. Transfer functions of the LP, BP and HP outputs are derived and the performance of the proposed circuit is proved through pre layout and post layout simulations at supply voltage of 1.8 V and using 0.18 μm CMOS process parameters. The power consumption and the required chip area are only 0.5 mW and 77.4 μm × 70.2 μm, respectively. [ABSTRACT FROM AUTHOR]

Abstract: In this paper, a new CMOS grounded positive tunable inductor simulator based on using two simple CMOS transconductors and an inverting amplifier is presented. The introduced inductor simulator uses a grounded capacitor; accordingly, it is suitable for integrated circuit (IC) fabrication. In addition a CMOS circuit for realizing negative tunable resistor which can be used for parasitic cancellation in inductor simulators and consequently enhancing their frequency performances is developed. A novel method for providing high-frequency performance improvement of simulated inductors is also introduced. Simulation and experimental results are given to demonstrate the performance of the developed inductor simulator and validity of the proposed frequency performance improvement method. [Copyright &y& Elsevier]

Abstract: In this paper two new grounded inductance simulators based on DXCCII suitable for operation in 30kHz–30MHz frequency range, are presented. The proposed circuits both employ only a single dual X second-generation current conveyor (DXCCII) active device accompanied with three and four passive elements, respectively. The accuracy of the simulated inductors is verified by implementing them in some filter applications. Also, a novel multi-input single-output universal filter derived from one of the new grounded inductance simulators is simulated to demonstrate the functionality of the proposed circuit. Simulation results using AMS 0.35μm CMOS process technology parameters are included. [Copyright &y& Elsevier]

Abstract: In this paper, a novel two-input two-output current-mode (CM) circuit for providing proportional-integral-derivative (PID) controller and instrumentation amplifier (IA) responses, depending on the passive component selection, is presented. The developed circuit uses only grounded capacitors (PID controller selection) and only grounded resistors (IA choice); accordingly, it is convenient for integrated circuit (IC) fabrication. The proposed new configuration can simultaneously realize both gain variable non-inverting and inverting responses without requiring extra additional components. The proposed topology for providing high output impedance currents can be easily cascaded with other CM structures. Finally, some time domain and frequency domain analysis with SPICE simulation program and experimental results are included to show workability and effectiveness of the proposed circuit. [Copyright &y& Elsevier]

Abstract: In this paper, a number of simulated floating inductors (FIs) employing second-generation current conveyor (CCII), current-feedback operational amplifier (CFOA), differential voltage current conveyor (DVCC) and differential difference current conveyor (DDCC) are proposed. They employ only a grounded capacitor; accordingly, they are suitable for integrated circuit (IC) implementation. Some of the developed FI simulators demonstrate the feature of improved low-frequency performance while the other ones suffer from the Z/Y terminal parasitic resistors bringing extra series resistors to the inductances of the simulated FIs. Two novel methods for reducing/eliminating the unwanted series resistance in equivalent inductances of the FIs are developed, one of which is called the direct design technique accomplished by adjusting the resistive component/components of the FIs. The series resistors of the FIs affecting their low-frequency performance can be canceled by adding floating negative resistors in series, which is another method. Three of the presented FIs as examples are chosen in order to verify the developed method, perform their simulations and show their performance. [Copyright &y& Elsevier]

Abstract: In this paper, a general structure for realizing high-order current-mode analog filter responses with single-input and three-outputs is presented. The proposed circuit uses dual-output second-generation current controlled conveyors (DO-CCCIIs) and only grounded capacitors (Active-C structure), and can simultaneously realize low-pass, band-pass (if order is even number) and high-pass filter responses. The developed circuit does not require any component matching constraints thus it is suitable for fully integrated circuit (IC) technology. Simulations are performed for the fourth-order Butterworth filter to illustrate the frequency domain performance of the circuit. [Copyright &y& Elsevier]

Abstract: It is well known that second-generation current conveyors (CCII) are widely used for the realization of second-order current-mode universal filters. A filter with high-quality factor and gain constant suffers from various signal swing restrictions especially at its angular resonance frequency (. This is due to the terminal voltages of the CCIIs limited by the power supply voltages and maximum allowable terminal currents of the CCIIs. In this paper, signal limitations of the CCII-based current-mode filters are investigated in detail. A filter example is given to exhibit the signal limitations of a universal current-mode filter. The time-domain and frequency-domain results of the proposed filter are also given to verify the theoretical analysis. [Copyright &y& Elsevier]

Abstract: In this paper, a current-mode (CM) Kerwin–Huelsman–Newcomb (KHN) biquad is proposed. The circuit employs three differential-voltage current conveyors (DVCCs) as active elements together with two capacitors and four resistors as passive elements, which all are grounded. The circuit simultaneously provides the three basic filter functions, namely bandpass (BP), highpass (HP) and lowpass (LP) functions. The notch and allpass (AP) functions can be obtained by connecting appropriate output currents directly without using additional active elements. The output signals are obtained at high output impedance ports, which is important for easy cascading in CM operation. SPICE simulation results are given to verify the theoretical analyses. [Copyright &y& Elsevier]

In this paper, a new inverting second-generation current conveyor-based first-order current-mode universal filter is proposed. The main features of the proposed filter are described as follows: the use of a grounded capacitor that is attractive for integration, electronically tunable, no passive element matching condition, resistor-less, having the feature of both low input and high output impedances as well as providing all the first-order universal filter responses such as low-pass, high-pass and all-pass ones. As application examples, a sinusoidal oscillator and a four-phase oscillator are given. Many simulations through SPICE program and some experiments are achieved in order to exhibit the performance of the proposed filter. [ABSTRACT FROM AUTHOR]

In this paper, a new current-mode instrumentation amplifier with electronic tuning and low-voltage operation capabilities is presented. Simplicity is other important feature so that the whole circuit is composed of only 20 transistors. All the above have been achieved using MOS transistors biased in the sub-threshold region. The required current-controlled gain stage has been implemented using an appropriate translinear loop which is fed by the output of a current subtraction stage, realized through the employment of flipped voltage follower based current-mirrors. The performance of the presented amplifier is evaluated through simulation results, using the Cadence suite and MOS transistors models provided by the Austria Mikro Systeme 0.35 μ m CMOS process. The differential gain was 20 – 40 dB , the Common-Mode Rejection Ratio (CMRR) was 44.4 – 48.9 dB , achieved at power dissipation 72.75 – 386.1 nW. The bandwidth was 7 kHz and the Total Harmonic Distortion (THD) was 2 % for an input signal with amplitude equal to 550 pA. As an application example, the proposed current-mode instrumentation amplifier has been employed for removing the noise component in electrocardiogram signals. [ABSTRACT FROM AUTHOR]

Enhancing a topology of the literature, single-input multiple-output first-order inverse filter topologies are presented in this work. They offer the features of minimized circuit complexity, grounded capacitors requirement and, the most important, the capability of cascade connection with other stages without extra buffers needed. This is achieved thanks to the properties of the Current Feedback Operational Amplifier terminals. The behavior of the structures with regards to the effect of parasitics is evaluated for establishing the suitable frequency range of their operation. The performance of the filters is evaluated using the OrCAD PSpice suite, as well as through experimental results. [ABSTRACT FROM AUTHOR]

Abstract A new voltage-mode (VM) proportional integral derivative (PID) controller employing only a single active component named Current Feedback Operational Amplifier (CFOA), two resistors and two grounded capacitors is proposed. The proposed PID controller employs a canonical number of only grounded capacitors without requiring any critical passive component matching conditions and cancellation constraints. It has high input and low output impedances; thus, it can be easily cascaded with other VM structures. It can be easily constructed by a single commercially available active element. Frequency-dependent non-ideal gain and parasitic impedance effects on the performance of the proposed PID controller are investigated. The performance of the proposed PID controller circuit is demonstrated by using PSPICE circuit simulation program and an experiment. Also, 0.18 μm CMOS TSMC technology parameters with ±2 V supply voltages are used. Total power dissipation of the proposed PID controller is 1.64 mW. [ABSTRACT FROM AUTHOR]

In this study, two new lossless grounded inductor simulators (GISs) made up of a single plus-type second-generation current conveyor, two inverting voltage buffers and a minimum number of passive components are proposed. There is no requirement of matching conditions and cancellation constraints among passive elements of the proposed GISs. Nevertheless, both of the proposed GISs have a floating capacitor which can be easily realized in nowadays integrated circuit fabrication. A second-order voltage-mode band-pass filter application is given for the proposed lossless GISs. A number of simulations based on SPICE program are given so as to verify the theory. [ABSTRACT FROM AUTHOR]

In this paper, a new low-power versatile current-mode rectifier is proposed. As a salient feature, the proposed rectifier provides two positive half-wave, two inverting negative half-wave or two full-wave outputs from the same configuration. The proposed circuit employs only a dual-output second-generation current conveyor (DO-CCII) and a core rectifying circuit consisting of twelve MOS transistors. The input and output signals are current. Favorably, by adding two additional transistors, the proposed rectifier can also rectify voltage signals with electronic tuning capability. The simple and MOS only structure of the proposed circuit is highly attractive from integration point of view. In spite of providing multiple outputs at the same time, the proposed rectifier enjoys low power consumption. PSPICE simulations using 0.18 μm CMOS parameters and supply voltage of ±0.9 V demonstrate a precise operation and good temperature stability. [ABSTRACT FROM AUTHOR]

In this paper, a new electronically tunable current-mode (CM) first-order universal filter as a new application for inverting second-generation current conveyors (ICCIIs) is proposed. The proposed circuit is based on two ICCII and a capacitor and does not need any resistors and critical passive component matching conditions. It has one input and multiple outputs and simultaneously realizes both inverting and non-inverting first-order low-pass, high-pass and all-pass responses from the same configuration. Employing ICCII as active building block makes possible using a single transistor in linear region as a variable resistor to control filter properties electronically. Nevertheless, the proposed CM first-order universal filter possesses a floating capacitor which can be easily realized in nowadays integrated circuit technologies. It is designed and simulated with SPICE program using 0.13 µm IBM CMOS parameters and supply voltage of ±0.75 V. Non-ideal analysis and Monte Carlo simulation results are also given, which prove good enough response even in the presence of non-idealities and process parameter variations. [ABSTRACT FROM AUTHOR]

In this study, we present two new grounded capacitance multiplier circuits based on a negative-type second-generation current conveyor (CCII-) and an inverting second-generation current conveyor (ICCII). The first proposed circuit consists of one CCII- and a voltage follower (VF) employing two NMOS transistors while the second proposed circuit is composed of an ICCII and an inverting voltage follower (IVF) including two NMOS transistors. Each circuit contains two resistors, and single grounded capacitor, which is attractive for integrated circuit realization. No active and passive component matching conditions are required for the realization of the proposed capacitance multiplier circuits. The simulation results are included to confirm the theory. [ABSTRACT FROM AUTHOR]

In this study, we present a new NMOS implementation of differential difference stage containing only eight transistors. The introduced new differential difference stage has high input impedance and low output impedance; accordingly, it can be directly cascaded without loading effect. In addition, a detailed study on the input referred noise voltage density of the proposed differential difference stage is performed and low noise design possibility is investigated. As an example, to show performance of differential difference stage, a modified band-pass filter with high quality factor is presented for intermediate frequency stage of FM receiver. Furthermore, the non-ideal, parasitic and stability analyses of the presented filter having high quality factor are surveyed and its working boundaries are determined. [ABSTRACT FROM AUTHOR]

This paper introduces a new floating simulator circuit suitable for realizing a floating frequency dependent negative resistor (FFDNR) or a floating capacitance multiplier (FCM) with selections of the passive elements. In addition, a new circuit for realizing a simulated floating inductor (SFI) is introduced. The introduced FFDNR, FCM, and SFI use three current feedback operational amplifiers. The introduced FFDNR and FCM include a canonical number of passive components without any matching requirements, while the SFI contains three resistors and a grounded capacitor with a single resistive matching condition. Voltage-mode band-pass, low-pass, and notch filters are given as application examples. [ABSTRACT FROM AUTHOR]

The equivalence of fractional-order inverse filters with fractional-order controllers is demonstrated in this work. This is achieved by appropriately rewriting the filters transfer functions in order to clarify the correspondence between the gain and time-constant of the filters and the scaling factor and differentiation/integration constant of the controllers. Possible implementations of fractional-order inverse filters using second generation voltage conveyors are presented and an application example, related to the control of a motion system, is demonstrated for evaluating the behavior of the introduced structures. [ABSTRACT FROM AUTHOR]

In this paper, a new method is presented to increase the quality factor of bandpass filters employing active elements. Using the proposed method the values of the externally capacitors in filter structure are reduced. In this way chip area which is an important parameter in the integrated circuits can be minimized. Moreover, bandpass filters are investigated from the point of view of stability conditions and effects of the parasitic and non-ideal elements. Considering these effects, operating conditions and boundaries of the bandpass filter are calculated. To validate the feasibility of the method, an application example of bandpass filter used in intermediate frequency (IF) stage of AM receivers is given and the performance of the circuit is demonstrated by comparing the theory and simulation. [ABSTRACT FROM AUTHOR]

In this work, applications of current inverting metamutator (CIM) are explored in fractional domain for the very first time. The realization of a current-mode universal fractional-order filter (FOF) and a sinusoidal fractional-order oscillator (FOO) circuit utilizing one CIM block is presented. The functionality of the proposed structures are verified through SPICE simulations using 180 nm CMOS technology parameters. Stability analysis has been presented for the proposed circuits. Robustness of the proposed circuits is verified through sensitivity, Monte-Carlo and mismatch analysis. [Display omitted] • Applications of current inverting metamutator (CIM) are explored in fractional domain. • Current-mode universal fractional-order filter (FOF) and sinusoidal fractional-order oscillator (FOO) are presented. • Stability analysis for the circuits are presented. [ABSTRACT FROM AUTHOR]

Abstract: Actively simulated grounded inductors have been used in several applications ranging from filter to oscillator design as well as cancellation of parasitic inductances. In this paper, new grounded inductance simulators employing only one voltage differencing current conveyor (VDCC) and two passive components are proposed. Two new topologies for realizing positive and negative lossless inductances and four different topologies for realizing lossy inductances are proposed. The aim of this paper is to present new inductance simulators using the minimum number of active and passive components. The proposed inductance simulators can be tuned electronically by changing the biasing current of the VDCC. Moreover, the circuits do not require any conditions of component matching. Finally, using one of the proposed inductance simulators a third-order high-pass filter is constructed. The performance of the proposed filter is verified and simulated by using SPICE. [Copyright &y& Elsevier]

Abstract: Analog circuit designers have usually focused on the design of circuits employing a minimum number of components, occupying less area and dissipating less power. However, some important issues such as signal limitations and especially stability problems of the analog circuits have not received considerable attention in the literature. Hence, the work described in this paper deals with the stability problems of two new current-mode analog filters employing multiple output current controlled conveyors (MOCCCIIs). Toward that end, a single pole model is replaced for each non-ideal current gain of the MOCCCIIs. Both of the novel universal current-mode active-C filters can simultaneously realize low-pass, band-pass and high-pass/notch filter responses. SPICE and MATLAB simulation results are given to verify the theoretical analysis. [Copyright &y& Elsevier]

A novel structure of multi-phase sinusoidal oscillator is introduced in this work. Its realization is based on the employment of the shadow filtering technique, which offers the benefit of the independent tuning of the oscillation frequency as well as of the condition of oscillation through external amplifiers. The core of the oscillator remains unchanged during the tuning process and, therefore, the introduced concept achieves design flexibility and modularity. A design example is provided, where the implementation of the oscillator is performed through the utilization of Current Feedback Operational Amplifiers as active elements, and the behavior of the oscillator is evaluated through simulation results obtained using the OrCAD PSpice suite. In addition, the provided experimental results support the findings of this work. [ABSTRACT FROM AUTHOR]

Abstract In this paper, new two first-order all-pass filters (APFs) employing current feedback operational amplifiers (CFOAs) are proposed. The first proposed APF uses two CFOAs while the second one contains three CFOAs. The main features of the both of the proposed APFs are the use of a grounded capacitor, having adjustable gain and possessing low output impedance. Also, the second-proposed APF derived from the first one has high input impedance, and can simultaneously provide both inverting and non-inverting APF responses; nonetheless, both of the proposed APFs need a single passive element matching condition for proper operation. Single phase and multiphase oscillators are included to illustrate applications of the proposed APFs. Several simulations and experiments based on commercially active devices such as AD844s are carried out to verify the theory. [ABSTRACT FROM AUTHOR]

Abstract Reduced complexity CMOS fractional-order differentiator and integrator building blocks are introduced in this work, based on 2 nd -order integer-order transfer function approximations. These blocks are then used for implementing fractional-order filters as well as a Leaky-Integrate-and-Fire Mihalas-Niebur neuron model. Cascading 1st and 2 nd -order blocks to obtain 5 th -order integer-order transfer functions, improved bandwidth of approximation accuracy is achieved. Furthermore, the realization of fractional-order capacitor and inductor emulators is demonstrated. [ABSTRACT FROM AUTHOR]

This paper presents a novel structure of a versatile 4 port network that is used as a voltage inverting metamutator (VIM). The desired port relationships of proposed structure are obtained through proper interconnection of differential amplifiers, current mirrors and an inverting stage. The port relations are verified through both small signal analysis and simulations using 180 ​nm generic process design kit (gpdk) in Cadence Virtuoso tool. The performance of the proposed VIM is also examined by performing corner analysis and Monte Carlo simulations. By using proper port terminations, the proposed VIM is configured as current mode universal Filter, transconductance amplifier, transimpedance amplifier and memristor. All these applications are also verified for functionality. [ABSTRACT FROM AUTHOR]