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4. Optimization of HfSiON using a design of experiment (DOE) approach on 0.45V V t Ni-FUSI CMOS transistors

5. 45nm LSTP FET with FUSI Gate on PVD-HfO2 with excellent drivability by advanced PDA treatment

7. Achieving low-V T Ni-FUSI CMOS via lanthanide incorporation in the gate stack

8. Comparison of thermal and plasma oxidations for HfO2/Si interface