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We consider bisimulation-invariant monadic second-order logic over various classes of finite transition systems. We present several combinatorial characterisations of when the expressive power of this fragment coincides with that of the modal μ -calculus. Using these characterisations we prove for some simple classes of transition systems that this is indeed the case. In particular, we show that, over the class of all finite transition systems with Cantor–Bendixson rank at most k , bisimulation-invariant Image 1 coincides with L μ. [ABSTRACT FROM AUTHOR]

Cystargolides are natural products originally isolated from Kitasatospora cystarginea NRRL B16505 as inhibitors of the proteasome. They are composed of a dipeptide backbone linked to a β-lactone warhead. Recently, we identified the cystargolide biosynthetic gene cluster, but systematic genetic analyses had not been carried out because of the lack of a heterologous expression system. Here, we report the discovery of a homologous cystargolide biosynthetic pathway in Streptomyces durhamensis NRRL-B3309 by genome mining. The gene cluster was cloned via transformation-associated recombination and heterologously expressed in Streptomyces coelicolor M512. We demonstrate that it contains all genes necessary for the production of cystargolide A and B. Single gene deletion experiments reveal that only five of the eight genes from the initially proposed gene cluster are essential for cystargolide synthesis. Additional insights into the cystargolide pathway could be obtained from in vitro assays with CysG and chemical complementation of the respective gene knockout. This could be further supported by the in vitro investigation of the CysG homolog BelI from the belactosin biosynthetic gene cluster. Thereby, we confirm that CysG and BelI catalyze a cryptic SAM-dependent transfer of a methyl group that is critical for the construction of the cystargolide and belactosin β-lactone warheads. [ABSTRACT FROM AUTHOR]

Abstract: For various piezoceramic actuator applications, the active materials are exposed to mechanical bias stresses. Such mechanical loading strongly modifies the hysteretic transfer characteristic of the actuators. An appropriate approach to model the hysteretic characteristic is based on the Preisach operator. However, the classical Preisach model is incapable of reflecting the influence of mechanical loading. The scope of the present study is, thus, the development of a generalized Preisach model incorporating the impact of compressive stress. To accomplish this goal, the effects of stress and mechanical creep on the polarization hysteresis are characterized by means of measurements. For our model, we take advantage of an analytic Preisach distribution function, introduced in our recent work. This function is extended to a formulation incorporating uniaxial compressive bias stress. As the results clearly demonstrate, the utilized distribution function is very promising to be further extended with respect to mechanical creep behavior. [Copyright &y& Elsevier]

Abstract: We present a new model for the simulation of the hysteretic large-signal behavior in ferroelectric materials. The model is based on the Preisach operator and takes advantage of an analytic weight function for the underlying fundamental switching operators. The five independent parameters describing this weight function have been determined for a discoidal piezoceramic actuator by adapting the model output to measurements of the polarization. Since the classical Preisach model is only valid for creep- and rate-independent hysteresis loops, it is inappropriate to describe the entire ferroelectric material behavior. Therefore, we extended our model by an additional drift operator to consider creep phenomena. Furthermore, the rate-dependence of the hysteresis loops is described by a frequency-dependent parameter of the analytic weight function. For the identification and verification of the model, measurements have been performed using two different measurement principles: A modified Sawyer–Tower circuit as well as a method based on the integration of the electrical current. The agreement between measurements and simulations highlights the benefits of the enhanced hysteresis model. [Copyright &y& Elsevier]

Abstract: When scaling message-passing applications to thousands of processors, their performance is often affected by wait states that occur when processes fail to reach synchronization points simultaneously. As a first step in reducing the performance impact, we have shown in our earlier work that wait states can be diagnosed by searching event traces for characteristic patterns. However, our initial sequential search method did not scale beyond several hundred processes. Here, we present a scalable approach, based on a parallel replay of the target application’s communication behavior, that can efficiently identify wait states at the previously inaccessible scale of 65,536 processes and that has potential for even larger configurations. We explain how our new approach has been integrated into a comprehensive parallel tool architecture, which we use to demonstrate that wait states may consume a major fraction of the execution time at larger scales. [Copyright &y& Elsevier]

The EXPERT performance-analysis environment provides a complete tracing-based solution for automatic performance analysis of MPI, OpenMP, or hybrid applications running on parallel computers with SMP nodes. EXPERT describes performance problems using a high level of abstraction in terms of execution patterns that result from an inefficient use of the underlying programming model(s). The set of predefined problems can be extended to meet application-specific needs. The analysis is carried out along three interconnected dimensions: class of performance behavior, call tree, and thread of execution. Each dimension is arranged in a hierarchy so that the user can investigate the behavior on varying levels of detail. All three dimensions are interactively accessible using a single integrated view. [Copyright &y& Elsevier]

Data-dependence profiling is a program-analysis technique for detecting parallelism opportunities in sequential programs. It captures data dependences that actually occur during program execution, filtering parallelism-preventing dependences that purely static methods assume only because they lack critical runtime information, such as the values of pointers and array indices. Profiling, however, suffers from high runtime overhead. In our earlier work, we accelerated data-dependence profiling by excluding polyhedral loops that can be handled statically using certain compilers and eliminating scalar variables that create statically-identifiable data dependences. In this paper, we combine the two methods and integrate them into DiscoPoP, a data-dependence profiler and parallelism discovery tool. Additionally, we detect reduction patterns statically and unify the three static analyses with the DiscoPoP framework to significantly diminish the profiling overhead and for a wider range of programs. We have evaluated our unified approaches with 49 benchmarks from three benchmark suites and two computer simulation applications. The evaluation results show that our approach reports fewer false positive and negative data dependences than the original data-dependence profiler and reduces the profiling time by at least 43%, with a median reduction of 76% across all programs. Also, we identify 40% of reduction cases statically and eliminate the associated profiling overhead for these cases. • Presenting a unified framework for hybrid data-dependence analysis. • Implementing the approach as an extension to DiscoPoP's data-dependence profiler. • Introducing a method for detecting parallel reduction patterns statically. • Evaluating the approach with two larger-scale applications and 49 benchmarks. [ABSTRACT FROM AUTHOR]

Abstract: Partitioned global address space (PGAS) languages combine the convenient abstraction of shared memory with the notion of affinity, extending multi-threaded programming to large-scale systems with physically distributed memory. However, in spite of their obvious advantages, PGAS languages still lack appropriate tool support for performance analysis, one of the reasons why their adoption is still in its infancy. Some of the performance problems for which tool support is needed occur at the level of the underlying one-sided communication substrate, such as the Aggregate Remote Memory Copy Interface (ARMCI). One such example is the waiting time in situations where asynchronous data transfers cannot be completed without software intervention at the target side. This is not uncommon on systems with reduced operating-system kernels such as IBM Blue Gene/P where the use of progress threads would double the number of cores necessary to run an application. In this paper, we present an extension of the Scalasca trace-analysis infrastructure aimed at the identification and quantification of progress-related waiting times at larger scales. We demonstrate its utility and scalability using a benchmark running with up to 32,768 processes. [Copyright &y& Elsevier]

Abstract: Event traces are helpful in understanding the performance behavior of message-passing applications since they allow the in-depth analysis of communication and synchronization patterns. However, the absence of synchronized clocks may render the analysis ineffective because inaccurate relative event timings may misrepresent the logical event order and lead to errors when quantifying the impact of certain behaviors. Although linear offset interpolation can restore consistency to some degree, time-dependent drifts and other inaccuracies may still disarrange the original succession of events – especially during longer runs. The controlled logical clock algorithm accounts for such violations in point-to-point communication by shifting message events in time as much as needed while trying to preserve the length of local intervals. In this article, we describe how the controlled logical clock is extended to collective communication to enable the correction of realistic message-passing traces. We present a parallel version of the algorithm scaling to more than thousand processes and evaluate its accuracy by showing that it eliminates inconsistent inter-process timings while preserving the length of local intervals. [Copyright &y& Elsevier]

We present an indirect higher order boundary element method utilising NURBS mappings for exact geometry representation and an interpolation-based fast multipole method for compression and reduction of computational complexity, to counteract the problems arising due to the dense matrices produced by boundary element methods. By solving Laplace and Helmholtz problems via a single layer approach we show, through a series of numerical examples suitable for easy comparison with other numerical schemes, that one can indeed achieve extremely high rates of convergence of the pointwise potential through the utilisation of higher order B-spline-based ansatz functions. [ABSTRACT FROM AUTHOR]

Performance models are powerful instruments for understanding the performance of parallel systems and uncovering their bottlenecks. Already during system design, performance models can help ponder alternative development options. However, creating a performance model – whether theoretically or empirically – for an entire application that does not exist yet is challenging. In this paper, we propose to generate performance models of full programs from performance models of their components using formal composition operators derived from parallel design patterns. As long as the design of the overall system follows such a pattern, its performance model can be predicted with reasonable accuracy without an actual implementation. We demonstrate our approach with design patterns of varying complexity, including pipeline, task pool, and eventually MapReduce, which is representative of a broad class of data-analytics applications. • Parallel design patterns are used to generate composable performance models. • Thorough benchmarking of parallel design patterns on multiple compute nodes. • Real-application use case of MapReduce with Hadoop. • Uniform theoretical treatment of parallel design patterns and their performance. [ABSTRACT FROM AUTHOR]