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• Doppler cardiogram (DCG) could be used as contact-free heart signal sensing method for continuous heart state monitoring. • Signal reconstruction system based on variational autoencoder (VAE) is proposed to improve the heart state information consistency of DCG. • Three types of processed DCG sets are applied to system to optimize VAE performance. • Unified analysis of system performance using processed DCG sets is presented better than individual results. • Final result achieved consistency growth in 75.5% of validation set. A contact-free continuous heart rate variability (HRV) analysis is required to conduct daily heart monitoring and minimize physical contact during medical remedies owing to COVID-19. This paper suggests a Doppler cardiogram (DCG) signal processing and reconstruction system that enables the standard deviation of normal-to-normal peaks (SDNN) obtained from DCG to be used as an actual HRV index. The heartbeat signals of twelve healthy adults were recorded. Three electrodes and a Doppler radar module were used to record the electrocardiogram (ECG) and DCG signals, respectively. To optimize the performance of the signal reconstruction system, two signal processing methods were applied to the dataset. These DCG signals were reconstructed into a signal that mimicked the ECG using a variational autoencoder (VAE), to enhance the consistency of the SDNN. The synthetic signal quality was assessed by comparing the SDNN of the synthetic ECG with that of the reference ECG. A total of 1,430 signals were reconstructed to achieve a valid SDNN. A unified analysis of the signal reconstruction results using different signal processing methods was built up to raise the consistency growth. The final result of the signal reconstruction system represented a consistency improvement of 75.5%, compared to the SDNN of the input DCG. [ABSTRACT FROM AUTHOR]

A CMOS voltage-controlled oscillator (VCO) using half-oscillation frequency signals as switched biasing is proposed to simultaneously improve the phase noise and DC-to-RF conversion efficiency. The effect of the flicker noise caused by the tail current source, which is the dominant factor of the VCO phase noise, can be reduced by the modulation using the half-frequency signals of the output. The conversion efficiency of the proposed VCO is improved by the leakage of the second harmonics of the modulation signal at the drain node of the current source, which is the same as the oscillation frequency of the VCO, thereby increasing the output power. The differential half-frequency signals are generated in the frequency divider, designed with the current-mode logic for minimizing the effect of parasitic components at high-frequency operation, which constitutes the frequency synthesizer without any additional circuits. The proposed VCO with the divider was fabricated on the size of 0.4 × 0.61 mm2 using a 65-nm CMOS process, including all pads. The measurement results showed a tuning range of 11.2% at the K-band and a phase noise of –109.86 dBc/Hz at the 1-MHz offset. The peak output power and DC-to-RF efficiency were measured to be 0.95 dBm and 16.64%, respectively, at the supply voltage of 1.2 V. A figure of merit of the proposed VCO was calculated to be –188.03 dBc/Hz. [ABSTRACT FROM AUTHOR]

An asymmetric Dicke switch implemented in bulk complementary metal-oxide-semiconductor (CMOS) technology is proposed to achieve high isolation and low insertion loss in the D-band. A Dicke switch eliminates the noise in the signal transmitted from the antenna, providing a high signal-to-noise ratio at the receiver front end. The proposed Dicke switch employs an asymmetric configuration for the signal transmission path and the reference noise incidence path, which overcomes the trade-off relationship between the insertion loss and isolation characteristics. The proposed asymmetric structure presents an optimum impedance in the reference component to achieve the same characteristics as those of the noise incident from the antenna port. The Dicke switch is fabricated using the 65-nm RFCMOS process with a chip size of 350 × 490 μm2, including all the pads. The measurement results in the D-band present an insertion loss below 2.8 dB in the on-state and isolation above 22 dB in the off-state. The minimum insertion loss and maximum isolation were measured to be 1.7 dB at 155 GHz and 29 dB at 122 GHz, respectively. [ABSTRACT FROM AUTHOR]