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The dynamic prompt splash behavior of water drop impinging upon a natural wood surface ( Shorea spp.) was studied in this work. The water drop images during the impacting process were taken sequentially to study the properties of the emitted droplets such as the critical Weber number, droplet number, shape, velocity, size, and kinetic energy. For prompt splashing on a Shorea spp. surface, the emitted droplets formed not only during their advancing wetting process but also during the drop receding process. The emitted droplets that formed at the early stage usually had greater velocity but significant deformation. The kinetic energy of the emitted droplets varied with great scattering at every impact height, but the average kinetic energy (KE avg ) of the droplets varied linearly with the impact height: KE avg (erg) = 0.0017 (m 0 gH), implying that every emitted droplet had approximately 0.17% of the initial potential energy of the impacting water drop. Furthermore, the number of emitted droplets depended linearly on the Weber number: N = 0.304 ( We –77).

AlGaN/GaN dual metal Schottky barrier diodes (SBD) are demonstrated on a silicon substrate. The anode is composed of two metals with different work functions to achieve a better trade-off between the forward and the reverse characteristics. The low work function metal Ti reduces the turn-on voltage and the high work function metal Ni at the edge of the anode reduces the reverse leakage current and maintains the breakdown voltage. The turn-on voltage of the Ni-SBD is reduced from 1.47 V to 0.57 V by employing the dual metal anode, and the breakdown voltages are virtually unaffected.

This study develops a post-linearization technique to simultaneously improve the input third-order intercept point (IIP3) and image-rejection ratio (IRR) of a 17GHz low noise amplifier (LNA) in a [email protected] standard CMOS process. A third-order intermodulation distortion (IMD3) compensator constructed by a second-order notch filter was proposed to achieve both high linearity and image reject (IR) of the cascode LNA. The correlation between the post-linearization and IR techniques is analyzed and discussed. The measured LNA achieved a gain of 16.5dB, a noise figure (NF) of 4.58dB, an IIP3 of 0dBm, and an IRR from 68 to 78dB. The improvements of IIP3 and IRR are 11.7 and 46dB, respectively, better than that of the LNA without the notch filter. The proposed IR LNA with total current dissipation of 4.8mA under 1.8V supply voltage and notch filter only dissipate a DC power of 2mW.

In this paper, we demonstrate the low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs) with TaN metal-gate and HfO 2 gate dielectric to achieve high performance characteristics. A high performance LTPS-TFT with low threshold voltage 0.9 V, excellent subthreshold swing 0.15 V/decade and high I on / I min current ratio 1.9 × 10 6 are derived without any hydrogen treatment. In addition, we also introduce the fluorine implantation prior to the Si thin-film crystallization to passivate the defects in grain-boundaries of the channel film and HfO 2 /polysilicon interface. Significant improvements on subthreshold swing and I min are observed. In addition, the transconductance degradation and threshold voltage instability due to hot carrier stress is also investigated, respectively. Finally, we derive a high reliability and performance LTPS-TFT with low threshold voltage ∼1.38 V, ultra-low subthreshold swing 0.132 V/decade and high I on / I min current ratio 1.21 × 10 7 , which is suitable for the application of system-on panel (SOP).

An active power filter with asymmetric inverter legs are presented to eliminate harmonics, compensate reactive power and draw the balanced line current from the AC source under balanced and unbalanced load conditions. Three inverter legs are used in the adopted voltage source inverter. In each leg, four active switches are adopted to achieve three-level pulse-width modulation (PWM). No clamped diode or flying capacitor is used in the proposed inverter. In the adopted control algorithm, a classical proportional-integral voltage controller and hysteresis current controller are used to maintain DC-link voltage constant and to track line current commands, respectively. A voltage compensator is added in the inner control loop to compensate the neutral point voltage variation due to load variation. Based on the proposed PWM control scheme, a three-level voltage pattern is generated on the AC terminal of the inverter. The system configuration and mathematical analysis are discussed in the paper. Finally, the experimental results based on a laboratory scaled down prototype are provided to verify the effectiveness of the control algorithm.