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The metallization grid pattern is one of the most important design elements for high-efficiency solar cells. This paper presents a model based on the unit cell approach to accurately quantify the power losses of a specialized interdigitated metallization scheme for polycrystalline silicon thin-film solar cells on glass superstrates. The sum of the power losses can be minimized to produce an optimized grid-pattern design for a cell with specific parameters. The model is simulated with the standard parameters of a polycrystalline silicon solar cell, and areas for efficiency improvements are identified, namely, a reduction in emitter finger widths and a shift toward series-interconnected, high-voltage modules with very small cell sizes. Using the model to optimize future grid-pattern designs, higher cell and module efficiencies of such devices can be achieved.