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This paper focuses on the issue of network connectedness (NC) in security-constrained optimal transmission switching problems, which is complicated by branch contingencies and corrective line switching. Two criteria are firstly proposed with the principle of preserving NC as much as possible within reasonable limits. By extending the electrical flow based NC constraints, a proposition is derived to associate different cases of NC with the optimum of a linear program, yielding the mathematical formulation of the NC criteria. By Karush-Kuhn-Tucker conditions, this formulation is further transformed into a tractable version which can be incorporated with existing SCOTS models without affecting the applicability of original solution approaches. Finally, case studies on various networks and SCOTS models demonstrate the efficacy of the proposed approach. [ABSTRACT FROM AUTHOR]

In this paper, the conventional I- and T-type three-level neutral-point-clamped (3L-NPC) inverter for low-voltage renewable energy systems is first investigated. Literature research shows that the T-type inverter improves I-type's insulated-gate bipolar transistor (IGBT) $+$ IGBT current paths. However, the IGBT $+$ diode paths are the same. The calculation in this paper further reveals that the IGBT $+$ diode current paths dominate the conduction losses and even the whole semiconductor losses. Based on the aforementioned recognitions, a novel T-type inverter is presented as an alternative to be applied in the low-voltage renewable energy systems. In the proposed 3L-NPC, four CoolMosfets replace the IGBT $+$ diode middle bidirectional switch. In the proposed topology, there is no diode involved in the current path supposing the unity power factor. In this way, the conduction loss is expected to be reduced compared with that from the conventional T-type 3L-NPC, particularly in the low and medium power ranges. [ABSTRACT FROM PUBLISHER]

This paper proposes a novel polygonal voltage space vector structure (SVS) having 30 sides, for a star-connected induction motor drive. The SVS eliminates the presence of harmonics up to 25th order from motor phase voltage throughout the entire modulation range, providing a torque profile devoid of lower order pulsations. Linear modulation is extended till 99.63% of base speed without exceeding the motor phase voltage rating. Topology consists of a dc-link fed primary inverter and two equal low voltage modular capacitor fed secondary inverters. Here the harmonics generated by the primary inverter is canceled by the secondary inverter which acts as a switched capacitive filter. Detailed description of the SVS generation and timing calculations are provided in this paper. Effectiveness of the proposed scheme is validated using experimental results, inverter loss calculations, and harmonic analysis. [ABSTRACT FROM AUTHOR]

This paper proposes a fifth-order resonant immittance network based dual-active-bridge (DAB) converter and an optimal modulation method that will ensure high-efficiency operation of the converter under wide-range variations in voltage ratio and output power level. The proposed modulation method is based on the concept of total power loss minimization, where a loss model is developed and an optimization algorithm is formulated to compute the optimal set of internal and external phase shift parameters that will lead to the maximum efficiency for a given set of operating parameters including voltage ratio and output power level. It is found that to maintain high-efficiency operation under wide-range variations in voltage ratio and output power level, the DAB converter is required to switch between different operation modes and neither soft-switching operation nor unity-power-factor operation is able to achieve wide-range high efficiency performance when used alone. The importance of $reconfigurability$ of operation mode for achieving wide-range high efficiency performance is clearly illustrated in this paper. [ABSTRACT FROM AUTHOR]

Multilevel converters are a proven solution for medium-voltage and high-power applications, including renewable energy conversion. Developing 6.6-kV converters is a key goal for the wind turbines industry. Considering the voltage rating of commercially available semiconductors, five-level converters are necessary to reach 6.6 kV. The five-level active neutral-point-clamped converter (5L-ANPC) is one of the most advantageous topologies among five-level multilevel converters. This paper presents a new 5L-ANPC topology that overcomes the features of the previously employed 5L-ANPC topology. Along this paper, the properties and working principle of this new 5L-ANPC are explained. Finally, the validity of the new converter is validated via simulation and experimental results. [ABSTRACT FROM AUTHOR]

In low-power applications of photovoltaic (PV) systems, the transformerless grid-connected inverters have been preferred to increase the efficiency and reduce the cost, size, and power losses when they are compared to the ones with the transformer. A transformerless single-phase inverter topology with a single dc-link capacitor for the grid-connected PV systems is proposed in this paper. The proposed inverter has been simulated by using a cooperation process of the MATLAB and SPICE package programs and it has been implemented for experimental verification. The proposed inverter reduces the high-frequency common-mode leakage current caused by parasitic capacitances of PV panels, whereas it is controlled with the unipolar sinusoidal pulsewidth modulation. Also, the results show that the common-mode voltage remains constant. The efficiency of the proposed inverter has been compared to that of the most common topologies having the dc-link decoupling during the zero voltage states. This paper is accompanied by a video file demonstrating the power loss distribution in the inverter. [ABSTRACT FROM AUTHOR]

This paper describes a dc-link voltage control method of a single-phase back-to-back cascaded H-bridge inverter (SBCI) for a medium-voltage motor drive system. The main advantage of the SBCI topology over the conventional regenerative cascaded H-bridge topology with a three-phase active front-end (AFE) is a simple system structure, which is composed of an input transformer, a power cell, a current sensor, etc. However, the challenging points of the SBCI are larger voltage ripple in the dc-link capacitor and imbalance of dc-link voltages of each phase. The asymmetric dc-link voltage of each power cells could cause unstable operation such as over-modulation due to the lack of the dc-link voltage of a particular phase and result in over-voltage or under-voltage faults. In this paper, the control strategy of the dc-link voltage for the SBCI that uses the negative-sequence voltage of the converter is described. The proposed control method is verified with a computer simulation whose target is a 6.6-kV–1.25-MW medium-voltage drive system. Also, through the experimental setup with the prototype SBCI whose power rating is 16.2 kVA, the dc-link voltage of each AFE has been controlled within a 0.5% error of its reference value at the full load. [ABSTRACT FROM AUTHOR]

Low-voltage dc distribution systems have gained significant attention over the last years, since they provide simpler and more efficient integration of distributed generators and storage devices, establishing a pathway to net zero energy buildings. In low-power units, transformerless utility interface is preferred to reduce footprint and losses. However, the lack of galvanic isolation introduces a common-mode (CM) path between the dc distribution bus and the utility service grounding, leading to the presence of high CM voltages at the dc bus feeders. The attenuation of the CM voltage reduces the touch voltage amplitude and leakage current, contributing to a safer environment. In this paper, a feed-forward active compensation of the CM voltage is proposed. It relies on utility voltage parameters, estimated by a phase locked loop, to generate a counter CM voltage; hence, it does not require previous knowledge of the system CM path model or the addition of voltage sensors. Experimental results show that this technique can attenuate the CM voltage to non-dangerous magnitudes without interfering with the microgrid differential mode behavior. [ABSTRACT FROM AUTHOR]

In this paper, a high-voltage unipolar pulse power generator is introduced for electroporation applications. Operating principle of the proposed structure is based on the buck–boost (BB) converter. The generator is comprised of parallel modules connected to the converter through an SCR and is supplied by a low-voltage dc source. Each module consists of an insulated gate bipolar transistor (IGBT), two diodes, and a capacitor. In fact, the proposed topology is a combination of the Marx generator and BB (MG-BB) converter. In comparison with other modular MG-BB structures, the proposed topology achieves interesting advantages including simpler structure, reduction of IGBTs voltage rating, and reducing number of components (inductors and switches). In order to clarify the features of the proposed structure, it has been compared with other unipolar MGs considering different aspects including the number of circuit components, number of required input supplies, amplitude of the output pulse, and the maximum voltage across switches and diodes. To validate the effectiveness of the structure, simulation and experimental results are presented. The results confirm that the proposed topology is capable of generating unipolar pulses with desirable amplitude and repetition frequency using a low-voltage dc supply. [ABSTRACT FROM AUTHOR]

A novel linear flux switching motor (LFSM) with simple passive segmented secondary (SSLFSM) is presented in this paper. In this motor, the armature and field winding concentrated coils are wound around mover (primary) teeth alternatively. The structure of this linear motor is different from other types of LFSMs presented in previous research. All LFSMs are suffering from unbalanced back electromotive force (EMF) waveform. The same problem appears in SSLFSM. In this paper, the influence of secondary segments number on back EMF waveform of designed SSLFSM is derived analytically. It is found that the secondary segment numbers have a strong effect on generated back EMF waveform harmonic contents and phase balances. These effects are evaluated by finite-element analysis for different configurations of SSLFSM as well. With analytical and numerical evaluations, a suitable number of secondary segments for minimum harmonic contents and phase unbalances is obtained. [ABSTRACT FROM PUBLISHER]

This paper proposes a medium-frequency (MF) solid-state transformer (SST) based grid interface for high-power multipulse rectifiers. In the proposed approach, the low-frequency ac (grid) voltage is transformed to MF voltage via front-end converters. The three single-phase MF outputs from these converters are fed to the primary side of a three-phase, five-limb multiwinding isolation transformer (or alternately three one-phase transformers). The secondary side windings from the transformer are configured in a certain “zig-zag” arrangement, which are connected to the inputs of three-phase diode rectifier modules as in a typical multipulse system. The proposed topology can better than double the power density by reducing volume (or weight) of the required front-end isolation transformer while maintaining the same input current quality as a conventional low-frequency transformer based approach. Usage of an open-loop square wave pulse width modulation for the front-end converters makes this approach simple to implement. This paper explains the proposed concept taking an adjustable speed drive application's perspective using modeling, simulation, and experimental results from a scaled down laboratory prototype. [ABSTRACT FROM AUTHOR]

This paper presents a new compact three-phase cascaded multilevel inverter (CMLI) topology with reduced device count and high-frequency magnetic link. The proposed topology overcomes the predominant limitation of separate dc power supplies, which CMLI always require. The high-frequency magnetic link also provides a galvanic isolation between the input and output sides of the inverter, which is essential for various grid-connected applications. The proposed topology utilizes an asymmetric inverter configuration that consists of cascaded H-bridge cells and a conventional three-phase two-level inverter. A toroidal core is employed for the high-frequency magnetic link to ensure compact size and high-power density. Compared with counterpart CMLI topologies available in literature, the proposed inverter has the advantage of utilizing the least number of power electronic components without compromising the overall performance, particularly when a high number of output voltage levels is required. The feasibility of the proposed inverter is confirmed through extensive simulation and experimentally validated studies. [ABSTRACT FROM AUTHOR]

In this paper, two structures are proposed for the switched-inductor quasi-Z-source inverter. In the proposed structures to extend the voltage gain of inverter, two new switched-inductor structures are used. In the proposed structures, voltage across the capacitors in the Z-source network and in the switched-inductor is symmetric and small. The other advantage of proposed inverters is known as achieving higher voltage gain per smaller duty cycle ratio (of shoot-through). Compared with a conventional continuous input current switched-inductor quasi-Z-source inverter at the same gain voltage, there is less of a ripple of input current in the proposed inverters. In this paper, at first the both the conventional and the proposed switched-inductor Z-source inventers are thoroughly investigated to find out their governing relations. Then, the proposed Z-source inverters are compared with the conventional ones by simulating them to assess their performance efficiency. Next, applying the simple boost pulse width modulation the simulation is carried out with PSCAD/EMTDC software. After that, to evaluate the obtained results, the prototypes of the proposed inverters with 48 Vdc input voltage are used. [ABSTRACT FROM PUBLISHER]

In this paper, new half-bridge and full-bridge topologies for a switched-boost inverter are proposed. These topologies have a high boost factor in comparison with conventional types. In addition, the proposed topologies have continuous input current and can generate zero-voltage level in output. In this paper, the operation of the proposed inverters in different operating modes is analyzed. Then, the values of inductors and capacitors are designed. Moreover, the used switching pattern and its logical diagram are introduced. A comprehensive comparison between the proposed and conventional topologies in terms of the boost factor, the number of elements, and the efficiency shows the good features of the proposed inverters. Finally, to verify correct operation of the proposed topologies and derived equations, simulation and experimental results are presented. [ABSTRACT FROM AUTHOR]

This paper proposes a new bidirectional resonant dc–dc converter suitable for wide voltage gain range applications (e.g., energy storage systems). The proposed converter overcomes the narrow voltage gain range of conventional resonant dc–dc converters, and meanwhile achieves high efficiency throughout the wide range of operation voltage. It is achieved by configuring a full-bridge mode and a half-bridge mode operation during each switching cycle. A fixed-frequency phase-shift control scheme is proposed and the normalized voltage gain can be always from 0.5 to 1, regardless of the load. The transformer root-mean-square (rms) currents in both the forward and reverse power flow directions have a small variation with respect to the voltage gain, which is beneficial to the conduction losses reduction throughout a wide voltage range. Moreover, the power devices are soft-switched for minimum switching losses. The operation principles and characteristics of the proposed converter are firstly analyzed in this paper. Then the analytical solutions for the voltage gain, soft-switching, and rms currents are derived, which facilitates the parameters design and optimization. Finally, the proposed topology and analysis are verified with experimental results obtained from a 1-kW converter prototype. [ABSTRACT FROM PUBLISHER]

An extended-duty-ratio (EDR) boost converter is studied extensively in this paper for high voltage gain applications with a wide input (and/or output) voltage range. The EDR is a unique combination of an interleaved, multiphase boost converter and switched capacitor configuration that achieves high voltage gain with significantly lower switch voltage stress and switching losses compared to conventional high-gain solutions. Most of the switches in the multiphase EDR experience only a fixed fraction of the output voltage ($1/M, 2/M$ , etc., where $M$ is the number of phases). Through extensive analysis over a wide operating range, it is shown here that the EDR boost converter has inherent current sharing among the phases only in a limited range of duty ratio— $(M-1)/M \leq D \leq 1$. As the duty ratio reduces beyond this range as required in wide input voltage applications, inherent current sharing property is lost. In this paper, techniques to ensure current sharing under all operating zones without requiring current sensors are presented. Instead of having equal duty ratio for each phase, it is adjusted for each phase according to the operating region of the converter. Extensive analysis is presented to derive the required duty ratio changes for the different phases. The proposed concept is validated with experimental results from a 250 W, 3-phase EDR boost, and GaN-based hardware prototype. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC), owing to the presence of a large number of submodules (SMs) and energy storing elements, requires a large footprint and initial investment. To address these issues, this paper proposes the switched modular multilevel converter (SMMC). It consists of two major elements; the chain-links (CLs), consisting of cascade connection of SMs as in MMC, and the single-pole-triple-throw (SPTT) switches, which can be realized using either the T-type or NPC-type switch strings. The SMMC works on the principle of connecting all the phase-legs in series and their respective positions are mutually interchanged. It offers a compact structure as the SMs count is reduced to 33% of MMC, which results in a much lower energy storage requirement. Furthermore, it does not have inter-phase circulating current problem and hence the CL inductors can also be avoided. The SMMC structure, operating principles, control, and modulation schemes are explained in detail. A detailed comparison of SMMC with the other major existing converters is carried out to highlight the important features of SMMC. The efficacy of SMMC is validated using PSCAD simulation studies with a 19-level grid-connected SMMC model. A 3-phase 19-level SMMC laboratory prototype is developed to further validate its feasibility. [ABSTRACT FROM AUTHOR]

A high-voltage tapped-inductor buck converter utilizing a novel autonomous high-voltage valve is presented in this paper. Its application as auxiliary power supply for high-power cascaded-converter submodules is discussed, followed by a presentation of the most challenging problems in designing a low-power high-voltage step-down converter. The TI-buck converter topology is analyzed, which together with the novel autonomous high-voltage valve overcomes most of the problems. Analytical expressions describing the operation as well as circuit simulations are presented. Finally, an experimental evaluation of a 3-kV 70-W prototype converter utilizing the proposed autonomous high-voltage valve with series-connected super-junction MOSFETs is presented. [ABSTRACT FROM PUBLISHER]

Multilevel converters are widely applied in medium voltage (MV) drive systems due to the attractive features, such as the ability to use devices with lower voltage ratings, high equivalent switching frequency, etc. Recently, a multilevel topology, named seven-level hybrid clamped (7L-HC), is proposed for MV drives. It has a competitive number of devices, showing the potential to build low-cost 7L converters. However, to ensure the wide frequency range operation and power quality of MV drives, its dc-link capacitors and floating capacitors must be controlled properly with balanced voltages. In this paper, an active voltage balancing method is proposed for the 7L-HC converter. This method can effectively balance all the capacitor voltages under a wide frequency range. The method is embedded in the PWM procedure without modifying the control strategies. Simulation and experimental results are provided to validate the proposed method. [ABSTRACT FROM AUTHOR]

This paper presents a voltage multiplier topology that is a hybrid between a Cockcroft–Walton multiplier and a Dickson charge pump. The Cockcroft–Walton structure exhibits significant output voltage drop under load as the number of multiplier stage increases. This is because all coupling capacitors are connected in series. Dickson charge pump mitigates this issue by connecting all capacitors in parallel. But this solution comes at the expense of large capacitor voltage stress at the last multiplier stage. The proposed hybrid structure arranges some capacitors in parallel and others in series, thereby achieving low output voltage drop and low capacitor voltage stress at the same time. We develop a model that predicts hybrid multiplier's performance and validates it experimentally. We also demonstrate a 60–2.25 kV dc–dc converter based on a 16-stage hybrid voltage multiplier which achieves a voltage gain of 12.8 while keeping the highest capacitor voltage stress to 660 V. [ABSTRACT FROM AUTHOR]

In this paper, many impedance-source inverters with coupled inductors have been investigated to obtain a high step-up boost ratio. However, the leakage inductors in these topologies induce great voltage spikes at the dc link, which will increase the voltage stress of switches. Thus, the power level of inverters is limited. Furthermore, the efficiency of the inverters can be degraded by the losses associated with leakage inductors. To address abovementioned issues, this paper proposes a family of low-spike high-efficiency Y-source inverters. The proposed inverters have the ability of eliminating voltage spikes at the dc link and recycling the leakage energy via the additional diode and capacitor. In order to show the excellent characteristics of the proposed topologies, this paper compares the performances of the proposed inverters and the improved-Y-source inverter in many aspects. Simulation and experimental results have verified the abilities of the proposed inverters. [ABSTRACT FROM AUTHOR]

The three-level full-bridge (TLFB) dc−dc converter has been widely used in high-voltage, high-power applications. In the experimental test, the neutral-point voltage deviation appears; moreover, it has also been found out that if the flying capacitors are introduced, the input capacitor voltages could realize self-balance even if no active balancing solutions are adopted. In the previous publications, the role of flying capacitors is generally considered to extend the range of soft switching; however, the self-balance ability has not been mentioned or investigated in any publications thus far. In order to fill this gap, this paper provides the detailed mode operation analysis of the TLFB converter and reveals the cause of the imbalance. In addition, the mechanism of the self-balance ability provided by the flying capacitors is explained in detail, which gives a deep insight into the converter. At last, the influence factor of the voltage error in steady state has been analyzed, and the specific expression of the voltage error is also derived. The feasibility of the theoretical analysis is verified by the simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a three-phase, five-level, non-regenerative pulsewidth modulated rectifier using only two active switches (minimum required) per phase, which drastically reduces gate driver requirement and hardware complexity. It draws sinusoidal input current at close to unity power factor. All the semiconductor devices are rated at only one fourth of the dc-link voltage, and none of them requires any transient voltage balancing snubber. A total of 8 out of the 14 diodes per phase undergo soft switching transition under all operating conditions, which increases its efficiency. No extra hardware circuitry for balancing the flying capacitors (FCs) or the dc-link mid-point voltage are required, which further reduces hardware complexity and increases the conversion efficiency. The proposed topology does not need any sophisticated startup procedure for charging the FCs either, which solves the problem of semiconductor overvoltage during starting. A 3-kW laboratory prototype is built to experimentally verify the proposed topology. The maximum efficiency obtained from the prototype is 98.7%, and it is always more than 96% for the load range from 15% to its rated. [ABSTRACT FROM AUTHOR]

This paper presents a novel seven-level inverter topology for medium-voltage high-power applications. It consists of eight active switches and two inner flying capacitor (FC) units forming a similar structure as in a conventional active neutral-point-clamped (ANPC) inverter. This unique arrangement reduces the number of active and passive components. A simple modulation technique reduces cost and complexity in the control system design without compromising reactive power capability. In addition, compared to major conventional seven-level inverter topologies, such as the neutral point clamped, FC, cascaded H-bridge, and ANPC topologies, the new topology reduces the dc-link voltage requirement by 50%. This recued dc-link voltage makes the new topology appealing for various industrial applications. Experimental results from a 2.2-kVA prototype are presented to support the theoretical analysis presented in this paper. The prototype demonstrates a conversion efficiency of around 97.2% ± 1% for a wide load range. [ABSTRACT FROM AUTHOR]

A new static synchronous compensator (STATCOM) based on the diode-clamped modular multilevel converter (DCM2 C) is proposed in this paper. In this converter topology, the capacitor voltage is clamped by using a low power rating diode in each submodule. The quantity of voltage sensors is significantly reduced and is free from the number of voltage levels. Furthermore, the voltage balancing control method becomes very simple and the capacitor voltage balance speed is fast. Based on the structure of modular multilevel converter, the DCM2C-STATCOM has the capability of Var compensation and negative-sequence current compensation. The topology characteristics and compensation control method of DCM2C-STATCOM are investigated in this paper. Experimental results obtained from a laboratory prototype validate that the capacitor voltage of the proposed DCM2C-STATCOM can be well balanced and the Var and negative-sequence current compensations are effective. [ABSTRACT FROM AUTHOR]

A three-phase three-level (TPTL) converter is an optimal alternative for high-input and high-power dc/dc conversion system. The voltage stress on the primary switch is only half of the input voltage due to its three-level (TL) structure, and the current rating of power devices can be reduced by the three-phase configuration. To achieve soft switching and improve efficiency, the resonant tank can be introduced to optimize the performance of the converter. In this paper, a novel TPTL LC-type series resonant converter with few switches and simple configuration is proposed. The voltage stress on all switches can be reduced to the half of the input voltage, and the voltage across output rectifiers is clamped to the output voltage; as a result, the proposed converter is suitable for high-input/output applications. Meanwhile, the ripple frequency of the output current can be increased significantly, resulting in a reduced filter requirement. Variable frequency control strategy is adopted in order to obtain zero-voltage switching for all switches and zero-current switching for all rectifier diodes in wide input voltage and load range. In this paper, the comprehensive analysis on the proposed converter is carried out, including the operation mode classification, the operating mechanism under different operation mode, along with the circuit model, and gain characteristics of the converter by the fundamental harmonic analysis. Experimental results from a 440–590 V input and 400 V/5 A output are presented to verify the theoretical analysis and the performance of the converter. [ABSTRACT FROM AUTHOR]

This paper studies pulse width modulation (PWM) techniques suitable for a four-level five-phase open-end winding (OeW) drive. The drive comprises a five-phase induction machine, supplied using two two-level voltage source inverters with isolated and unequal dc-link voltages, in the ratio 2:1. A decoupled carrier-based (CB) PWM modulation strategy, based on unequal voltage reference sharing between the two converters, is introduced in this paper. The stability of dc-link voltages in OeW drives is investigated next, using a novel analysis technique. Several modulation methods are analyzed and the results show that application of the coupled PWM technique, with carriers having in-phase disposition, leads to overcharging of the capacitor in the dc-link of the inverter intended to operate with the lower dc-link voltage. On the other hand, the proposed decoupled CB PWM scheme naturally eliminates the dc-link capacitor overcharging problem. These findings are verified experimentally, using open-loop V/f control. Two different decoupled CB modulation methods are compared and the best performing modulation method is selected and incorporated further into an OeW drive with field-oriented control. The presented steady state and transient experimental results demonstrate that the decoupled CB PWM technique is suitable for high-performance variable speed drive applications. [ABSTRACT FROM AUTHOR]

This paper presents a novel family of single-switch resonant dc–dc converters with low switch voltage stress. The single-switch resonant converter which has a ground-referenced switch is advantageous for implementing the gate drive circuit and operating at several-MHz switching frequency. However, the conventional ones mostly have high voltage stress on the switch, roughly 4–5 times the input voltage. In this paper, we propose the single-switch converter topologies derived from the drain-source impedance networks consisting of two inductors and two capacitors. The switch voltage of the proposed converters is shaped into a near trapezoid by designing the resonant networks to have the desired drain-source impedance. Furthermore, a simple and specific design scheme is presented here so that the peak switch voltage is lowered to 2.2–2.5 times the input voltage while zero voltage switching is achieved. Experimental results from a 20-W GaN-based prototype operating at 10 MHz demonstrate the feasibility of the proposed converter topologies and the design method. [ABSTRACT FROM AUTHOR]

In this paper, a new structure for symmetric and cascade multilevel converter is presented. This structure requires the least power electronic components, gate driver circuits, power diode, and dc voltage source. The number of output levels is high. Reduction of the number of power electronic switches against voltage levels is an important factor in multilevel converters due to safety in switches, circuit size, cost, installation area, and complexity in control. To maximize the number of output level in the proposed optimized structure in order to attain different goals, such as reduction of stress on switches, the result of comparing the proposed structure and other structures present. The proposed method is robust against the switching faults in multilevel converter for dc source and the equipment. The simulation and experimental results presented in this paper show the performance of the proposed method. [ABSTRACT FROM AUTHOR]

The large number of semiconductors typically implemented in multilevel converters generates large stray inductances in their commutation loops. As a consequence, high-voltage overshoots appear in the semiconductors during commutation which may limit the operation of the converter. The paper analyzes these overvoltages in the five-level active neutral-point-clamped (5L­ANPC) converter, one of the most popular five level converters and employed by ABB in its ACS­2000 drive. Experimental results show overvoltages almost three times higher than those corresponding to a two-level converter. In order to overcome this problem, the paper presents a new 5L­ANPC with the same characteristics (number of semiconductors, output waveform, switching frequency, efficiency, etc.), but with smaller overvoltages. This is achieved by adding some small capacitors to the busbar that behave like lossless snubbers but with a much simpler implementation. The experimental results illustrate the working principle of these capacitors and demonstrate the reduction of the overvoltages. As a result, the new converter can reach a higher output current or speed-up the commutations reducing, therefore, the losses and increasing the efficiency compared with the previous 5L­ANPC. [ABSTRACT FROM AUTHOR]

Thanks to the favorable advantage of low cost, integrated three-port dc–dc converters with reduced switches have attracted extensive attention. In order to provide more new topologies, this paper aims to propose a programmable topology derivation method, which effectively simplifies the cumbersome process of the conventional combination method. Instead of the manual connection and examination, the proposed alternative can quickly and rigorously derive multiple viable integrated three-port dc–dc topologies from a great number of possible connections with the aid of computer program. Besides, generalized analysis is also accomplished, with which performance characteristics of all derived converters are simultaneously obtained and then a comprehensive comparison can be easily conducted to select a preferred one for the practical application. Finally, an example-specific application with one input and two outputs is given, with topology selection, design, and experimental results demonstrated in detail. [ABSTRACT FROM AUTHOR]

In this paper, a systematic and analytical study of non-isolated topologies belonging to the family of reduced redundant power processing (R2P2) converters is presented. Based on this study, all the non-isolated R2P2 topologies that can be implemented in reality are derived. Detailed examples clarify all possible cases of this analysis. In addition to this, the voltage ratio and the efficiency for each one of the R2P2 configurations are calculated, being further illustrated with examples. A comparison among configurations is also discussed with criteria the high step-up voltage gain and efficiency, aiming for high-power applications. One of these R2P2 converters is selected for further examination, as the most suitable for such applications. The theoretical analysis, as well as the calculations of the step-up voltage ratio and efficiency of the selected converter, is compared to experimental results conducted on a 2-kW laboratory prototype designed to operate in various step-up voltage ratios and in a high-power range, proving the effectiveness of the proposed investigation. [ABSTRACT FROM AUTHOR]

This paper proposes a capacitor voltage regulation method for the dual converter with a floating bridge for aerospace applications. This topology has previously been reported, but with a constrained voltage utilization factor due to the need for capacitor voltage regulations. In this paper, the effect of switching states on the voltage variation of capacitor is quantitatively modeled and an enhanced space vector modulation scheme with current feedback is proposed to achieve an active control of the floating capacitor voltages. This proposed method also allows further exploitation and utilization of converter voltage. The relationship between the allowed modulation index of dual converter and load power factor is obtained and expressed using a fitted polynomial equation. The advantages of the proposed method include boosted voltage utilization and superior performance in term of capacitor voltage balance. These advantages have been proven through simulation and experimental results on RL loads as well as with an open-end winding induction motor. The proposed modulation scheme can boost the converter voltage utilization by at least 10% while achieving full four-level operation. More importantly, the higher available voltage allows extending the constant torque region of the motor, the further beginning of field weakening operation could be postponed. [ABSTRACT FROM AUTHOR]

This paper proposes a dual-function dynamic voltage restorer (DFDVR) with fault current-limiting capability. The new topology can operate under different modes: the short-circuit fault current-limiting mode and the compensation mode for voltage fluctuation. Different functions of the DFDVR are achieved by controlling a brake chopper circuit and antiparallel thyristors. During fault conditions, the antiparallel thyristors are deactivated to protect the dc-side capacitor, and the duration of the on- and off-periods of the semiconductor switch in the brake chopper circuit is controlled to adjust fault current amplitudes. During voltage sags, the antiparallel thyristors are activated, and the brake chopper circuit is turned off by controlling the gate turn-off thyristor in the brake chopper circuit, thus making the DFDVR similar to a conventional DVR. The control scheme and optimal parameter selection of the DFDVR are provided. The design methodology of the DFDVR was verified through simulations performed using the PSCAD/EMTDC software. The experimental results prove the capability and effectiveness of the DFDVR topology. [ABSTRACT FROM AUTHOR]

A trinary multilevel converter uses a few heterogeneous H-bridge submodules (SMs) to synthesize an output voltage with multiple levels. Two major limitations of this converter are that it needs multiple dc sources and it cannot operate under pulsewidth modulation (PWM). This paper addresses these limitations by adding a low-voltage H-bridge SM to this converter and proposing a new switching algorithm. The resulting PWM-based asymmetric cascaded H-bridge converter uses only one dc source and synthesizes a high-quality output voltage. This improved converter can be a potential choice for real and reactive power support in power system applications. This paper also proposes methods for stability analysis and design of this converter. Experimental case studies evaluate the performance of the proposed converter for both standalone and grid-connected modes of operation. [ABSTRACT FROM AUTHOR]

Several applications need a high power, high output voltage ac/dc converter. The structure includes a dc/dc resonant stage, which is fed from a three-phase line. Due to standards, rectified dc input voltage varies largely from 400 to 750 V affecting the adversely overall design and current levels. In fact, losses in the inverter become unbearable if both switching frequency and transferred power are desired beyond a certain level. In those cases, it is necessary to connect several switches in parallel. As an alternative, the new switches can configure a new modular structure instead, adding more flexibility in the control to compensate input voltage variations. As a result, the required circulating current is reduced to a half, with benefits in total power losses. Moreover, the nature of the topology allows a reconfiguration of the resonant net (LCC) for low power, reducing even further the minimum circulating current under those conditions (fluoroscopy, for instance). In this paper, the new multilevel resonant topology is mathematically modeled and proposed for radiography and fluoroscopy. An example illustrates the design procedure for a given application at 100 kW, 50–150 kV. [ABSTRACT FROM AUTHOR]

This paper proposes a novel dc power electronic transformer (DCPET) topology for locomotive, ac/dc hybrid grid, dc distribution grid, and other isolated medium-voltage and high-power applications. Compared with conventional PET topology, the proposed DCPET has fewer power semiconductor devices and high-frequency isolation transformers, which can improve the power density and reliability. Fault handling or redundancy design can be achieved to further improve the reliability when some dc–dc modules break down. Also, input voltage sharing control can be omitted to simplify the control system and improve the stability. Meanwhile, soft switching is guaranteed for all the switches, which is beneficial to increase switching frequency and improve power density. In this paper, the principle, evolution, and control of the proposed DCPET are respectively presented and studied in detail. Finally, a prototype of the proposed DCPET is built and the experimental results verify the validity and superiority of the proposed topology. [ABSTRACT FROM AUTHOR]

This paper proposes a novel method for instantaneous balancing of neutral-point (NP) voltages with stacked multilevel inverters (MLIs) for variable-speed drives. The stacked MLI uses series-connected dc sources and NPs (connecting points of dc sources) to obtain the desired levels. The balancing of NP voltages are obtained by using a low-voltage-capacitor-fed cascaded H-bridge (CHB) per phase of a symmetrical six-phase induction machine (IM), which ensures zero current drawn from NPs (at any given instant). Since no current is drawn from NPs, the single dc-link operation with stacked capacitors is also possible. The scheme is suitable for applications, where low-voltage dc sources and batteries are stacked to form a dc link. A variable-speed operation is done using a seven-level inverter scheme for a symmetrical six-phase IM, which is formed by three dc-link stacked capacitors cascaded with two low-voltage-capacitor-fed CHBs per phase. Furthermore, the method is extended for an open-end IM to obtain a seven-level common-mode eliminated space vector structure using a single dc link. The generalization of this method for any stacked $n$ -level inverter without NP voltage deviation is also presented in this paper. The experimental results and analysis are included to validate the proposed method. [ABSTRACT FROM AUTHOR]

This paper presents the digital implementation of a boundary controller with unipolar switching characteristic for single-phase voltage source full-bridge inverters. This paper expands the application of a second-order switching surface-based control method to unipolar switching of single-phase voltage source inverters (VSIs) using a finite-state machine. The finite-state machine has been formulated considering four different states of the inverter; positive,zero1, negative, andzero2. The second-order boundary control governs the current state of the system and provides proper switching action to keep the system within the desired reference. The control law is implemented digitally in F28m35x digital control card. A full-bridge inverter topology is used to achieve the three-level voltage switching. Various simulations and experiments were performed in a 550 VA, 120 V, 60 Hz VSI with a digitally implemented controller to verify the theoretical predictions. A high-quality voltage output was obtained for various loading conditions. The transient performance of the controller was investigated using a reference and load changes. A comparison of the implementation was made with the existing classical controllers to verify the fast-dynamic response of the system. [ABSTRACT FROM AUTHOR]

In this paper, a new nonisolated high step-up dc–dc converter is proposed. Active–passive inductor cells (APICs) are used to extend the topology. The ability to achieve high gains is the main merit of the proposed topology. The proposed converter operates based on parallel charging and series discharging of the inductors. The converter also achieves high step-up voltage gain with appropriate duty cycle and low voltage and current stress on the power switches and diodes. The proposed converter is analyzed in operation modes. The main parameters of the converter such as voltage gain, voltage stress of semiconductor devices are calculated to compare with other structures. Considering the output voltage ripple and filter size, the proposed converter is designed. Moreover, the losses and efficiency of the converter are calculated. The performance of the proposed converter is validated by experimental results. [ABSTRACT FROM AUTHOR]

An adaptive control of DPWM implementable in clamped-three-level inverters with two strings of photovoltaic (PV) panels in cascaded connection is proposed in this paper. The proposed modulation is developed based on the so-called circuit-level decoupling concept. It is able to provide balance line voltage even under unbalanced dc links. The unequal dc voltages appeared due to asymmetric maximum point of power trackings (MPPTs) are controlled by proper injection of zero-sequence voltage to the common mode voltage, while the total dc voltage is regulated based on the voltage commands generated by the MPPT of each string. Thus, both PV strings are able to be operated based on their MPPTs while there is almost no low-order harmonic distortion at the inverter output current. Compared with the previous methods, the high capability of the proposed method is evaluated by simulation study and experimental tests. [ABSTRACT FROM AUTHOR]

Dual active bridge (DAB) based converters offer the benefit of smaller volume due to high-frequency isolation and controllability of active power flow, making them attractive for various applications, such as renewable energy generation, plug-in hybrid vehicles, and distribution systems. This paper presents a novel converter topology along with a modulation strategy for a DAB-based three-phase ac to dc converter. The major benefits are single-stage conversion, no unreliable intermediate dc-link capacitor, reduced number of switches, i.e., only two active switches on the ac side, simple control scheme, open-loop unity power factor operation, bidirectional power flow, and partial soft-switching. This paper presents the analysis of all the operating modes of the converter, resulting in the analytical estimation of power transfer and rms winding current and investigation of soft-switching conditions for the power devices. Simulation and experimental results have been presented to demonstrate the advantages of the proposed technique and accuracy of the analysis.1 [ABSTRACT FROM AUTHOR]

To process the power in hybrid energy systems using a reduced part count, researchers have proposed several multiinput dc–dc power converter topologies to transfer power from different input voltage sources to the output. This paper proposes a novel bidirectional nonisolated multi-input converter (MIC) topology for hybrid systems to be used in electric vehicles composed of energy storage systems (ESSs) with different electrical characteristics. The proposed converter has the ability to control the power of ESSs by allowing active power sharing. The voltage levels of utilized ESSs can be higher or lower than the output voltage. The inductors of the converter are connected to a single switch; therefore, the converter requires only one extra active switch for each input, unlike its counterparts, hence resulting in reduced element count. The proposed MIC topology is compared with its counterparts concerning various parameters. It is analyzed in detail, and then, this analysis is validated by simulation and through a 1-kW prototype based on a battery/ultracapacitor hybrid ESS. [ABSTRACT FROM PUBLISHER]

Modular multilevel converters (MMCs) are being developed for the grid connection of offshore wind or tidal farms. In order to reduce the construction and maintenance costs, it is desirable to reduce the weight and volume of the system. In current MMC submodule designs, the reservoir capacitor usually accounts for over 50% of the total volume and 80% of weight. This paper presents a new design concept and control principle for a submodule using the stacked switched capacitor (SSC) architecture that can significantly reduce the capacitor size in an MMC. Practical considerations for a high-voltage high-power SSC-based MMC submodule are presented in this paper, through the design of a 21-level, 40-kV (pole-pole dc), 19.1-MW, grid-connected system, and the concept is demonstrated experimenttally on a scaled-down 400-V, 12.3-Apeak laboratory prototype submodule. It is shown that with the proposed SSC architecture, the total volume of capacitors in each submodule can be reduced by more than 40% without significantly increasing the power loss. [ABSTRACT FROM AUTHOR]

This paper presents a model predictive control technique applied to a dual-active bridge inverter where one of the bridges is floating. The proposed floating bridge topology eliminates the need for isolation transformer in a dual inverter system and therefore reduces the size, weight, and losses in the system. To achieve multilevel output voltage waveforms, the floating inverter dc-link capacitor is charged to the half of the main dc-link voltage. A finite-set model predictive control technique is used to control the load current of the converter as well as the floating capacitor voltage. Model predictive control does not require any switching sequence design or complex switching time calculations as used for space vector modulation; thus, the technique has some advantages in this application. A detailed analysis of the converter as well as the predictive control strategy is given in this paper. Simulation and experimental results to validate the approach are also presented. [ABSTRACT FROM PUBLISHER]

The increasing interest in multiphase drive systems has led to the extension of inverter topologies and pulse width modulation (PWM) methods from three-phase to multiphase occasions. Carrier-based PWM (CPWM) dominates space vector PWM when the phase number increases, because of its simple computation and modular implementation. Although intensive work has been done on modifying PWM methods to reduce the common-mode voltage (CMV), not enough work has been done on CPWM methods with CMV reduction for multiphase drives. This paper extends the phase-shifted sinusoidal PWM (PS-SPWM) method for five-phase and six-phase two-level voltage-source inverters (VSI) and employs the intersection-plotting method and Fourier analysis to reveal the nature of the CMV. Both experiment and simulation results comply with theoretical analysis that compared with the conventional SPWM, the PS-SPWM can effectively reduce the CMV in peak-to-peak value and RMS value, though it leads to a higher phase current distortion. In addition, the hardware realization of PS-SPWM for multiphase inverters by a distributed control system is presented in this paper. [ABSTRACT FROM AUTHOR]

This paper presents a comprehensive analysis of the current-stress optimization and soft-switching operation of the isolated bidirectional dual active bridge (DAB) dc–dc converter with the unified triple-phase-shift (UTPS) control. On this basis, the current-stress-optimized modulation scheme is proposed for DAB, which leads to the minimum current stress with the required transmission power and voltage conversion ratio in the whole load range. Moreover, the full soft-switching operation is achieved for the converter simultaneously. Distinct from the previous modulation schemes, the proposed optimized modulation scheme is deduced from a unified analysis of TPS where all effective switching modes are investigated. A novel algorithm based on the Karush–Kuhn–Tucker (KKT) conditions is originally proposed to derive closed-form solutions for the global optimal control parameters. This paper also presents a typical closed-loop control strategy for DAB with TPS control and detailed descriptions about the closed-loop operation. A laboratory prototype is applied, and the experimental results validate that the current-stress optimization and efficiency improvement are realized by applying the optimized modulation scheme. The experimental results also verify the effectiveness of the closed-loop control strategy for DAB with TPS control. [ABSTRACT FROM PUBLISHER]

A new pulsewidth modulation (PWM) strategy which is an alternative approach of the discontinuous PWM (DPWM) for a three-level neutral-point-clamped (NPC) inverter is proposed in this paper. A three-level NPC inverter is completely mature and very well-established topology in high-power applications. However, the three-level NPC inverter has an inheritance problem of the neutral-point voltage unbalancing due to the split dc-link capacitors. This structure can cause large neutral-point voltage ripple. Furthermore, output currents of the three-level NPC inverter are distorted by the neutral-point voltage ripple. Therefore, the neutral-point voltage must be controlled. In this paper, a new DPWM method using two different offsets for the neutral-point ripple reduction is proposed and the effectiveness of the proposed DPWM method is verified by using the simulation and the experimental results. [ABSTRACT FROM PUBLISHER]

In this paper, a novel multilevel dc–ac inverter is proposed. The proposed multilevel inverter generates seven-level ac output voltage with the appropriate gate signals’ design. Also, the low-pass filter is used to reduce the total harmonic distortion of the sinusoidal output voltage. The switching losses and the voltage stress of power devices can be reduced in the proposed multilevel inverter. The operating principles of the proposed inverter and the voltage balancing method of input capacitors are discussed. Finally, a laboratory prototype multilevel inverter with 400-V input voltage and output 220\ \textV\text{rms}/2\,{\text{kW}} is implemented. The multilevel inverter is controlled with sinusoidal pulse-width modulation (SPWM) by TMS320LF2407 digital signal processor (DSP). Experimental results show that the maximum efficiency is 96.9% and the full load efficiency is 94.6%. [ABSTRACT FROM AUTHOR]

This paper presents a new application of power and voltage balance control schemes for the cascaded H-bridge multilevel inverter (CHMI)-based solid-state transformer (SST) topology. To reduce load on the controller and simplify modulation algorithm, a master–slave control (MSC) strategy is designed for the dual active bridge (DAB) stage. The master controller executes all control and modulation calculations, and the slave controllers manage only device switching and protection. Due to the inherent power and dc-link voltage unbalance in cascaded H-bridge-based SST, this paper presents a compensation strategy based on three-phase dq decoupled current controller. An optimum zero-sequence component is injected in the modulation scheme so that the three-phase grid currents are balanced. Furthermore, to tightly regulate the output voltage of all the DAB modules to target value, a dynamic reference voltage method is also implemented. With this proposed control method, the three-phase grid currents and dc-link voltage in each module can be simultaneously balanced. Finally, simulation and experimental results are presented to validate the performance of the controller and its application to microgrid SST. [ABSTRACT FROM PUBLISHER]