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The term "computer utility" has been perennially present in the history of computing, though a precise definition of the term has been fleeting, even when it first appeared in the Mid-1960s. The recent resurgence of interest in the remote provision of computing power has brought with it the historical jumble of definitions that make up that term, and "computer utility" is once again being applied to computer architectures though with little justification or exposition given regarding this use. This article attempts to determine whether past and present applications of the term share any commonalities and in doing so questions whether there has ever existed a true "computer utility." To do so, incarnations of the "computer utility" are examined in two time periods--the 1960s and the 1970s--during which time computer time-sharing enjoyed significant prosperity and now as cloud computing has become increasingly popular and prolific. [ABSTRACT FROM PUBLISHER]

Despite a widely-acknowledged shortage of software developers, and reports of a gap between industry needs and software education, the possible gap between students' needs and software development education has not been explored in detail. In their university education, students want to take courses and carry out projects that clearly relate to their lives and their goals. This paper reports on a quantitative study of 297 software development students. The analysis of the results suggests that software development education has a predominantly social relevance to students and also has moderate personal and professional relevance. The following approaches are recommended to improve students' views of the relevance of software development education: use various learning environments; pay special attention to female students, students who did not have IT as a school subject, and students who rate their own academic performance as low; update educators on the latest developments; design programs to appeal to students and to meet societal demands. [ABSTRACT FROM PUBLISHER]

At the end of 1960, Argentina began to incorporate its first computers and develop computing research projects and training programs. This early period overlapped with an renovation movement, and the most notable efforts to appropriate the new technology were initiated at the universities. Led by mathematician Manuel Sadosky, the most relevant contribution came from the Calculus Institute (Instituto de Cálculo, IC) at the University of Buenos Aires. From 1961 to 1966, equipped with a Ferranti Mercury computer, the IC went through a period of rapid growth, and it was fundamental to creating the first computer science degree program in Latin America. After the country's coup d'état in 1966, approximately 90 percent of IC's personnel resigned. Afterward, no institution could match its scientific and professional expertise nor equal its authority and leadership in the field, despite the modernizing rhetoric of the new authorities. [ABSTRACT FROM PUBLISHER]

These reminiscences relate to the period that Brian Randell spent between 1964 and 1966 first at IBM Research working on Project Y and then in the IBM Systems Development Division on the resulting ACS Project--then-secret projects that aimed to build a supercomputer that would be 100 times faster than Stretch. Randell's account is based in part on his memory, but also makes extensive use of the small set of files that he had retained, mainly relating to patent applications. A scanned copy of one of these files, the paper "Dynamic Instruction Scheduling," that he coauthored with Lynn Conway, Don Rozenberg, and Don Senzig in February 1966, is available as an online Web extra https://s3.amazonaws.com/ieeecs.cdn.csdl.public/mags/an/2015/03/man2015030055s.pdf and in Newcastle University's online archive at www.cs.ncl.ac.uk/publications/trs/papers/891.pdf. Because of space constraints just the initial three pages of this paper are included in the present article, which also includes the text from a section on "Interrupts" that was added to the 1969 IBM San Jose Technical Report version of the 1966 paper. [ABSTRACT FROM PUBLISHER]

Information about upcoming events of interest to Computer Society members. [ABSTRACT FROM PUBLISHER]

This article looks at India's IT industry history in the 1970s and early 1980s by focusing on the development of an indigenous microcomputer by the Hindustan Computers Limited (HCL). After gaining independence in 1947, the Indian government embarked on a program that focused on economic development, albeit with a socialist theme and central planning. Indigenization was the prime objective. Some industries were more favored than others, and electronics and computers were initially neglected and hobbled by restrictive policies. Foreign companies were pressured to reduce foreign equity. By the late-1970s, government efforts to induce IBM to transfer equity had failed. The government responded by forcing IBM to leave India and by relaxing policies and permitting local companies to import parts and components to develop computers locally. As a result, many private companies entered the computer sector. HCL was born in 1976 and released its first commercial system in 1978. [ABSTRACT FROM PUBLISHER]

Edward Feigenbaum, the recipient of the 2013 Pioneer Award, is one of the founders of the field of artificial intelligence and has been one of its leaders for more than 50 years. He became aware of the birth of AI when he was an undergraduate at Carnegie Tech (later, Carnegie Mellon University). Continuing to graduate school there, he was mentored by Herbert Simon, and he also collaborated with Allen Newell. His career has taken him from Carnegie to the University of California, Berkeley, Stanford University, RAND, and the Pentagon. Feigenbaum has also authored and coedited several seminal AI books: Computers and Thought (1963), The Fifth Generation (1983), and the four-volume Handbook of Artificial Intelligence (1980s). In this interview, David Alan Grier and Feigenbaum talk about his career, his mentor Herbert Simon, and the development of AI. [ABSTRACT FROM PUBLISHER]

Comparisons between the early British and US computer industries invariably have focused on the differential development of the British Tabulating Machine Company (BTM) and IBM. In this article, the author seeks to refocus examination of BTM (and comparisons of it to IBM) within the context of an American competitor somewhat similar in size, customer base, and organizational capabilities in electronics to BTM: Burroughs Corporation. The cases of BTM and Burroughs demonstrate the complexity of coordinating international R&D joint ventures, the struggle to create advanced products in an emerging technology while preserving existing revenue streams, and the cultural and technical hurdles involved in assimilating R&D resources from acquisitions in a rapidly changing technologically based industry. [ABSTRACT FROM PUBLISHER]

The article discusses the impact of the computer industry on the environment, examining how the industry is attempting to reduce its footprint on the planet. Landfills are being filled up with discarded computer equipment, the author states. Of the three areas within the computer industry that touch the environment, disposal, manufacturing, and operations, it is the operational sector that has made the most visible improvements, that article indicates. Other topics include the power consumption of computers, decreasing the use of toxic substances in computers, and the disposal of unwanted equipment.

The article reports on the history of stored-program computer ENIAC and its comparison to the Manchester Baby. According to the author, ENIAC was converted to operate in stored-program mode in March-April 1948 before the Manchester Baby in contrast with Hans Neukom observation that the ENIAC first operated in stored-program mode in September 1948. He averred that there is a crucial difference between ENIAC operating in March-May 1948 against Sept. 1948 because the Manchester Baby have first operated on June 21, 1948. Compared to the Manchester Baby, the ENIAC was more powerful, capable of operating far more complex programs. However, on the theoretical side, the Manchester Baby could change the course of the program during runtime while the ENIAC could not.

The Peer-to-Peer (P2P) model, being widely adopted in today's Internet computing, suffers from the problem of topology mismatch between the overlay networks and the underlying physical network. Traditional topology optimization techniques identify physically closer nodes to connect as overlay neighbors, but could significantly shrink the search scope. Recent efforts have been made to address the mismatch problem without sacrificing the search scope, but they either need time synchronization among peers or have a low convergent speed. In this paper, we propose a scalable bipartite overlay (SBO) scheme to optimize the overlay topology by identifying and replacing the mismatched connections. In SBO, we employ an efficient strategy for distributing optimization tasks in peers with different colors. We conducted comprehensive simulations to evaluate this design. The results show that SBO achieves approximately 85 percent of reduction on traffic cost and about 60 percent of reduction on query response time. Our comparisons with previous approaches to address the topology mismatch problem have shown that SBO can achieve a fast convergent speed, without the need of time synchronization among peers. [ABSTRACT FROM AUTHOR]

Sequence alignment is a common and often repeated task in molecular biology. Typical alignment operations consist of finding similarities between a pair of sequences (pairwise sequence alignment) or a family of sequences (multiple sequence alignment). The need for speeding up this treatment comes from the rapid growth rate of biological sequence databases: Every year their size increases by a factor of 1.5 to 2. In this paper we present a new approach to high-performance biological sequence alignment based on commodity PC graphics hardware. Using modern graphics processing units (GPUs) for high-performance computing is facilitated by their enhanced programmability and motivated by their attractive price/performance ratio and incredible growth in speed. To derive an efficient mapping onto this type of architecture, we have reformulated dynamic-programming-based alignment algorithms as streaming algorithms in terms of computer graphics primitives. Our experimental results show that the GPU-based approach allows speedups of more than one order of magnitude with respect to optimized CPU implementations. [ABSTRACT FROM AUTHOR]

The use of space filling curves for proximity-improving mappings is well known and has found many useful applications in parallel computing. Such curves permit a linear array to be mapped onto a 2D (respectively, 3D) structure such that points that are distance d apart in the linear array are distance O(d½) (O(d½)) apart in the 2D (3D) array and vice versa. We extend the concept of space filling curves to space filling surfaces and show how these surfaces lead to mappings from 20 to 3D so that points at distance d½ on the 2D surface are mapped to points at distance O(d½) in the 3D volume. Three classes of surfaces, associated respectively with the Peano curve, Sierpiriski carpet, and the Hilbert curve, are presented. A methodology for using these surfaces to map from 2D to 3D is developed. These results permit efficient execution of 2D computations on processors interconnected in a 3D grid. The space filling surfaces proposed by us are the first such fractal objects to be formally defined and are thus also of intrinsic interest in the context of fractal geometry. [ABSTRACT FROM AUTHOR]

The article describes the PWRficient processors developed by P.A. Semi Inc. The authors discuss how the company's processors achieve high performance while consuming very low power. According to the authors, these processors are decedents of the extremely power-efficient StrongArm processor developed by Dan Dobberphul. The dual-core PA6T-1628M system on chip is the first design in the PWRficient family of high performance that target server class performance with power consumption. Some very interesting nuggets about low-power design are provided.

The article offers information on the first licensable, clockless 32-bit processor core, the ARM99BHS. It describes the architecture of ARM996HS and discusses the advantages of the clockless design methodology, including lower power consumption and decreased noise generation. According to the authors, the ARM996HS core is particularly interesting because it is clockless or self-clocked even though it can be embedded in a variety of technologies. Developed through the tide design flow, ARM996HS consumes about one-third the power of comparable synchronous, clock-gated, ARM cores implementing the same instruction set architecture.

This article discusses on several studies building on theories and research from several domains investigating how gender differences interact with software. Gender differences suggest that females process information and solve problems in different ways than males do. It investigates whether software design should take gender differences into account. It discusses gender human-computer interaction which refers to how software relates to gender differences. It focuses on how gender-neutral software works, not on gender-oriented content.

This article announces the coverage of the IEEE Computer Society's publications for 2007. The Computer Society publications will address breaking developments, broad trends, historical perspectives, and emerging issues in all aspects of the computing profession. It publishes 14 technical magazines that include topics on Internet computing, graphics, microprocessors, test, and distributed systems. It highlights emerging technologies that promise to reshape the computing landscape and key topics include nanotechnology, car-based computing, and synthetic biology.

The article focuses on the use of computer simulation technology, the technology of computer games, which caught the public attention in the U.S. Chess-playing computers captured the attention of early computer researchers compared with the computer simulation. As more programmers became skilled at writing games with simulation tools, they explore computer games, fantasy worlds. The computer game industry has used simulation technology to create a host of artificial and imaginary worlds. Therefore, people get their first exposure to computers through video games. INSET: IEEE Annals of the History of Computing.

The article presents information on multipass pipelining, a microarchitectural model that provides an alternative to out-of-order execution for tolerating memory access latencies. In order to achieve high-performance levels microprocessors exploit instruction-level parallelism and tolerate memory-access latencies. Unlike microprocessors, out-of-order microprocessors do this by dynamically scheduling instruction execution, but require power-hungry hardware structures. Multipass pipelining uses two or more passes of preexecution or execution to achieve performance efficacy. It assumes compile-time scheduling for lower-power and lower-complexity exploitation of instruction-level parallelism, and unlike traditional in-order processors, allows persistent advance execution of instructions beyond those that are interlocked on a cache miss. The pipeline persistently executes instructions that are ready and skips over those that are not ready. Multipass pipelining enhances the in-order runahead and lets in-order processors perform useful processing instead of stalling while an instruction waits on a data cache miss.

The article presents information on a new memory scheduling approach that makes decisions based on the history of recently scheduled operations. Recently memory bandwidth has become an increasingly important resource. This is because the gap between processor and memory speeds has led to aggressive use of techniques such as prefetching, speculation and multithreading, which consume bandwidth to hide or reduce memory latency. This demand has been further added by the architectural trends toward multicore chips and application trends toward multimedia workloads. Even though modern DRAMs have hierarchical structures that allow multiple memory commands to concurrently access different substructures DRAMs with 5D structure and many different types of internal latencies make more sophisticated memory scheduling schemes necessary. A history-based scheduler selects the next memory command from the history of recently scheduled memory commands and the set of available commands from the reorder queues.

The article presents information on how runahead execution significantly increases a high-performance processor's ability to tolerate long main-memory latencies. High-performance processors today face main-memory latencies on the order of hundreds of processor clock cycles. Runahead execution improves a processor's performance by speculatively pre-executing the application program while the processor services a long-latency (L2) data cache miss. It lets a processor execute instructions that it otherwise couldn't execute under an L2 cache miss. Runahead execution provides the memory-level parallelism benefits of a large instruction window without requiring the large, complex, slow, and power-hungry structures. It increases the processor's ability to tolerate long main-memory latencies because it has modest hardware cost and doesn't significantly increase processor complexity. However, runahead execution significantly increases a processor's dynamic energy consumption by increasing the number of speculatively processed instructions.

The article presents information on new load-store processing algorithms for latency tolerant architectures. Memory latency tolerant architectures can achieve high performance by supporting thousands of in-flight instructions. Even though these architectures can achieve high performance without scaling cycle-critical processor resources they require large load and store queues to track all loads and stores executed while a long latency miss is pending. These architectures can effectively tolerate increasing memory latencies by executing thousands of useful miss-independent instructions in parallel with the pending miss. Latency-tolerant processors achieve large instruction windows by ensuring that instructions depending on a long-latency miss do not block cycle-critical processor resources, which then become available for subsequent miss-independent instructions to execute and complete. These instructions can execute and speculatively retire and freeing up their resources in the process.

The article focuses on the computer industry in Sweden by providing an overview of the business plans of Facit, an office equipment company. The Swedish company Facit was, in the mid-1950s, the world's 11th largest producer of mechanical and electromechanical office machines. Facit was second in producing calculating machines and seventh in adding machines. In late 1955, Facit was informed that Sweden's National Committee on Mathematical Machines was about to be dissolved due to widespread discontent among its personnel. The committee had been working with computer-related questions since 1948, with instructions to plan and lead the work on mathematical machines for Swedish purposes. During the following years, the committee established an intensive cooperation with leading research institutions. In early 1954, the committee finally built its own calculating machine, the Binary Electronical Sequential Calculator (BESK). Facit hired Erik Stemme, the most prominent engineer on the committee, in February 1956. Stemme was given the opportunity to select the individuals he wanted to have as his future collaborators. This group, a total of 18 engineers--nicknamed the BESK Boys--was supervised by Stemme in Facit's newly established electronics department.

Virtualization technologies encompass a variety of mechanisms and techniques used to address computer system problems such as security, performance, and reliability by decoupling the architecture and user perceived behavior of hardware and software resources from their physical implementation. This article focuses on virtual machine monitors (VMMs), a key component of virtual machines that provides a layer between software environments and physical hardware that is programmable. A discussion is presented on the various perspectives of VMMs.

This article explores the history of the Association of Data Processing Service Organizations (ADAPSO), its political activities during the 1970s, its relationship with professional services firms, and the problems it faced during the 1980s as the software industry shifted toward microcomputers. One of Milton Wessel's duties as ADAPSO's general counsel was to ensure that its activities did not breach any antitrust regulations. There were many potential pitfalls. One was the question of whether firms viewed as hostile by many of the association's members--such as IBM, AT&T, and the major accounting firms--could be restricted from joining ADAPSO. Wessel produced a comprehensive and confidential guide to the legal precedents and principles involved in these issues, which was provided to all ADAPSO officials. At the start of the 1980s, ADAPSO seemed stronger than it had ever been. In retrospect, however, the association's reliance on major mainframe software firms and time-sharing companies placed it on the wrong side of history. The association acted quickly to court a microcomputer software companies. The ADAPSO also found it increasingly difficult to attract and retain small professional service firms as members, in part because the association was seen as having sided decisively with the interests of the industry's larger firms.

This article analyzes a novel framework for estimating power in embedded computer systems. Among the many metrics used to characterize the quality of an embedded system-on-chip design, power consumption has emerged as the most important. This is largely due to the proliferation of mobile battery-powered computer devices. A technique was developed that derives power figures from the execution of high-level models. This technique makes it possible to access embedded computer system designs much earlier in the design cycle, contributing to sounder decisions throughout the entire development process and leading to a faster execution time. To validate the method, it was applied to a peripheral core and compared the results with those using a gate-level approach.

The article presents information on the vacuum tube computers and the supporting software developed by Sperry Rand Corp. The company was formed in 1955 by the merger of Remington Rand and Sperry Gyroscope. In the development of the computer industry the most striking technological changes have been those in computer processors — from vacuum tubes to transistors to integrated circuits — and these have been taken to define the three generations of computer hardware. One of the most significant developments within the first generation was the emergence of core memory as the primary memory technology. The ENIAC had used vacuum tubes for its 20 accumulators. However, the need to provide greater storage capacity for its successor, the EDVAC, led to the development of mercury delay line memory. Once core memory was developed, it was found superior to electrostatic memory in reliability and to mercury line and drum in speed of access. However, for many years drum memory continued to be used because of the high cost of core memory.

This article gives a short history of the word "computer" beginning from its use in early Roman times up to the introduction of the digital computer. In many dictionaries, the etymology of computer is not typically given because the entry for this word follows that of the verb compute, for which the derivation normally given is computare, a word that can be broken down into com, the Latin for "together" and putare, the Latin for "to reckon" or "to settle." Although this is generally correct, the Latin word cornputus may well have been the one giving rise to the word computer as used in the modern sense, because this word was in widespread use in Europe throughout the Middle Ages. Indeed, the word computus may have been used for the first time in the third century AD, initially taking the same varied meaning as computation, for example referring to arithmetic or economic "estimation." In the first few decades of the past century, the demand for more human computers continued to rise. During World War I, for example, many computers were employed on both sides of the war to perform tasks related to ballistics, surveying, navigation, and cartography. Also, because most of the men went to war, this period marked an increase in women computers.

Focuses on the projections made by researchers in 1997 concerning the direction of billion-transistor microprocessor architectures. Categorization of constraints that would affect architectures over the next decade; Review of visions of what billion-transistor architectures would be in the future; Emergence of constraints and trends since 1997 which affect the move toward balanced and scalable billion-transistor architectures.

It has been a curiosity for historians and society that how computing go global. By knowing how global dispersion occurs in order to gauge its pace and course, optimize national economic policies and point out economically attractive strategies for companies, to help social planners, how information technology (IT) effects common man and IT stands differently with other technologies developed in world, one can understand the spreading of computing.

We describe a constrained test-generation procedure for synchronous sequential circuits embedded in a large design where scan is used to provide access to the inputs of the individual circuits. The constrained test-generation procedure generates test sequences, where each vector is obtained from the previous one by shifting the scan chain a limited number of positions. Such constrained sequences can be applied through a scan chain with minimal test-application time overhead due to scan. When a shift by a single positions is used to obtain each vector from the previous one, the constrained test sequences can allow functional (at-speed) testing of the circuit. Although constrained test sequences cannot achieve complete fault coverage, they reduce the overall test-application time required to achieve complete fault coverage when used together with unconstrained test sequences. We demonstrate these features through experimental results. [ABSTRACT FROM AUTHOR]

A new form of logic diagnosis is described that is suitable for diagnosing falls in combinational logic. It can diagnose defects that can affect arbitrarily many elements in the integrated circuit. It operates by first identifying patterns during which only one element is affected by the defect, and then diagnosing the fails observed during the application of such patterns, one pattern at a time. Single stuck-at faults are used for this purpose, and the aggregate of stuck-at fault locations thus identified is then further analyzed to obtain the most accurate estimate of the identifies of those elements that can be affected by the defect. This approach to logic diagnosis is as effective as that of classical stuck-at fault-based diagnosis, when the latter applies, but is far more general. In particular, it can diagnose fails caused by bridges and opens as well as fails caused by regular stuck-at faults. [ABSTRACT FROM AUTHOR]

Discusses trends in power-aware computing. Aims of power-aware design techniques; Modes of operation of computing systems; Temperature-aware computing; Key elements that form a computing system.

The articles presents information on women's historical participation in the computer industry, academic computer science, and the application of information processing techniques in a variety of work environments. Women have played important roles in the history of computing from 18th century human computers to 21st century dot-com entrepreneurs. Women's historical involvement with computers has not been widely publicized, in part because historians of computing recently have focused mainly on hardware. Women were employed to do mathematical calculations since at least the 18th century. They continued calculating entirely with hand.

Focuses on the usage-based reading (UBR) technique which combines traditional inspection principals, use cases, and operational profile testing to create and efficient, user-oriented software inspection reading technique. Application of inspection to all kinds of software development artifacts; Comparison of the UBR with the checklist-based reading approach.

Examines the experience of Burroughs Corp., which entered the computer market from a background in calculators and bank accounting machines. Background of Burroughs; Decision made on hardware circuits for floating-point arithmetic in 1955; Information on transistor computers.

Describes the ubiquitous computing vision in the field of computer technology. Concept of ubiquitous computing; Basic model of ubiquitous computing; Impact of the concept on the research community and the industry. INSET: Early ideas on computing everywhere.

Features several computer products presented at the 1998 Comdex computer show in the United States. Microsoft's SQL Server 7; Oracle 8i; IriScan's Iris Recognition Technology; Visionics' FaceIt DB, a program for biometric security; Cyber-Sign's Cyber-Sign Enterprise 2.0; Be's BeOS 4.0.

Presents the House for the History of International Business Machine (IBM) Data Processing in Sindelfingen, Germany. How the House began; Main attractions of the show; Information on the transistor age and IBM's efforts in electronic data processing shows in the show.

In this paper we deal with the performance of parallel computing in a network of Apollo workstations where the processes use the Remote Procedure Call (RPC) mechanism for communication. The speedup in such systems cannot be accurately estimated without taking into account the relatively large communication overheads. Moreover, it decreases by increasing parallelism when the latter exceeds some certain limit. The main aim of this work is to estimate the speedup and optimum degree of parallelism from the characteristics of applications. Hence the speedup can be maximized by the appropriate choice of the degree of parallelism, or the parallelization efforts can be economized when the estimated speedup reveals to be unsatisfactory. In order to estimate the speedup and determine the optimum degree of parallelism, first we characterize the parallelization and the communication overheads in the system considered. Then parallel applications are modeled and their execution times are expressed for the general case of nonidentical tasks and workstations. The general case study allows to take into account the structural constraints of the applications by permitting their partitioning into heterogenous tasks. A simple expression of the optimum degree of parallelism is obtained for identical tasks where the inherent constraints are neglected. The fact that the theoretical maximum speedup is bounded by half of the optimum degree of parallelism shows the importance of this measure. Our approach is valid for all systems which use RPC as a communication mechanism. [ABSTRACT FROM AUTHOR]

An asymptotic queueing theoretic approach is pro- posed to analyze the performance of a FCFS heterogeneous multiprocessor computer system with a single bus operating in a randomly changing environment. All stochastic times in the system are considered to be exponentially distributed and independent of the random environment, while the access and service rates of the processors are subject to random fluctuations. It is shown under the assumption of "fast" arrivals that the busy period length of the bus converges weakly, under appropriate normalization, to an exponentially distributed random variable. As a consequence, main steady-state performance measures such as system throughput, mean delay time, expected waiting time, and mean number of active processors can be approximately determined. The credibility of the proposed method is validated by comparing the new approximations with known exact results. [ABSTRACT FROM AUTHOR]

We consider here the design of computer systems that must be trusted to satisfy simultaneously a variety of critical requirements such as human safety, fault tolerance, high availability, security, privacy, integrity, and timely responsiveness-and to continue to do so throughout maintenance and long-term evolution. Hierarchical abstraction provides the basis for successive layers of trust with respect to the full sel of critical requirements, explicitly reflecting differing degrees of criticality. [ABSTRACT FROM AUTHOR]

The article presents a call for papers on topics related to computers, and a calendar of computer related events from March to June 2013, which include the International Conference on Advanced Information Networking and Applications in Barcelona, Spain, the 25th Annual Software Technology Conference in Salt Lake City, Utah, and International Systems Conference in Orlando, Florida.

The eleventh in a series of articles providing basic information on legal issues facing people and businesses that operate in computing-related markets discusses the America Invents Act. The Web extra at http://youtu.be/WUjsIQOabxs is an audio recording of authors Brian M. Gaff, Ralph A. Loren, and Amy M. DeCloux discussing the America Invents Act. [ABSTRACT FROM PUBLISHER]

The article discusses safety issues with modern computer buses. Bus designs can contain failure types including masquerading, when an erroneous node imitates another node's operation; babbling idiot, when a node tries to send messages at incorrect times; slightly-off specification failure, which occurs when an erroneous node produces an output signal slightly outside a specified acceptance window in time or value enabling a select few nodes to correctly receive the signal and the distributed system is then in an inconsistent state; and spatial proximity failure, which occurs when replicated units are in close physical proximity and can overheat. In order to avoid these failures developers need to approach designing buses differently.

The article reports on the new approach towards computer virtualization. Virtualization technology enables a single computer to run multiple operating systems simultaneously, and allows the companies to a single server for multiple tasks. The application of the technology results to the reduction of the number of servers needed, that saves money and other resources. The software products, tools, and services manufactured by several computer companies that enable lightweight virtualization are also discussed.

The article discusses the author's experience related to ideas about women in computer technology. He talks about his lecture to a local business group where a question about the suitability of women for scientific and technical careers was asked. He also discusses his experience of sharing an office with a female coworker in a computer company and describes her experiences concerning women in the computer industry.

The article discusses the reliance on the statement of a computer which is the moral lesson as encountered by Oldhams, a farmer, together with his wife who have purchased mobile phones. Oldhams took advice from a friend but eventually asked if the fairies who have a computerized Amalgamated Account Scheme, could simply supply the services and add the charges to his monthly landline telephone bill. The trouble started when the monthly bill came from the fairies' computer reflected only one of the two credits the Oldhams expected. This lengthy interaction has guided Oldhams being told the missing credit would appear on the next account. This led not to expect so much understanding on the computer to avoid the problems encountered by the Oldhams.