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This work investigates the effect of alternating current partial discharge (AC PD) byproducts on the dielectric frequency response (DFR) of oil-paper insulation comprising of a small cavity, in the frequency range of 1.0 mHz to 1.0 kHz. The investigations were done by utilizing experimental results in combination with a Finite Element Method (FEM) model. The results presented in this paper show that ageing by-products in the cavity (PD stressed volume) alone will not result into the change in DFR of oil-paper insulation. According to simulation results, the significant change in the DFR results is mainly caused by PD by-products (positive and negative charges, and electrons) which tend to conduct or diffuse into the bulk of oil-paper insulation. The change in a dissipation factor curve due to PD by-products was observed to occur mainly in the middle and low frequency regions. The results indicate that the dissipation factor curves in the middle and low frequency regions depend on the level of PD by-products in oil and paper, respectively. [ABSTRACT FROM AUTHOR]

Accumulation of interfacial space charge in oil-paper interface is a critical issue in insulation diagnostics of transformers. This interfacial charge mainly accumulates due to the conductivity difference of oil and paper. Accumulation of interfacial charge leads to localized field enhancement, which further leads to partial discharges and acceleration in the aging of insulation. Therefore, from the point of view of transformer insulation diagnostics, assessment of interfacial charge is very important. However, it is not easy to estimate interfacial space charge behavior from the transformer diagnostics methods currently in use. In case of Polarization-Depolarization Current (PDC) measurement, a well known method for transformer condition monitoring, the effect of interfacial charge is reflected in the non-linearity of current response during polarization and de-polarization. During de-polarization process, a part of the interfacial charge accumulated during polarization period is absorbed by the electrodes producing a current, which is difficult to separate using conventional linear dielectric theory. In this paper, an attempt has been made to separate this current component from de-polarization current through considering charge de-trapping mechanism. Terming this current component as de-trapping current, its relationship with other parameters of transformer insulation is discussed. The developed methodology has been applied on several practical transformers. It was observed that the time constant of de-trapping current is related to the paper conductivity, oil conductivity, dissipation factor and age of the insulation. [ABSTRACT FROM PUBLISHER]

Frequency Domain Spectroscopy (FDS) is proposed as a suitable diagnostic method in this paper for implementation on energized oil-paper insulation systems. In present FDS tests, the measurement method is only designed for offline applications. To overcome the deficiencies with the offline testing, this work investigates the feasibility of performing FDS measurements on energized transformers with the view to developing an online diagnostic tool using neutral connections as injection and measurement paths. In the proposed technique, a low-pass filter system is designed to remove the high frequency noise as well as the power frequency signals present in the measured neutral currents. The technique has been successfully applied in a laboratory environment on transformers with oil-paper insulation systems with different operational ages and is feasible for single-phase as well as 3-phase transformers with the accessible neutral points. Compared with the conventional FDS results, a nonlinear dielectric phenomenon is observed from the energized insulation systems as higher dissipation factor Tan5 values primarily due to the increased losses under power frequency voltage excitation. The degree of the nonlinearity is found to correlate well with the degradation status of insulation systems under test. [ABSTRACT FROM PUBLISHER]

Frequency Domain Spectroscopy is a popular non-invasive method that is widely used for condition assessment of oil-paper insulation in real-life power transformers. Conventional Frequency Domain Spectroscopy is done using sinusoidal excitation over a wide frequency range. In this work, a different approach has been taken to investigate some more possibilities of Frequency Domain Spectroscopy using non-sinusoidal excitation for a better condition assessment of oil-paper insulation. For that, triangular waveshape was chosen as non-sinusoidal excitations whose slope can be changed to vary the harmonic content and amplitudes of constituent components. Samples with preset moisture contents that emulate the oil-paper insulation of real-life transformer have been prepared in the laboratory for the assessment of insulation condition. For a comparative study, both sinusoidal and triangular excitations having same peak as well as time period are applied to the prepared samples under controlled environmental condition and corresponding dielectric response currents are measured. From the applied voltages and corresponding dielectric response currents, dielectric dissipation factors are calculated and compared. It has been observed that use of nonsinusoidal excitation provides better results than sinusoidal excitation in the estimation of paper moisture content. It has also been observed that among the applied non-sinusoidal excitations, a particular waveform provides more accurate information about the paper moisture content. [ABSTRACT FROM AUTHOR]

In order to distinguish the influences of moisture and aging on the frequency domain dielectric response of oil-paper insulation and better apply frequency domain spectroscopy (FDS) to assess the insulation condition of power transformers, the oil-paper insulation samples with different moisture contents and different aging states were prepared in the laboratory. The FDS of the samples were tested and a group of characteristic parameters were extracted from dissipation factor (tan?) curves which could be used to assess the moisture content and aging states of oil-paper insulation respectively. The quantitative relationship among characteristic parameters, degree of polymerization (DP) and moisture contents (Km.c) was accurately established. The observations show that the proposed characteristic parameters are sensitive to the moisture in 10-3-102Hz, while the aging states influence the characteristic parameters in 10-3-10-1Hz. Meanwhile, an exponential relationship equation which could be used to assess the oil-paper insulation condition was established among the characteristic parameters, DP and the moisture content. Finally, the evaluation technique proposed in this paper was used to diagnose the insulation condition of several field transformers in this way, and its validity was preliminary and reasonably verified. [ABSTRACT FROM AUTHOR]

In order to complete the broadband simulation model of power transformer, and establish a systematic and complete model for studying fast transient interaction between transformer and power system, the frequency dependent characteristics of dielectric losses in power transformer were investigated. Several typical insulation structures in power transformers were considered and measuring techniques determined to study the dielectric losses. Frequency dependent dielectric losses in the range of 10-107 Hz were measured by a dielectric spectroscopy analyzer produced by Novocontrol. The characteristics of insulating papers and pressboard measured in the air and after immersing in the mineral oil were compared. Based on the dielectric relaxation theory, the number of dielectric relaxation was determined according to the measured data, and four typical model functions were adopted to fit the data and the consistency of fitting by these functions were compared and physical explanations of fitting parameters were described. Finally, a quantitative description of frequency dependent characteristics of insulation losses was proposed for improving the transformer simulation model. [ABSTRACT FROM PUBLISHER]

The article presents the second of a two-part article, which shows that the dissipation factor decreases, and the electric strength increases, in stages when transformer oils are vacuum dried. These stages correspond to the removal of emulsion water, dissolved water, and physically bound water. Different techniques to measure the water content in oils are discussed along with their sensitivity to the different states of water in the oil. Finally, the authors develop expressions for the water content of the paper insulation and the oil at different temperatures, and they use water content as a diagnostic tool and develop equations for the residual of life transformer insulation.

In a previous paper, we introduced a modified Steinmetz equation to account for dc-bias field effects, which requires only a simple dc permeability measurement to predict total power loss. In this paper, we expanded our investigation to include Finemet nanocrystalline material and found that our modified Steinmetz formalism was effective in predicting dc-bias-related losses for this system as well. In this paper, it was observed that Finemet cores exhibit lower losses than Metglas cores under identical test frequencies and bias fields. In addition, we show that a full characterization of the dc loss component necessitates the consideration of higher order ( $n>1$ ) harmonic components. In order to quantify these higher frequency loss components, a dc–dc converter-based test system was built to intentionally introduce inductor current harmonics by varying the filter capacitance and parasitic inductance of the test system. Both core types were evaluated under fundamental frequencies of 20 to 150 kHz and dc-bias fields of up to 1.3 kA/m, with the inclusion of distorted waveforms obtained by varying filter capacitance. At higher frequencies, the Metglas cores were found to exhibit greater loss fractions associated with the higher order harmonic components. A detailed summary of the measured core loss characteristics for both core types is included and discussed. This paper includes the details of the measurements, the modified Steinmetz relation, and the loss extraction algorithm used for analysis. [ABSTRACT FROM PUBLISHER]

This paper presents two main contributions toward efficient very large scale integration circuits mapped with simple cells: 1) a complete synthesis flow to provide good-quality circuits mapped only with simple cells; and 2) an area-oriented, level-aware buffering algorithm based on inverter trees to fix cell fanout violations. An effective pattern-based algorithm to identify XORs/XNORs on and-inverter graphs is also presented. We show that efficient implementations in terms of inverter count, transistor count, area, power, and delay can be generated from circuits with a reduced number of both simple cells and inverters, combined with XOR/XNOR-based optimizations. The proposed buffering algorithm can handle all unfeasible fanout occurrences, while: 1) optimizing the number of added inverters and 2) assigning cells to the inverter tree based on their level criticality. When comparing with academic and commercial approaches, we are able to simultaneously reduce the average number of inverters, transistors, area, power dissipation, and delay up to 48%, 4%, 8%, 14%, and 16%, respectively. [ABSTRACT FROM AUTHOR]

Active cell balancing is the process of equalizing the State-of-Charge (SoC) of all cells in a series-connected battery pack via charge transfers. While several balancing architectures and equalization strategies exist in the literature, optimization of the circuit components in a balancing architecture has not been sufficiently studied so far. Intuitively, one would select components with low parasitic resistances to minimize the energy dissipation. However, as will be shown in this paper, this might not be an optimal choice in most situations. In this paper, we propose an optimization framework that performs an efficient design space exploration to identify the energy-efficient circuit configuration of a balancing architecture. Moreover, for the first time, we propose a methodology to obtain the optimal operating frequency of an active cell balancing architecture and a control circuit to maintain the operation at the optimal frequency. For this purpose, we derive a closed-form analytical model of the charge transfer process with which we obtain the performance metrics required for our framework. Case studies show that such optimally dimensioned active cell balancing architectures operated at the optimal frequency reduce the energy dissipation by approximately 49% compared to the intuitive approach of selecting components with least parasitic resistances. [ABSTRACT FROM AUTHOR]

The current-limiting inductors (CLIs) are commonly used to suppress DC fault current to safely trip DC circuit breakers in MMC-HVDC systems, but it significantly jeopardizes DC dynamics and causes instantaneous power mismatch between AC and DC sides of islanded rectifier station (RS), exposing MMC internal states to large disturbance. This paper firstly provides a detailed analysis of the influence of CLIs on AC fault, establishes RS mathematical representation including AC side dynamic, and reveals the mechanism of DC voltage oscillation, modulation saturation and PCC waveform distortion. The analysis shows that the AC and DC fault characteristics are decoupled under unsaturated AC modulation, but coupled under excessively low submodule capacitor voltage, where AC modulation is saturated and PCC waveforms are distorted. To solve this issue, a novel RS AC fault ride through method for MMC-HVDC system with CLIs is proposed to stabilize RS DC voltage, desaturate AC modulation and decouple fault characteristics by regulating the zero-sequence modulation of circulating current suppression. In addition, a current reference disturbance and an AC energy dissipation device coordinated control are designed, which adaptively recovers the submodule capacitor voltage. Finally, the feasibility of the proposed method is verified by simulation results. [ABSTRACT FROM AUTHOR]

In this paper, an improved 4H-SiC U-shaped trench-gate metal–oxide–semiconductor field-effect transistors (UMOSFETs) structure with low ON-resistance (${R}_{ \mathrm{\scriptscriptstyle ON}}$) and switching energy loss is proposed. The novel structure features an added n-type region, which reduces ON-resistance of the device significantly while maintaining the breakdown voltage (${V}_{\textsf {BR}}$). In addition, the gate of the improved structure is designed as a p-n junction to reduce the switching energy loss. Simulations by Sentaurus TCAD are carried out to reveal the working mechanism of this improved structure. For the static performance, the ON-resistance and the figure of merit (FOM $= {V}_{\textsf {BR}}^{\textsf {2}}/{R}_{ \mathrm{\scriptscriptstyle ON}}$) of the optimized structure are improved by 40% and 44%, respectively, as compared to a conventional trench MOSFET without the added n-type region and modified gate. For the dynamic performance, the turn-on time (${T}_{ \mathrm{\scriptscriptstyle ON}}$) and turn-off time (${T}_{ \mathrm{\scriptscriptstyle OFF}}$) of the proposed structure are both shorter than that of the conventional structure, bringing a 43% and 30% reduction in turn-on energy loss and total switching energy loss (${E}_{\mathbf {SW}}$). [ABSTRACT FROM AUTHOR]

In this paper, an n-p-n collector incorporated in the back side of a 4H-SiC trench IGBT is presented to reduce the turn-off energy loss. A comparative study between the proposed structure and the conventional structure is conducted through ATLAS. The simulation results have demonstrated that the turn-off energy loss is reduced by more than 82.96% with a slight degradation in the on-state voltage drop. [ABSTRACT FROM PUBLISHER]

When built-in test generation is used for a design that can be partitioned into logic blocks, it is advantageous to identify groups of blocks whose tests have similar characteristics, and use the same built-in test generation logic for the blocks in each group. This paper studies this issue for a built-in test generation method that produces functional broadside tests. Functional broadside tests are important for addressing overtesting of delay faults as well as avoiding excessive power dissipation during test application. The paper discusses the design of the test generation logic for a group of logic blocks, and the selection of the groups. [ABSTRACT FROM PUBLISHER]

Low power and noise tolerant static random access memory (SRAM) cells are in high demand today. This paper presents a stable differential SRAM cell that consumes low power. The proposed cell has similar structure to conventional 6T SRAM cell with the addition of two buffer transistors, one tail transistor and one complementary word line. Due to stacking effect, the proposed cell achieves lower power dissipation. In this paper, impact of process parameters variations on various design metrics of the proposed cell are presented and compared with conventional differential 6T (D6T), transmission gate-based 8T (TG8T), and single ended 8T (SE8T) SRAM cells. Impact of process variation, like threshold voltage and length, on different design metrics of an SRAM cell like, read static noise margin (RSNM), read access time ( T\mathrm{RA} ), and write access time ( T\mathrm{ WA} ) are also presented. The proposed cell achieves 1.12\times /\mathrm 1.\mathrm 43\times /\mathrm 5.\mathrm 62\times improvement in T\mathrm {RA} compared to TG8T/D6T/SE8T at a penalty of 1.1\times /4.88\times in T\mathrm{ WA} compared to D6T/TG8T and 1.19\times /1.18\times in read/write power consumption compared to D6T. An improvement of 1.\mathrm 12\times /\mathrm 2.\mathrm 15\times in RSNM is observed compared to D6T/TG8T. The proposed cell consumes 5.38\times less power during hold mode and also shows 2.33\times narrower spread in hold power @ V\mathrm{ DD = 0.{\mathrm{ 4}}} V compared to D6T SRAM cell. [ABSTRACT FROM AUTHOR]

This paper compares transient responses of virtual oscillator control (VOC) to the conventional droop control method, under various inverter terminal voltage amplitude and frequency regulations. The system of interest is an islanded microgrid of three three-phase inverters sharing a resistive load. By letting the two controllers have similar steady-state droop characteristics, the virtual oscillator and droop controlled systems are compared in a small-signal framework with the aid of eigenvalue analyses. The analytical results are verified by simulating the two systems in MATLAB/Simulink. In the simulations, the third inverter in each system is connected to share the load when the other two inverters are already synchronized. Transients are compared by examining synchronization time after the third inverter is connected. The key finding is VOC outperforms droop control in terms of time responses when the terminal voltage frequency regulation range is allowed to be wide; otherwise, the droop control responds faster than the VOC technique. The same conclusions are found for two other load types: constant power load and nonlinear load. In addition, transient energy losses are investigated, which shows positive correlation with the time response. [ABSTRACT FROM AUTHOR]

By enabling energy redistribution among nodes in Wireless Sensor Networks (WSNs), the Wireless Power Transfer (WPT) technology provides a new approach to prolong life time of WSNs or a fundamental block for building perceptual WSNs. In this paper, we attempt to deal with the underlying WPT based Energy ReDistribution (WPTERD) problem, which is targeted for finding an energy transmission schedule that satisfies the nodes’ energy expectations, meanwhile achieves minimum energy loss and shortest time span. In this paper, we propose a two-step approach for WPTERD by splitting it into two sub-problems named WPTERD-Egy and WPTERD-Time, which focus on the optimization in energy loss and in time span respectively. Basing on some proved properties, we transform WPTERD-Egy to a Linear Programming problem and thus can obtain an optimal time-length list of the nodes’ energy transmissions leading to minimum energy loss. Finding that WPTERD-Time is NP-hard, we propose an approximate algorithm to solve the WPTERD problem by exploiting the concurrent energy transmission opportunities. The algorithm is named as Greedy Energy ReDistribution Scheduling (GERDS) algorithm, which is proved to finish in limited loops. Simulations validate the algorithm's ability in minimizing energy loss, and meanwhile return near-optimal schedules with time span in range $100{\sim }125$ % of the optimal value. Simulation results also show that GERDS outperforms a typical flow-based algorithm in terms of the tested performance metrics. [ABSTRACT FROM AUTHOR]

Efficiency, power quality, and reliability of SiC MOSFET-based voltage-source converters are significantly affected by the dead-time settings. The conventional fixed dead-time setting can induce large output voltage loss and additional energy loss due to the output capacitance of the SiC MOSFETs and the SiC Schottky barrier diodes or the freewheeling of the diodes, which will be more serious under high switching frequencies. This paper analyzes and models the detailed switching process of the SiC MOSFET half-bridge circuit when various dead-time settings are adopted. Based on the models, an optimal asymmetric variable dead-time (OAVDT) setting is proposed, which can avoid the discharging loss of the output capacitance and redundant freewheeling loss of the diode. The OAVDT setting is realized by adjusting the optimal dead-time in real time after the active device is turned off, which does not require any additional hardware circuits. The OAVDT setting can also reduce the output voltage loss to a certain level compared to the fixed dead-time setting. A three-phase two-level SiC MOSFET inverter has been built in the lab to verify the proposed OAVDT setting. Experimental results show a decrease of power loss by 22.5% with reduced output voltage loss compared to the fixed dead-time setting of 0.28 μs when the output power is 8 kW and the switching frequency is 40 kHz. The proposed OAVDT setting shows clear advantages over that of fixed dead-time setting, especially at light load and high switching frequencies. [ABSTRACT FROM AUTHOR]

This paper presents a two-stage small signal intermediate frequency amplifier for high-temperature communication systems. The proposed amplifier is implemented using in-house silicon carbide bipolar technology. Measurements show that the proposed amplifier can operate from room temperature up to 251 °C. At a center frequency of 54.6MHz, the amplifier has a gain of 22 dB at room temperature, which decreases gradually to 16 dB at 251 °C. Throughout the measured temperature range, it achieves an input and output return loss of less than -7and -11 dB, respectively. The amplifier has a 1-dB output compression point of about 1.4 dBm, which remains fairly constant with temperature. Each amplifier stage is biased with a collector current of 10 mA and a base--collector voltage of 3 V. Under the aforementioned biasing, the maximum power dissipation of the amplifier is 221 mW. [ABSTRACT FROM AUTHOR]

This paper discusses fundamental physical mechanisms that are responsible for specific errors of standardized methods of magnetic loss measurements on laminated soft magnetic materials. It is shown that the Poyntings theorem offers an exact distinction between localized loss portions on the one hand and total losses on the other hand. Further, a clear distinction is suggested between mechanisms of hysteresis and eddy currents. The correct applicability of experimental measurements proves to be restricted to cases where the Poynting vector is restricted to normal off-plane components. This represents the only case where total losses can be determined on the basis of surface field and cross-sectional averaged induction. As a consequence, physically “correct” loss measurements are to be restricted to sample regions that exhibit mere axial magnetization, in exact ways. This is attainable with a single sheet tester, the homogeneously magnetized region of which is equipped with an induction coil and a large-area tangential field coil, in consistent ways. [ABSTRACT FROM AUTHOR]

The misalignment problem is a major challenge in dynamic wireless power transfer systems with a segmented transmitter (Tx) array. Tx coils farther away from receiver (Rx) experience higher currents as compared to Tx coils nearer to Rx coil leading to higher losses and lower performances. This paper reports theoretical optimum current distribution among Tx coils for any Rx position. A current amplitude modulation scheme is analyzed with the analogy of N-Cartesian coordinate equivalent of spherical coordinates. Efficiency and transferred power are evaluated for the proposed current distribution, and further optimization is performed with respect to load resistance, operating frequency, and the number of simultaneously powered Tx coils. The maximum performances that can be obtained with the optimized design conditions have been derived as well. The analysis is validated using numerical and experimental results. [ABSTRACT FROM AUTHOR]

In this paper, a rigorous methodology for extracting the thermal compact model parameters of packaged chips is presented. The methodology is based on using a custom-designed test chip with multiple heating and temperature sensing elements in order to predict the temperature distribution in packaged chips after packaging. The technique involves measurement of various chips with different thicknesses, different packages, and for different power dissipation scenarios through which the thermal model parameters can be extracted. The results show that ultrathin chips with a total thickness below 20~\mu \textm experience a dramatically increased temperature for localized heat dissipation. In addition to this, the measurements conducted in time domain and frequency domain show that at high enough frequencies of heat pulsing, the temperature variations become independent of the thermal boundary conditions of the chip. The measurement results are compared to the finite-element method simulation data. The simulations together with the measurement methodology serve as a technique to extract the thermal compact model parameters of packaged chips after being fabricated and packaged in an accurate and efficient way. [ABSTRACT FROM AUTHOR]

This paper presents a fully integrated digital low-dropout (LDO) voltage regulator based on event-driven control architecture. The focus of the paper is to scale the off-chip output capacitor of an LDO conventionally used to compensate fast load current change. To shrink the output capacitor size, it is paramount to shorten control latency. This can be done by employing a high-speed error amplifier in analog LDO designs and by using fast clock in digital synchronous LDO designs. However, those approaches become less suitable for sub-1-V supply voltage due to the headroom problem of analog circuits and/or increase power dissipation due to the high-frequency clock. In this paper, we tackle the tradeoff between power consumption and control latency by introducing an event-driven approach. Our event-driven approach enables to perform regulation tasks only when the output voltage deviates significantly from a set point, simultaneously achieving short latency and low-power dissipation. We prototyped an event-driven digital LDO that supports 400- \mu \textA load current at 0.5-V input and 0.45-V output voltage. The measurements show 40-mV droop voltage and 96.3% peak current efficiency with an on-chip integrated 0.4-nF output capacitor. [ABSTRACT FROM AUTHOR]

This paper presents an adaptive encoding framework for the reduction of transition activity in high-capacitance off-chip data buses, since power dissipation associated with those buses can be significant for high-speed communication. The technique relies on the observation of data characteristics over fixed window sizes and formation of cluster with bit lines having highly correlated switching patterns. The proposed method utilizes redundancy in space and time to prevent loss of information while retrieving data. We present analytical and experimental analyses, which demonstrate the activity reduction of our encoding scheme for various data. The extra power cost due to the encoder and decoder circuitry along with redundancy is offset due to reduced number of off-chip transitions. [ABSTRACT FROM AUTHOR]

This paper addresses the coexistence problem among multiple wireless body area networks (WBANs), where co-channel interference may occur among different WBANs if the channels are not allocated properly, leading to performance degradation in both energy efficiency and packet transmission reliability. We formulate the channel allocation problem as a graph coloring problem, and develop a solution to increase the co-channel reuse and the number of WBANs with assigned channels. We propose a distributed two-hop incomplete coloring (DTIC) algorithm that adopts a game-theoretic approach to solve the graph coloring problem. The DTIC algorithm exploits two-hop information to enable high channel reuse among two-hop neighbors and allows for incomplete coloring when the number of colors (or channels) is insufficient to color all vertices without conflict. A distributed message-passing protocol is also proposed to achieve collision-free message exchange, and to ensure that consistent coloring information is shared among WBANs. Simulation results show that our proposed algorithm achieves better co-channel reuse and higher throughput than existing methods. [ABSTRACT FROM AUTHOR]

VSC-HVDC technology has great application prospects in the field of offshore wind system. In order to realize the capability of fault ride through of offshore wind VSC-HVDC system, this paper proposes a modular multilevel converter with integrated energy dissipation equipment (IEDE-MMC), which combines the complementary advantages of MMC and DC chopper. The working process of the short-time pulse of the energy dissipation equipment provides an opportunity for the use of low current switch devices, and it shares the water-cooling system, control-protection system and energy-supply system with the MMC submodule, which eliminates the independent systems required by the traditional DC chopper, providing an economic and reliable solution for the problem of fault ride through. The simulation results of 400 MW/±150 kV VSC-HVDC system verify the fault ride through capability of IEDE-MMC, and the peak value of DC voltage is less than 1.1 p.u., which meets the requirements of the system. Finally, the manufacturing cost and floor area of IEDE-MMC are analyzed. Compared with the scheme of adding DC chopper outside MMC, the IEDE-MMC cost is reduced by 22%, and the total floor area is reduced by 35%. [ABSTRACT FROM AUTHOR]

Modeling of dielectric relaxation function ϕ(t) by a distribution of exponential decay functions is advantageous due to its monotonically decreasing property which ensures that ϕ(t) is integrable over any period of time. Several equivalent circuits based on simple combination of energy storing and dissipating elements are available in literature which are capable of modeling ϕ(t). One of the widely used two-parameter equivalent circuit for dielectric response modeling of various polymeric dielectric as well as oil-paper insulation is the Maxwell ladder structure. In this paper it is shown that for more accurate modeling and better understanding of the dielectric response of complex insulation system like oil-paper insulation of high voltage equipments operating under temperature gradient, modification of Maxwell model is necessary. The proposed model, similar to the classic Maxwell circuit, is also composed of a number of parallel branches, but unlike the former, the proposed model considers each of the parallel branches to be composed of not just one but a number of exponential functions. [ABSTRACT FROM PUBLISHER]

DMOS transistors are often subject to high power dissipation and thus substantial self-heating. This limits their safe operating area because very high device temperatures can lead to thermal runaway and subsequent destruction. Because the peak temperature usually occurs only in a small region in the device, it is possible to redistribute part of the dissipated power from the hot region to the cooler device areas. In this way, the peak temperature is reduced, whereas the total power dissipation is still the same. Assuming that a certain temperature must not be exceeded for safe operation, the improved device is now capable of withstanding higher amounts of energy with an unchanged device area. This paper presents two simple methods to redistribute the power dissipation density and thus lower the peak device temperature. The presented methods only require layout changes. They can easily be applied to modern power technologies without the need of process modifications. Both methods are implemented in test structures and investigated by simulations and measurements. [ABSTRACT FROM AUTHOR]

The processes of electrical charge accumulation and dissipation in dielectric materials are critical to spacecraft construction and operational anomaly resolution. Electrical conductivity, and therefore surface potential, of radiation-damaged materials undergoes unpredicted changes while on orbit. The space environment causes fundamental modifications in the chemical structure of spacecraft materials by breaking intermolecular bonds and creating free radicals that act as space charge traps. Over time, free radicals react with each other and the material recovers. The rates of free radical formation and loss determine the dynamics of the conductivity of spacecraft materials. Lack of knowledge about dynamic aging is a major impediment to accurate modeling of spacecraft behavior over its mission life. This paper presents an investigation of the chemical and physical properties of polyimide (PI) films during and after irradiation with high-energy (90 keV) electrons. The constant voltage method was utilized to monitor material conductivity during the recovery process. To quantify the concentration of free radicals within the irradiated material, the electron paramagnetic resonance technique was used. Changes in the infrared (IR) absorption profile of irradiated materials during the recovery process were identified using the directional-hemispherical reflectance technique coupled with the Fourier transform IR spectroscopy. This physical/chemical collaboration allowed correlation of chemical changes in PI with the dynamic nature of spacecraft material aging. [ABSTRACT FROM PUBLISHER]

Part I of this paper discussed the design of a four-terminal skewed straintronic magnetotunneling junction (ss-MTJ) switch, and its adaptation to a non-Boolean “one transistor, one trench capacitor, and one ss-MTJ” ternary content-addressable memory (TCAM) cell. This part of the paper discusses a TCAM array based on ss-MTJ-TCAM cells and the associated peripherals for search operation. We show that non-Boolean associative processing of the ss-MTJ-TCAM cells enhances energy-efficiency and performance of an ss-MTJ-based TCAM array. The energy-delay-product (EDP) of ss-MTJ-based TCAM is compared against CMOS-based TCAM for a $144\times256$ array. The minimum EDP in ss-MTJ-based TCAM is $\sim 10.8\times $ lower than the minimum EDP in CMOS-based TCAM. Additionally, the operational frequency at which the ss-MTJ-based design shows the minimum EDP is $\sim 9.4\times $ higher than the respective frequency in the CMOS-based design. We also compare ss-MTJ-based TCAM against other state-of-the-art MTJ-based TCAMs. The comparison shows that the ss-MTJ-based TCAM also outperforms MTJ-based TCAMs in cell density, search delay, and search energy. Finally, we discuss implications of process variability in ss-MTJ to TCAM implementation and identify critical design parameters in ss-MTJ-based TCAM to enhance its robustness and area/ energy-efficiency. [ABSTRACT FROM PUBLISHER]

This paper investigates the reduction of dynamic power for streaming applications yielded by asynchronous dataflow designs by using clock gating techniques. Streaming applications constitute a very broad class of computing algorithms in areas such as signal processing, digital media coding, cryptography, video analytics, network routing, packet processing, etc. This paper introduces a set of techniques that, considering the dynamic streaming behavior of algorithms, can achieve power savings by selectively switching off parts of the circuits when they are temporarily inactive. The techniques being independent from the semantic of the application can be applied to any application and can be integrated into the synthesis stage of a high-level dataflow design flow. Experimental results of at-size applications synthesized on field-programmable gate arrays platforms demonstrate power reductions achievable with no loss in data throughput. [ABSTRACT FROM PUBLISHER]

The ever increasing need to extend battery life in IoT devices, self-powered sensors, and autonomous nodes highlights the need to reduce energy consumption as much as possible. One of the main issues still not fully addressed is the reduction of power consumption of sensors and measurement systems in standby mode, which represents a significant amount of the total power dissipation. In fact, nowadays, despite the continuous efforts, standby power is still far from being negligible. This paper exploits a new approach named “zero-current standby” to tackle this issue; moreover, due to the fact that the transducer implements kinetic-to-electrical energy conversion, a sensor that performs kinetic energy measurements is obtained and characterized. The proposed solution goes beyond the concept of the standby state itself, as it can actually be applied to appliances turned OFF. The design of a piezoelectric-based sensor able to measure kinetic energy is discussed in this paper. The proposed device will also allow zero-energy standby operation, with vibrations acting as trigger for sensor activation and data transmission via Wi-Fi. Numerical analysis, laboratory characterization, and experimental results of a complete working prototype are presented here, demonstrating both the suitability of the approach proposed and the improvement with respect to conventional strategies. [ABSTRACT FROM AUTHOR]

This paper presents a design approach for improving energy-efficiency and throughput of parallel architectures in near- and subthreshold voltage circuits. The focus is to suppress leakage energy dissipation of the idle portions of circuits during active modes, which can allow us to wholly transform the throughput improvement from parallel architectures into energy savings via deep voltage scaling. We begin by investigating the efficacy of parallel and pipeline architectures in the near- and subthreshold circuits. The investigation reveals that active energy dissipation largely undermines the ability of deep voltage scaling to transform excessive throughput into energy savings. Techniques, such as power-gating switches (PGSs), can mitigate active-leakage power dissipation; however, the overhead for entering and exiting sleep modes can offset the energy savings provided by sleep mode, particularly if sleep time is fine grained for suppressing active leakage. Therefore, in this paper, we propose a PGS design technique, inspired by the so-called zigzag supercutoff CMOS, in order to optimize the overheads of mode transitions of PGS in near- and subthreshold circuits. The proposed technique enables to have circuits in sleep mode for as short as a single clock cycle with a negligible amount of energy and delay overheads. We apply our proposed design to parallel multiplier-based test circuits operating at near- and subthreshold voltages. Simulations show a significant improvement in energy-efficiency over baselines at the same throughput. [ABSTRACT FROM AUTHOR]

This paper describes a reliability study that has been performed at Hydro One to compare the reliability of two deterministic criteria used in the planning of high voltage auto-transformer stations. One criterion calls for designing the station to withstand the loss of one unit transformer (single contingency criterion) while the other calls for designing it to withstand the loss of two units (double contingency criterion). Two system reliability measures are used in the comparison namely the system availability index and the loss of energy index. The study proposed a number of Markov models to evaluate the probability of system failures under each criterion. Examples are provided to illustrate these models and see how the two deterministic planning criteria are compared from the reliability point of view. [ABSTRACT FROM AUTHOR]

This paper investigates the comparative design optimizations of a five-phase outer-rotor flux-switching permanent magnet (FSPM) machine for in-wheel traction applications. To improve the comprehensive performance of the motor, two kinds of large-scale design optimizations under different operating conditions are performed and compared, including the traditional optimization performed at the rated operating point and the optimization targeting the whole driving cycles. Three driving cycles are taken into account, namely, the urban dynamometer driving schedule (UDDS), the highway fuel economy driving schedule (HWFET), and the combined UDDS/HWFET, representing the city, highway, and combined city/highway driving, respectively. Meanwhile, the computationally efficient finite-element analysis (CE-FEA) method, the cyclic representative operating points extraction technique, as well as the response surface methodology (in order to minimize the number of experiments when establishing the inverse machine model), are presented to reduce the computational effort and cost. From the results and discussion, it will be found that the optimization results against different operating conditions exhibit distinct characteristics in terms of geometry, efficiency, and energy loss distributions. For the traditional optimization performed at the rated operating point, the optimal design tends to reduce copper losses but suffer from high core losses; for UDDS, the optimal design tends to minimize both copper losses and PM eddy-current losses in the low-speed region; for HWFET, the optimal design tends to minimize core losses in the high-speed region; for the combined UDDS/HWFET, the optimal design tends to balance/compromise the loss components in both the low-speed and high-speed regions. Furthermore, the advantages of the adopted optimization methodologies versus the traditional procedure are highlighted. [ABSTRACT FROM AUTHOR]

Phase imbalance in the U.K. and European low-voltage (415 V, LV) distribution networks causes additional energy losses. A key barrier against understanding the imbalance-induced energy losses is the absence of high-resolution time-series data for LV networks. It remains a challenge to estimate imbalance-induced energy losses in LV networks that only have the yearly average currents of the three phases. To address this insufficient data challenge, this paper proposes a new customized statistical approach, named as the clustering, classification, and range estimation (CCRE) approach. It finds a match between the network with only the yearly average phase currents (the data-scarce network) and a cluster of networks with time series of phase current data (data-rich networks). Then, CCRE performs a range estimation of the imbalance-induced energy loss for the cluster of data-rich networks that resemble the data-scarce network. Chebyshev's inequality is applied to narrow down this range, which represents the confidence interval of the imbalance-induced energy loss for the data-scarce network. Case studies reveal that, given such a few data from the data-scarce networks, more than 80% of these networks are classified to the correct clusters and the confidence of the imbalance-induced energy loss estimation is 89%. [ABSTRACT FROM AUTHOR]

This paper considers the problem of simultaneous information and energy transmission, where the energy harvesting function is only known experimentally at sample points, e.g., due to nonlinearities and parameter uncertainties in harvesting circuits. We investigate the performance loss due to this partial knowledge of the harvesting function in terms of transmitted energy and information. In particular, we assume that the harvesting function is a subclass of the Sobolev space and consider two cases, where the experimental samples are either taken noiselessly or in the presence of noise. Using constructive function approximation and regression methods for noiseless and noisy samples, respectively, we show that the worst loss in energy transmission vanishes asymptotically as the number of samples increase. Similarly, the loss in information rate vanishes in the interior of the energy domain; however, it does not always vanish at maximal energy. We further show that the same principle applies in multicast settings, such as medium access in the Wi-Fi protocol. We also consider the end-to-end source–channel communication problem under source distortion constraint and channel energy requirement, where both distortion and harvesting functions are known only at samples. [ABSTRACT FROM AUTHOR]

Recent studies have proved that sustainable saturation operation of Ferrite Power Inductors (FPIs) allows reducing the inductor size and increasing the power density in Switch-Mode Power Supply (SMPS) applications. This paper discusses a new behavioral model for reliable prediction of ac power loss in FPIs, including the effects of saturation. The new model has been identified by means of the Genetic Programming (GP) algorithm combined with a Multi-Objective Optimization (MOO) technique, starting from large sets of power loss experimental measurements. The proposed ac power loss model uses as input variables the voltage and switching frequency imposed to the inductor by the SMPS operation, while the dc inductor current is used as a parameter expressing the impact of saturation. Such quantities can be easily determined for whatever converter topology and in real-world switching operation, thus confirming the readiness and the easiness-to-use of the proposed behavioral model. The results of experimental tests presented in this paper prove the reliability of the power loss predictions, also by correctly accounting for the impact of inductors saturation. [ABSTRACT FROM AUTHOR]

This paper investigates the impact of the combined effects of load variability and phase imbalance onto simulated low-voltage grid losses. The paper proposes new indices for relative load time-variability and phase-imbalance. With those indices, linear mappings are derived for the relative losses caused by a single three-phase load when modeled as a random variable that is per-phase identical and independently distributed. Impacts of increasingly complex load modeling are then obtained by simulation and used to gain insight into loss estimation errors caused by simplified representations of time-variability and phase-imbalance. Based on the linear mappings and on the simulation results obtained under realistic grid loading, limitations of present day meter resolution are discussed. [ABSTRACT FROM AUTHOR]

This paper proposes a methodology to determine the optimal capacity of renewable distributed generation (RDG). The objective in this paper is to maximize cost-savings of energy not supplied (ENS) as well as cost-savings of energy loss according to RDG installation in a distribution network. Additionally, in order to achieve this multi-objective optimization problem, both a restoration matrix and restoration availability are newly proposed. In this case study, a practical Korea Electric Power Corporation (KEPCO) system is presented and discussed, demonstrating the performance and effectiveness of the proposed methods. [ABSTRACT FROM PUBLISHER]

The numerical results detailed in this paper reflect on a method proposed to accurately appraise the energy and the demand component of the cost of losses for evaluating the total ownership cost of power transformers. Specifically, the proposed method is evaluated on a small-scale real system, by incorporating realistic financial data and system characteristics through appropriate technoeconomic models as well as statistical evaluations. The calculated loss components of this paper are compared to the methodology detailed in IEEE C.57.120-1991. [ABSTRACT FROM PUBLISHER]

Spintronic devices have been spotlighted due to their nonvolatility and potential for low-voltage operation. However, their potential performance and energy efficiency require greater scrutiny. In this paper, a circuit-level energy-performance analysis is used to derive the design requirements for a spintronic magnetic tunnel junction logic device, mLogic, for pipelined logic applications. An analytical equation for the domain wall mobility of mLogic is derived to predict the performance of future designs and used to point to key directions for further device improvement. We show that the energy dissipation of a logic pipeline under delay constraints is a convex function of the write/read-path resistance ratio and the supply voltage. Scaling the supply voltage can reduce the energy dissipation at the expense of switching speed, but is limited by an extrinsic pinning effect and thermal noise. The energy reduction by maximizing the tunnel magnetoresistance (TMR) will be saturated for TMR larger than 100. But maximizing TMR can mitigate the thermal noise limit of scaling the supply voltage. The energy gap between MOSFETs and mLogic gets smaller for more advanced technology nodes. With 32-nm technology, a future mLogic design can be more optimal than MOSFETs in low-power and low-performance applications, such as emerging Internet-of-Things devices. [ABSTRACT FROM AUTHOR]

In practical wireless sensor networks (WSNs), the main mechanism for link-level data exchange is through handshaking. To maximize the network lifetime, the transmission power levels for both data and acknowledgement (ACK) packets should be selected optimally. If the highest transmission power level is selected then the handshake failure is minimized, however, minimizing handshake failure does not necessarily result in the maximized lifetime due to the fact that for some links selection of the maximum transmission power may not be necessary. In this paper, we investigate the impact of optimal transmission power assignment for data and ACK packets on network lifetime in WSNs. We built a novel family of mathematical programming formulations to accurately model the energy dissipation in WSNs under practical assumptions by considering a wide range of energy dissipation mechanisms. We also investigate the validity of a commonly made assumption in wireless communication and networking research: lossless feedback channel (i.e., ACK packets never fail). Our results show that the global optimal assignment of data and ACK packets can be replaced with link scope power level assignment strategies without any significant deterioration of network lifetime. The assumption that ACK packets do not fail is shown to be misleading. [ABSTRACT FROM PUBLISHER]

This paper proposes an efficient and robust design of content addressable memory (CAM) system. Design metrics, such as search time, power dissipation, power-delay product (PDP), and energy-delay product (EDP), of the proposed design are compared with those of previously reported CAM cell found in the literature. CAM cell presented in this paper offers $2.589\times $ improvement in search time, $2.725\times $ improvement in PDP, and $2.729\times $ improvement in EDP for mismatch 1 at 700 mV. It exhibits $2.257\times $ improvement in search time, $2.38\times $ improvement in PDP, and $2.389\times $ improvement in EDP for mismatch 0 at 700 mV. The proposed CAM cell also proves its efficiency in terms of power consumption, which is one of the most concerned design issues. It offers $1.0526\times $ improvement in power consumption for mismatch 1 and $1.054\times $ improvement in power consumption for mismatch 0. The proposed CAM cell is also analyzed to investigate the impact of tunneling magnetoresistance variations on power consumption, PDP, EDP, search time, and search-time variability. In addition, this paper also proposes an efficient match line sensing scheme for the proposed CAM cell. [ABSTRACT FROM PUBLISHER]

In this paper, an unconditionally stable finite-difference time-domain (US-FDTD) model is proposed for the crosstalk noise analysis of coupled very large scale integration interconnects. The accuracy of the proposed model is validated against the conventional FDTD model and HSPICE. It is observed that the proposed model is as accurate as the conventional FDTD and HSPICE. It is also observed that the stability of the proposed model is not constrained by the Courant–Friedrichs–Lewy stability condition. Depending on the time-step size, the proposed model can be up to $100\times $ faster than the conventional FDTD. [ABSTRACT FROM AUTHOR]

This paper proposes a DC Circuit Breaker (DCCB) topology for the DC fault clearance of the Modular Multilevel Converter based High Voltage Direct Current (MMC-HVDC) grid. By utilizing the voltage clamping and current limiting functions of the pre-charged capacitors in the DCCB, the DC-side short-circuit fault is isolated. First, the topological mechanism and operational principle of the unidirectional topology are analyzed, and the bidirectional topology is provided for backup protection. Then, the residual energy dissipation branch of the DC transmission line is introduced and the reclosing strategy after the deionization process is provided. Further, a step-insert method of the clamping branch is designed to relieve the sudden change of the electrical stresses during the voltage clamping based fault clearance process. Compared to the conventional DCCB schemes, the main advantage of the proposed topology is the decoupling of fast fault isolation and slow energy dissipation processes, which will accelerate the power recovery speed of the healthy parts of the HVDC grid. The proposed approaches are verified first by fully detailed Electro-Magnetic Transient (EMT) simulations on PSCAD/EMTDC then by a down-scaled hardware experiment. [ABSTRACT FROM AUTHOR]

This paper proposes a comprehensive framework to detect non-technical losses (NTLs) and recover electrical energy (lost by abnormalities or fraud) by means of a data mining analysis, in the Spanish Power Electric Industry. It is divided into four section: data selection, data preprocessing, descriptive, and predictive data mining. The authors insist on the importance of the knowledge of the particular characteristics of the Power Company customer: the main features available in databases are described. The paper presents two innovative statistical estimators to attach importance to variability and trend analysis of electric consumption and offers a predictive model, based on the Generalized Rule Induction (GRI) model. This predictive analysis discovers association rules in the data and it is supplemented by a binary Quest tree classification method. The quality of this framework is illustrated by a case study considering a real database, supplied by Endesa Company. [ABSTRACT FROM PUBLISHER]