Search

Conventional Schottky diodes have a switching limit of ideality factor larger than unity due to the thermionic emission. In this work, cold source diodes (CSDs) using cold metals of monolayer 2H phase MX2(M = Nb, Ta; X = S, Se) as the injection source are proposed and investigated by first-principles quantum transport simulations. Different from the conventional Schottky diode, CSDs can break the ideality factor limit of unity and reach steep switching. Cold metals such as 2H MX2are metallic but have energy gaps around the Fermi level. Therefore, high-energy electrons can be effectively filtered and the leakage current is suppressed at off-state. It is shown that the ideality factor of CSDs can be smaller than 1 over eight decades with a minimum of 0.17. At the same time, giant negative differential resistance is realized in CSDs and the peak-to-valley ratio (PVR) can be over 106with a peak current over 100 $\mu \text{A}/\mu \text{m}$. [ABSTRACT FROM AUTHOR]

Transition metal carbide/nitride (MXenes) have attracted widespread attention in recent years due to their unique structure and excellent electrochemical performance. In addition, MXene materials have adjustable interlayer spacing as well as rich functional groups on the bonding end, which provides great potential to enhance the performance of energy devices. However, three-atoms V2C-based MXene was rarely investigated for memristors and its effects on devices are still unknown. In this work, we synthesized V2C MXene and fabricated Ag/V2C/TiO2/W structural memristors. The advantages of V2C on memristors were explored including the coexistence of volatile threshold switching (TS) and non-volatile memory switching (MS) behaviors, low Set and Reset voltages, and small cycle-to-cycle and device-to-device variations. Moreover, the space charge limited current (SCLC) model is the dominant switching mechanism. Additionally, two types of synaptic plasticity, i.e., long-term potentiation/depression (LTP/LTD), have been achieved by continuous pulse stimulations. These results in this study are of great significance for disclosing the possibilities of low power electronic synapses with V2C. [ABSTRACT FROM AUTHOR]

A high-K/metal gate (HKMG)-stack (TiN/Al-doped-HfOx/SiO2/Si)-based bipolar resistive random access memory (RRAM) cell is proposed and fabricated by 28/20-nm HKMG CMOS compatible technology. Robust reliability behaviors (retention at 200~ ^\circ \text C > 4 \times 10^4 s and endurance $> 10^{{{5^{\vphantom {\frac {}{,}}}}}} cycles) and ultralow switching current ( <0.1\mu \textA for RESET and <0.3\mu \textA for SET) are both demonstrated. The sub- \mu \textA switching current and self-selection nonlinear $I$ – V$ characteristics are attributed to the SiO2 interfacial layer rather than the decrease of conductive filament size and oxygen vacancy ( V_{O} ) density, which can be verified by HRTEM and measured conduction behavior. Therefore, robust reliability property is also achieved. The demonstrated excellent memory characteristics of HKMG stacked RRAM cell enable constituting 1-Mb workable crosspoint array even though the feature size scales down to 10 nm according to the HSPICE simulation. [ABSTRACT FROM AUTHOR]

A comprehensive physical model on the resistive switching (RS) behaviors of bilayered TaOx-based RS access memory [resistive random access memory (RRAM)] is presented. In the model, the effects of the generation and recombination (G-R) of oxygen vacancies ( $V_{{\rm{O}}}$ ), phase transition (P-T) between Ta2O5 and TaO2, and the interaction (I-A) between Ta2O5 and TaOx layers are involved to explain the RS behaviors based on ab initio calculations. An atomistic Monte Carlo simulation method based on the model is developed to investigate the dynamic physical processes and reproduce the experimental phenomena. The impacts of G-R and P-T as well as the I-A effects on the RS behaviors of a bilayered Ta2O5/TaOx structure and the device performances are identified. This paper indicates that the G-R effect dominates the RS behaviors, and self-compliance is due to the I-A effect. Based on the simulations, the optimization guidance of a bilayered TaOx-based RRAM is presented. [ABSTRACT FROM AUTHOR]

For the first time, nonvolatile logic, memory, and communication are experimentally demonstrated all within a crossbar resistive random access memory (RRAM) array through the state interaction among RRAM cells. With all the array cells initialized to high resistance states, OR and NOT logic are measured as a proof of functional completeness for computation, with input and output data directly stored in the array. Following the same computation paradigm, in situ data transfer within the crossbar RRAM array is realized. The cell-to-cell communication is proved efficient by the measured resistance evolution of a row of RRAM cells during consecutive data transfer. Reliability characteristics, including endurance, retention, and disturbance are scrutinized for the robust computing systems. [ABSTRACT FROM PUBLISHER]

In this paper, the ac electrical characteristics of metal oxide-based resistive random access memory are investigated based on a developed compact model and the experiment. The voltage–time dilemma phenomenon and the impacts of critical factors on resistive switching speed are addressed. Based on predictions of the model, the small parasitic capacitance, low target high resistance, and large thermal resistance are beneficial to accelerate the resistive switching speed both in SET and RESET processes. The high SET speed and low SET voltage can be achieved by tuning the activation energy of oxygen vacancies. While for the RESET process, the barriers of the release of oxygen ions from electrode and the hopping in resistive switching layer should be turned down simultaneously for high switching speed and low operation voltage. [ABSTRACT FROM PUBLISHER]

A comprehensive array operation scheme for a multilayer stacked 3-D vertical resistive random access memory (RRAM) cross-point array architecture is developed. Based on the proposed READ/WRITE scheme, each memory cell in the 3-D array can be randomly accessed. The fabricated AlO\oldstyle{y}/HfO\oldstyle{x} -based bilayer vertical RRAM array with excellent device-to-device and layer-to-layer uniformity is applied to demonstrate the feasibility of the proposed operation scheme. [ABSTRACT FROM PUBLISHER]

A novel strategy based on defect engineering is proposed for high-performance multibit data storage in oxide-based resistive random access memory (RRAM). Key innovations are: 1) material-oriented cell engineering for desired modification of physical locations of generated oxygen vacancies in resistive switching layer; and 2) operation scheme to control the amount of oxygen vacancy generated in the conducting filament regions during switching. Proper doping approach is applied to suppress the formation of oxygen vacancy clusters due to the avalanching effect in the forming and set processes. Gradual resistive switching process is observed in the devices with proper doping at the proper switching operation modes. Multilevels of resistance states are measured by the optimized dc or ac switching mode. Excellent memory performance with four-level data storage (good resistance uniformity under pulse switching, retention > \10^4 s at 150 ^\circ \C, and endurance > \10^6 cycles) is successfully demonstrated in hafnium oxide-based RRAM devices, indicating the viability of the proposed engineering design strategy. The proposed methodology helps to understand the mechanism of multilevel switching and provides guidelines for the design of high-performance multibit resistive switching memory devices. [ABSTRACT FROM PUBLISHER]

The resistive random access memory (RRAM) crossbar array has been extensively studied as one of the most promising candidates for future high-density nonvolatile memory technology. However, some problems caused by circuit and device interaction, such as sneak leakage paths, result in limited array size and large power consumption, which degrade the array performance significantly. Thus, the analysis on circuit and device interaction issue is imperative. In this paper, a simulation method is developed to investigate the critical issues correlated with the interaction between devices and the circuit. The simulations show that a large off/on ratio of resistance states of RRAM is beneficial for large readout margin (i.e., array size). The existence of the selector connected in series with an RRAM device can eliminate the need for high Ron resistance, which is critical for the array consisted of only RRAM cells. The readout margin is more sensitive to the variation of Ron and is determined by the nonlinearity of the I–V characteristics of RRAM, whereas the nonlinear characteristics of the selector device are beneficial for a larger readout margin. An optimal design scheme for turn-on voltage and conductance of the selector is proposed based on the simulation. [ABSTRACT FROM PUBLISHER]

A physical-based simplified model is presented to quantify the resistive switching behavior of oxide-based resistive random access memory (RRAM). In this model, the analytical expressions of the RESET time of RRAM devices and the correlated resistance in high-resistance states (RHRS) are presented and experimentally verified. Based on the extracted physical-based model parameters from measured data, the resistive switching characteristics of oxide-based RRAM devices can be evaluated. [ABSTRACT FROM AUTHOR]

The retention failure of bipolar oxide-based resistive switching memory is investigated. A new physical model is proposed to elucidate the typical retention failure behavior of the oxide-based resistive switching memory with a sudden resistance transition, which is quite different from that of the traditional memories. In the new proposed model, the temperature- and bias-dependent failure probability and failure time of the devices can be quantified. A temperature- and voltage-acceleration method is developed to evaluate the retention of resistive switching memories. [ABSTRACT FROM PUBLISHER]