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An optimized configuration of bidirectional Z-source circuit breaker using a coupled inductor is introduced for the fault isolation in low-voltage dc microgrid. The proposed circuit breaker is designed to operate with a single coupled inductor for bidirectional power flow. Use of the single coupled inductor for the power flow in both the directions reduces the component count. In this article, the operating principle of the breaker is explained for a short-circuit fault condition and breaker design criteria are derived. The performance of the circuit breaker is evaluated by carrying out a MATLAB simulation study. The functional prototype is developed to validate the breaker capabilities. Experimental results show that the fault is cleared within few microseconds. Additionally, the breaker is tested under the step load change condition for a current five times the steady-state rated current of the breaker and results are satisfactory. [ABSTRACT FROM AUTHOR]

This paper discusses the analysis and experimental validation of bidirectional Z-source breaker and bidirectional Z-source breaker using coupled inductor for low-voltage dc microgrid application. The proposed topologies use an SCR as a switch to isolate the fault from the system, and LC network to generate required commutation conditions for the SCR under fault conditions. Thus, both topologies are able to isolate the fault naturally within a few microseconds without any fault detection and sensing circuit. In this paper, the breaker operating principle is discussed during fault condition and breaker design criteria are derived. When the breaker is connected in series with power electronic converter, Z-source components offer filtering characteristic. The filtering characteristic offered by the breaker components is analyzed. Functional prototypes are developed for both configurations to validate the breaker performance and experimental results are presented. [ABSTRACT FROM AUTHOR]

A single-stage, bidirectional, current-source converter (CSC) topology to interface a dc microgrid with an ac grid is reported in the literature. In this topology, under a balanced grid voltage condition, the dc-link inductor current can be regulated over a wide range—from zero to rated value—while the ac-side current has low harmonic distortion. However, unbalanced grid voltages result in second-harmonic pulsation in the current and power on the dc side of the converter. In addition, the ac-side currents will be unbalanced due to the presence of a negative-sequence component. This would result in undesired tripping of the converter if one of the phase currents exceeded its rated value. Various control loop structures for the operation of voltage-source converter under unbalanced grid voltage conditions are reported in the literature. However, use of similar control loop structures for CSC may lead to unstable operation. Therefore, a control scheme to inject balanced three-phase currents into the ac grid under an unbalanced grid voltage condition is proposed in this paper. The stability of the proposed control scheme is studied using a small-signal model of the converter. Performance of the proposed control scheme is studied using MATLAB/Simulink and is experimentally validated. [ABSTRACT FROM AUTHOR]

A paralleled multilevel inverter topology consists of n three-phase three-level current-fed inverters (CFIs) connected in parallel on ac side. AC currents with (2n+1) levels can be generated utilizing redundant switching states when all three-level inverters have equal dc-link currents. However, the multilevel space vector diagram gets modified, redundancy in the switching states is lost and the multilevel current pattern changes when the dc-link current of all inverters is not the same. This introduces low-frequency harmonics in output current, thereby deteriorating total harmonic distortion (THD). The presence of low-frequency components in the output current could be avoided by selecting suitable switching state vectors and ensuring proper time sharing among these vectors. Two methods to select such switching state vectors are proposed in this paper. In the first method, a reference current space vector is realized using the nearest switching state vectors. However, this method results in low-frequency pulsation in dc-link voltage of each inverter. In the second method, the switching state vectors are chosen to eliminate this low-frequency pulsation. Effectiveness of these methods is experimentally validated for a five-level CFI. Further, performance of these methods is compared based on efficiency, THD, and dc-link voltage ripple for various inequality ratios in dc-link currents. [ABSTRACT FROM AUTHOR]