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This article presents an advanced method for power-loss breakdown of a high-power bidirectional isolated dual-active-bridge (DAB) dc-to-dc converter using SiC-mosfet/SBD H-bridge modules. This method is so simple and practical as to extract a switching loss from accurately measured overall losses. A test bench designed and built in this article is characterized by cascading the two identical 750-V 100-kW 16-kHz DAB converters equipped with the two identical unity-turns-ratio transformers. The test bench allows power-loss breakdown at buck and boost operation. When a dc-input voltage of 750 V is different from a dc-output voltage of 850 V at 100 kW and 16 kHz, “hybrid” phase-shift control makes the overall power loss lower by 158 W than “pure” phase-shift control. [ABSTRACT FROM AUTHOR]

This article, based on modeling and scaling as well as simulation and experiment, provides a comprehensive discussion on a real-time real-power emulator for a medium-voltage, high-power, high-speed motor drive. A three-phase modular multilevel double-star chopper-cell (DSCC) inverter under test is connected in front-to-front (FTF) with the emulator. The DSCC inverter is the same in circuit configuration as the DSCC rectifier. This emulator is characterized by integrating mechanical dynamics of both motor and load into it. The power-electronic circuit of the emulator consists of a three-phase DSCC rectifier, three ac inductors, and a single two-winding common-mode inductor at the dc side. This article starts with modeling and scaling of a three-phase 6.6-kV 10.9-MW four-pole 9000-r/min induction motor drive. Then, the authors design, build, and test a three-phase 200-V 10-kW downscaled test bench. Experimental waveforms from the 10-kW test bench, as well as simulated waveforms from the 10.9-MW full-scale and 10-kW downscaled systems, lead to the following conclusion: The emulator can reproduce both electrical and mechanical dynamics of the three-phase 200-V, 10-kW, four-pole, 9000-r/min induction motor coupled with a centrifugal compressor. [ABSTRACT FROM AUTHOR]

This article designs, builds, and tests the 850-V 100-kW 16-kHz bidirectional isolated dc–dc converter using the latest 1.2-kV 400-A SiC-mosfet/SBD H-bridge modules, with focus on efficiency improvement. Here, SBD stands for Schottky barrier diode. It proposes intermittent operation with continuous-current mode (CCM), to reduce switching losses in partial loads. Experimental results verify that the conversion efficiency from the dc input to the dc output is as high as 99.3% at the rated power of 100 kW, and 99.2% at a partial load of 10 kW. These are measured and calculated, discarding auxiliary power losses of 82 W in total, which are produced by the digital controller, gate-drive circuits, and cooling fans. Experimental transient waveforms show that no dc magnetic flux is included in the 850-V 100-kW 16-kHz transformer at intervals of switchover between the continuous operation and the CCM intermittent operation when power reversal from − 100 to 100 kW is performed at an interval of 1 ms. Finally, this article presents an experimental and theoretical discussion on the voltage ripples appearing across the dc capacitor of each bridge. [ABSTRACT FROM AUTHOR]

This paper provides an experimental discussion on a real-time real-power emulator that plays an important role in achieving a total test of medium-voltage, high-power, high-speed induction motor drives. The use of the emulator brings cost and time savings to the test. The test bench including the emulator is characterized by connecting two modular multilevel double-star chopper-cell (DSCC) converters connected in a front-to-front way. This paper designs, builds, and tests a 400- ${\rm V}_{\rm dc}$ , 10-kW downscaled test bench. It mainly consists of the following two identical DSCC converters: 1) one DSCC converter is used as an inverter under test; and 2) the other as a real-time real-power high-fidelity emulator. Experimental waveforms confirm that the emulator can reproduce electrical and mechanical operating performance of the three-phase 200-V, 10-kW, four-pole, 9000-r/min induction motor loaded with a centrifugal compressor. [ABSTRACT FROM AUTHOR]

This paper presents two high-voltage direct-current circuit breakers that have the capability of interrupting a short-circuit current within several milliseconds. They consist of a current-limit inductor, a current-control inductor, one or two mechanical switches, and a multilevel converter with phase-shifted-carrier pulsewidth modulation. The two breakers can commutate an almost zero current from the main branch to the auxiliary branch. This paper proposes an original breaker with low-voltage and high-voltage mechanical switches connected in series, followed by a simplified breaker with a single high-voltage mechanical switch. Finally, this paper includes experimental verification by two slightly different downscaled breakers rated at 300 Vdc and 150 Adc, as well as confirmation of an actual original breaker by circuit simulation using the “PSCAD/EMTDC” software package. [ABSTRACT FROM AUTHOR]

This paper presents an improved compact model for a discrete silicon-carbide (SiC) MOSFET. This compact model based on the previous model features a new behavioral model of output characteristics and new nonlinear models of internal capacitors. Simulation with the improved compact model is in better agreement with measurement than that with the previous compact model, as well as transient behavior of the drain–source voltage, the drain current, and the leakage current out of a heatsink. Furthermore, the improved model is useful for constructing the accurate compact model that can reproduce the high-frequency characteristics of the transient waveforms of SiC-MOSFET s. This successful validation indicates that the improved compact model would be a promising tool for a full-simulation-based design system of the power converters using SiC-MOSFETs. [ABSTRACT FROM AUTHOR]

This paper provides an analytical and experimental discussion on a power hardware-in-the-loop (P-HIL) test bench for a medium-voltage high-power high-speed synchronous motor drive. This test bench consists of two modular multilevel double-star chopper-cell (DSCC) converters connected front-to-front without a transformer. An experimental downscaled P-HIL test bench is designed, constructed, and tested to confirm its operating performance. The three-phase 400-Vdc 10-kW DSCC inverter with eight chopper cells per arm is used as a “real” inverter under test. The other DSCC rectifier is used as a set of a “virtual” three-phase 200-V 10-kW 300-Hz four-pole 9000-r/min synchronous motor and a “virtual” high-speed centrifugal compressor with a quadratic torque-to-speed load characteristic. [ABSTRACT FROM AUTHOR]

This paper presents theoretical and experimental discussions on low-voltage-ride-through operation of a modular multilevel single-delta bridge-cell (SDBC) inverter intended for utility-scale photovoltaic (PV) systems. Modern grid codes require grid-tied inverters to provide dynamic grid support during grid-fault events by injecting reactive current. This paper discusses decoupled positive- and negative-sequence reactive-current control, focusing on asymmetric voltage sags with imbalanced magnitude and phase relationships. The main objective is to present a feedforward control method based on calculation of the zero-sequence current required for achieving power balance during normal and grid-fault conditions. Moreover, this paper demonstrates a practical method that minimizes overcurrent stress in the three inverter clusters by adjusting active power drawn from PV arrays. Experimental results on a three-phase 12.6-kVA system prove that the SDBC inverter is capable of seamlessly operating through asymmetric voltage sags. [ABSTRACT FROM AUTHOR]

This paper provides an experimental and theoretical discussion on dynamic braking for a medium-voltage induction motor fed by a modular multilevel double-star chopper-cell (DSCC) inverter. It is intended to apply the motor drive to large-capacity fans and compressors with a large moment of inertia. Each chopper cell consists of a bidirectional chopper and a braking chopper connecting a single small-rated braking resistor in series with a single IGBT. This configuration results in a “distributed” dynamic brake that provides a distinctive welcomed side effect of protecting all the bidirectional-chopper cells against sudden overvoltage. An experimental system rated at 400 V and 15 kW is designed, constructed, and tested to verify operating performance of the distributed dynamic brake. Experimental waveforms, along with simulated waveforms, confirm firmly that the distributed dynamic brake is feasible and effective in an induction motor fed by a medium-voltage high-power DSCC inverter for fans and compressors. Finally, this paper gives a design example of a distributed dynamic-braking resistor for the 11-kV, 12-MW induction motor driving a large-capacity fan equipped with a large moment of inertia. [ABSTRACT FROM AUTHOR]

This paper describes a compact model for a silicon-carbide (SiC) MOSFET, which features both characterization and modeling of a new drain-gate capacitor. In addition, the internal gate resistance and the internal stray inductances of the discrete package are experimentally evaluated and modeled by a newly-proposed method. The gate drive circuit is also modeled and involved in this simulation. The comprehensive modeling procedure is also considered, which offers an efficient modeling process. The model shows excellent agreements in transient behavior of both gate drive circuit and main power circuit between experimental and simulated waveforms. The comparison shows accurate reproducibility of a rate of drain-source voltage change and a rate of drain-current change within an error of 15%, which could not be realized with the conventional stray capacitance models. This successful validation indicates that the developed model would offer a new modeling concept and be expected to open up the possibilities of the simulation study for evaluating and designing detailed performance of SiC-MOSFETs. [ABSTRACT FROM PUBLISHER]

This paper provides a chronological overview of the topology for multilevel converters, and discusses their different terminology usages and characteristics. The multilevel converters include three-level neutral-point-clamped (NPC) and neutral-point-piloted (NPP) inverters, three-level and four-level flying-capacitor (FLC) inverters, and a family of modular multilevel cascade converters. Some have already been put into commercial use, some have been on a research and development stage, and others have been on an academic research stage. This paper pays much attention to six family members of the modular multilevel cascade converters, intended for grid-tied applications and medium-voltage high-power motor drives. [ABSTRACT FROM PUBLISHER]

This paper discusses and compares phase-shifted pulse-width modulation (PS-PWM) and level-shifted PWM (LS-PWM) in a modular multilevel single-delta bridge-cell (SDBC) inverter for utility-scale grid-tied photovoltaic applications. This three-phase SDBC inverter provides the capability of operating even under power-distribution imbalances not only among three clusters, but also among cascaded bridge cells in each cluster. The main focus of this research lies in analyzing the capability of operation under severe power-distribution imbalances and presenting power-balancing methods based on zero-sequence current injection, which result in an extended power-balancing capability. This paper highlights that LS-PWM is superior to PS-PWM in both power-balancing capability and harmonic performance at the ac side of the SDBC inverter when operating under power-distribution imbalances. Experimental results obtained from a three-phase 10-kW downscaled system show good agreement with those from the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper provides a theoretical and experimental discussion on ac-inductors design for a modular multilevel triple-star bridge-cells (TSBC) converter, or shortly a TSBC converter. This converter requires multiple ac inductors for controlling nine cluster currents. This paper proposes three three-legged, six-winding, “interzigzag” inductors for the TSBC converter. Since each leg of the individual inductor has two windings, the three inductors have 18 windings in total. The wire leads are zigzagged among the three inductors. This unique structure of the “interzigzag” windings leads to the following feature: Both three-phase supply and motor currents produce no magnetic flux in each of the nine legs. This feature makes each inductor smaller in size and lighter in weight. A specially-designed downscaled motor-drive system rated at 400 V and 15 kW is constructed and tested to confirm the validity of a design of the proposed inductors, as well as to verify transient motor-drive performance during four-quadrant operation. [ABSTRACT FROM AUTHOR]

This paper presents an intensive discussion on a high-voltage direct-current (HVDC) long-distance transmission system combining two modular multilevel double-star chopper-cells (DSCC) converters with dc power cables. Hereinafter, each converter is referred to simply as a DSCC converter, or just as a DSCC for more simplicity. Such an HVDC transmission system is required to provide low-voltage-ride-through (LVRT) capability to enhance system availability. This paper proposes a practical LVRT control characterized by the use of power-line communications between the two DSCC converters. The validity and effectiveness of the LVRT control is verified not only by simulated waveforms obtained from the software package “PSCAD/EMTDC” but also by experimental waveforms from a three-phase 200-V, 400-Vdc, 10-kW, 50-Hz downscaled system with 300-m-long dc power cables. [ABSTRACT FROM AUTHOR]

This paper provides a theoretical discussion on a new phase-shifted rotating-carrier (PSRC) pulsewidth modulation (PWM) method for a modular multilevel double-star chopper-cell (DSCC) converter. The new method enables the DSCC converter to operate at a low switching frequency in a range of 50 to 100 Hz where the ac grid or line frequency is 50 Hz. The phase shift of each carrier signal is rotated to enable capacitor–voltage balancing in such a low-carrier-frequency range while maintaining the same voltage in each arm as that of the original phase-shifted-carrier PWM. Theoretical analysis of harmonic-voltage spectrum at the arm side of a chopper cell is conducted on the basis of double-variable Fourier series. Then, the analytical results are compared to numerical ones. A three-phase grid-connected DSCC converter rated at 66 kV, 50 Hz, and 100 MW with 64 chopper cells per leg is used in circuit simulation to confirm the validity of the proposed PSRC-PWM method. The simulation results show that the PSRC-PWM can maintain stable operation of the DSCC converter even if the carrier frequency goes lower than 100 Hz. Several performance criteria conclude that the optimal carrier frequency is 75 Hz. [ABSTRACT FROM AUTHOR]

This paper provides a theoretical and experimental discussion on a modular multilevel triple-star bridge-cell converter with focus on mitigating the capacitor-voltage fluctuation contained in each bridge cell. A new control method proposed in this paper is characterized by properly superimposing both common-mode voltage and circulating currents in the whole speed range. Moreover, this paper optimizes the amplitude and frequency of the superimposed common-mode voltage on the basis of theoretical analysis, thus resulting in minimizing the voltage fluctuation. The optimized control method makes both voltage fluctuation and cluster-current amplitude smaller than do the existing methods. Experimental waveforms obtained from a three-phase downscaled system using a 370-V, 15-kW, 75-Hz, six-pole, permanent-magnet synchronous motor verify good start-up performance from a standstill to the rated speed, keeping both capacitor-voltage and cluster current within acceptable levels. [ABSTRACT FROM AUTHOR]