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Linear modulation techniques (LMTs) of an asymmetrical six-phase machine (ASPM) with two isolated neutral points synthesize the desired voltage vectors by applying at least five switching states. Different choices of applied voltage vectors, sequences in which they are used, distribution of dwell-times among the redundant switching states give rise to a large number of possible LMTs. It is desirable that these LMTs avoid more than two transitions of a particular inverter leg within a carrier period. Only a subset of existing LMTs of ASPM follows this rule. Through an innovative approach, this article finds a way to account for all possible infinitely many LMTs that follow the rule of at most two transitions per leg. Another important criterion for the selection of an LMT is its current-ripple performance. Therefore, through numerical optimization, this article finds optimal LMTs among the above infinite possible LMTs for all reference voltage vectors in the linear range and for the whole feasible range of a machine parameter. This parameter is related to the leakage inductance of the machine and impacts the current ripple performance of ASPM. An optimal hybrid strategy is proposed with these optimal techniques, which outperforms all existing techniques in terms of the current ripple. The theoretical analysis is validated through simulation in MATLAB and experiments performed up to 3.5 kW on a hardware prototype. [ABSTRACT FROM AUTHOR]

Fast switching transient of SiC mosfet reduces switching loss. However, it excites device and circuit parasitics resulting in prolonged oscillation, high device stress, spurious turn on, EMI related issues, and higher switching loss. Behavioral or analytical models are used to estimate switching loss $(dv/dt)$ , $(di/dt)$ rates, etc., and it requires the value of circuit parasitics as input. Measurement is the only way to accurately estimate some device package-dependent circuit parasitics when the internal package geometry is unknown. Hence, measurement of circuit parasitic is essential for optimal design. This article presents a set of simple experimental measurement techniques to determine circuit parasitic inductance and capacitances relevant for switching transient study of SiC mosfet in a half-bridge configuration. The accuracy of the proposed technique is verified through simulation and experimental results of the hard turn offand capacitor assisted soft turn-off dynamics of SiC mosfet over a range of operating conditions for two 1.2-kV discrete SiC mosfet of different current ratings and two different PCB layouts. Furthermore, the proposed technique is also validated with the existing frequency response analysis-based impedance measurement. [ABSTRACT FROM AUTHOR]

This article presents a systematic design procedure for a dual-active-bridge (DAB) dc–dc converter. Design of a DAB converter involves determination of two key parameters, i.e., transformer turns ratio and the series inductance value. Existing literature addresses this problem through numerical optimization, which is computation intensive and does not provide much insight. In general, loss is minimized by applying equal weightage to all operating conditions, which may not be practical. Given an operating power range, terminal voltage range, and switching frequency, this article presents a way to optimally select the design variables through analytical solution of a constrained optimization problem. Analysis is carried out in the time domain, and an optimal triple-phase-shift modulation strategy is considered that ensures minimum inductor rms current and soft switching. The choice of the design parameters results in minimization of the worst-case inductor rms current over the entire operating range of the converter, which leads to both efficiency and size optimization. A procedure for selection of devices and filter capacitors and design of magnetics is given. A 2.6-kW experimental prototype is designed to validate the theoretical analysis. [ABSTRACT FROM AUTHOR]

Switching transients of SiC MOSFET are fast compared to its Si counterpart. Fast switching transient reduces switching loss but may induce prolonged oscillations, spurious turn-on, high device stress, and electromagnetic interference (EMI)-related issues, etc. In soft switched converters, use of external drain source capacitance can reduce these adverse effects along with the reduction in switching loss. However, the selection of external drain source capacitance is not straightforward. A large external capacitance reduces switching loss, $(dv/dt)$ , $(di/dt),$ and transient over-voltage but may also result in higher dead-time loss and reduced switching frequency. This article presents an analytical model that captures the soft turn-off switching dynamics of SiC MOSFET using parameters obtained from device datasheet along with the values of external circuit parasitics. Unlike linear approximation, a nonlinear channel current model is used along with a comprehensive model of transfer capacitance. The effect of external gate drain capacitance is also considered. This leads to a better estimation of switching transition time, actual loss, $(dv/dt)$ , $(di/dt)$ , and transient over voltage. Also, a method to select an optimal value of external drain source capacitance is presented. The proposed model is validated through behavioral simulation and experiment for two 1.2-kV discrete SiC MOSFETs. [ABSTRACT FROM AUTHOR]

Overmodulation techniques of asymmetrical six-phase machine achieve higher dc-bus utilization by applying voltage in the nonenergy transfer plane. This results into unwanted current and associated copper loss. Existing overmodulation technique minimizes this voltage from space-vector perspective with predefined set of four active vectors. To find the best technique, one needs to perform the above minimization problem with all possible sets of active vectors with which higher voltage gain can be attained. Therefore, this requires evaluation of large number of cases. This article formulates the above minimization problem in terms of average voltage vectors of two three-phase inverters, where active vectors need not to be specified beforehand and, thus, the analysis is more general. Sixteen possible techniques with different set of active vectors are derived following the above analysis, which attain minimum voltage injection in the nonenergy transfer plane. This article also identifies one of these 16 techniques, which can be implemented without involving complex six-dimensional transformation. The above technique is validated through experiments on six-phase induction motor and simulations in MATLAB at 3.5-kW power level. [ABSTRACT FROM AUTHOR]

Overmodulation (OVM) techniques of asymmetrical six-phase induction machine (ASIM) achieve higher dc-bus utilization by applying nonzero average voltage in nonenergy transfer plane. This results into unwanted current and associated copper loss. Existing OVM techniques reduce this loss with pulsewidth modulation (PWM) techniques from six-dimensional space vector perspective, which is both conceptually difficult and computationally challenging. The computational complexity of space vector based techniques is reduced by few existing PWM techniques in linear region by splitting the six-phase inverter as two three-phase inverters and modulate these inverters with linear PWM techniques in 30 $^\circ$ phase shifted. This is referred as three-phase inverter based technique in the title. But, three-phase inverter based OVM technique does not exist in the literature due to lack of knowledge of the relationship between six-dimensional space vectors and space vectors of two three-phase inverters. This article first establishes this relation. Based on this relation, an OVM technique is proposed where the reference voltage vectors of two inverters are phase shifted by 30 $^\circ$ but of different magnitudes. The proposed technique achieves THD and WTHD performances similar to space vector based best technique of ASIM with reduced computational complexity, as shown in details. The proposed strategy is validated through experiments and simulations on six-phase induction machine at 4.2 kW. [ABSTRACT FROM AUTHOR]

Fast switching transient of SiC mosfet may lead to prolonged oscillations, spurious turn on, large device stress, and high amount of electromagnetic interference generation. For an optimal layout and gate driver design, study of switching dynamics is important. This article presents an analytical model that captures the turn-off switching dynamics of SiC mosfet and SiC Schottky barrier diode (SBD) pair using parameters obtained from device and gate driver datasheets and the values of external circuit parasitics. Unlike linear approximation, a detailed model of channel current is considered that captures the gradual transition from ohmic to saturation region and the transverse electric field effect. A comprehensive model of the transfer capacitance is used and the effect of external gate-drain capacitance is considered. This results in a better estimation of switching transition time, actual loss incurred, (dv/dt), (di/dt), and transient overvoltage. The behavioral simulation and experimental results confirm the accuracy of the presented analytical model over a range of operating conditions for two 1.2-kV discrete SiC mosfet and SBD pairs of different current ratings. [ABSTRACT FROM AUTHOR]

A three-level three-phase single-stage high-frequency link dc–ac converter is reported in this article for grid integration of photovoltaic sources. The proposed topology employs two three-level neutral point clamp (NPC) half-bridge legs on the dc side. The advantages of using three-level legs over conventional two level are: 1) the three-level legs can be implemented with the devices with lower blocking voltage which are economical; and 2) the low voltage blocking devices have lower on-state drop and lower turn on–off energy losses compared to high voltage blocking devices used in a two-level leg. These help to improve the converter efficiency. The sinusoidal pulsewidth modulation is implemented with the three-level NPC legs. The modulation strategy ensures reduced neutral current drawn by the NPC legs. The inner switches of the NPC legs are zero voltage switched. The turn-on transitions of the outer switches are with zero current. The proposed solution employs two high-frequency transformers to provide galvanic isolation which results in compact, low cost isolated converter solution. The intermediate dc link is pulsating and does not require any filtering. A low-frequency unfolder is employed to generate line frequency ac from pulsating dc. The switching loss of the unfolder is negligible. The proposed topology can support stand-alone load up to $\pm 0.866$ PF. The converter operation is verified on a 2-kW hardware prototype. [ABSTRACT FROM AUTHOR]

In this article, a pulsewidth modulated single-stage high frequency link three-phase dc–ac converter is proposed for grid integration of solar and fuel cell-based energy sources. On the dc side, the converter has three half-bridge legs which are zero-voltage switched over the entire line cycle without using any additional snubber circuit. On the ac side, two diode bridge rectifiers and one neutral point clamped (NPC) T-type three-level inverter are employed. The active switches in NPC inverter are switched either at line frequency or twice of it, incurring negligible switching loss. Modulation ensures soft commutation in the diode bridges. The intermediate three-level dc bus is pulsating and does not require any dc-filter capacitor and thus reduces overall filtering requirements. The high frequency galvanic isolation provides high power density, low-cost converter solution. The converter operation is analyzed in detail and verified on a 2-kW hardware prototype. [ABSTRACT FROM AUTHOR]

Hardware emulators, simulating a test environment in real time, are an essential tool in testing power system equipment. This article presents a hardware emulator of a programmable transmission line capable of simulating high-frequency transients. Emulation of, energization of long transmission line, requires the observer to solve transmission line or telegraphers equations in real time. This article identifies a continuous time model that captures the wave nature and suitable for real-time implementation. This article derives the discrete-time model to be solved in the observer of the hardware emulator. A step-by-step procedure is given to determine two key emulator parameters: observer sampling frequency, and switching frequency of the power amplifier considering different hardware, event, and software related constraints. For high bandwidth requirement, a high switching frequency, 100-kHz, 12-kVA silicon carbide (SiC) based voltage source converter is designed to operate under a current controller with a gain crossover frequency of 5 kHz. A system on chip that combines an Anvanced RISC Machine (ARM) processor along with an field programmable gate array (FPGA) is used to implement the observer. Experimental results verify accuracy of the designed emulator in the event of energization of a long transmission line. Though proposed transmission line emulator can only be used to study the energization of a long line with one end terminated with shunt reactor, the solution can be extended for emulation of a long line that links two sections of power grid. [ABSTRACT FROM AUTHOR]

This article proposes a unidirectional, single-stage, three-phase, and high-frequency-link dc–ac converter. The converter uses three high-frequency transformers to provide galvanic isolation. In the primary, the converter has three half-bridge legs. In the secondary, three diode-bridge rectifiers are used. Each rectifier is followed by a half-bridge (unfolder) leg. The modulation strategy proposed in this article ensures zero-voltage switching of all six primary side switches over the entire line cycle without additional snubber circuit. The secondary half-bridge legs are switched at line frequency, incurring negligible switching loss. The proposed converter does not require any interstage bulky dc-link filter capacitor. Thus, the overall filtering requirement is reduced, and the converter reliability is improved. The high-frequency galvanic isolation improves the converter power density. In this article, the modulation strategy and converter operation are described in detail. The operation is validated in a 3.7-kW hardware prototype. Key experimental results are presented in this article. [ABSTRACT FROM AUTHOR]

A novel single-stage high-frequency link three-phase ($3\phi$) inverter along with a modulation strategy is presented in this paper. The topology is targeted for grid integration of utility scale renewable and alternative energy sources like solar, fuel cell, and wind, where the power flow is unidirectional (from dc to ac). The primary side converter has a $3\phi$ voltage source inverter (VSI) structure along with an additional half-bridge leg. Sinusoidal pulsewidth modulation is implemented in the primary side converter. The three legs of the primary side VSI are zero voltage switched (ZVS) for most part of the line cycle. The additional half bridge leg is ZVS over the complete line cycle. The active switches in secondary side converter are line frequency switched and thus results in negligible switching loss. The converter switching process is described in detail to show the soft-switching of the primary side converter using the device capacitances and leakage inductances of the high-frequency transformers (HFTs). The HFT galvanic isolation results in high power density. A 4-kW laboratory scale hardware prototype is built and tested with the proposed modulation strategy. The experimental results are presented to verify the converter operation. [ABSTRACT FROM AUTHOR]

Estimation of switching loss at the early stages of design is essential for determination of switching frequency and selection of power devices. Analytical estimation similar to gate charge method results in fastest and easiest computation when compared with simulation or double pulse test based experimental approach. This paper presents an analytical estimation method of turn on switching loss of a SiC mosfet and SiC Schottky barrier diode (SBD) pair from datasheet parameters and using values of common source and dc bus inductances. Turn on losses are considered as they dominate the total switching loss. The presented method models the quadratic nature of the transfer characteristics and results in better estimation of current rise time when compared with the linear approximation used in the literature. During voltage fall, the non-linear nature of the parasitic capacitances of both the switch and the diode are considered. The simulation and experimental results confirm the accuracy of the presented method over a range of operating conditions for two 1.2-kV discrete SiC mosfet and SBD pairs of different current ratings. [ABSTRACT FROM AUTHOR]

This paper presents a novel single-stage soft-switched high-frequency-link three-phase dc–ac converter topology. The topology supports unidirectional dc to ac power flow and is targeted for applications like grid integration of photovoltaic sources, fuel cell, etc. The high frequency magnetic isolation results in reduction of system volume, weight, and cost. Sine-wave pulsewidth modulation is implemented in dc-side converter. Though high-frequency switched, dc-side converter is soft switched for most part of the line cycle. The ac-side converter active switches are line frequency switched incurring negligible switching loss. The line frequency switching of ac-side converter facilitates use of high voltage blocking inherently slow semiconductor devices to generate high voltage ac output. In addition, a cascaded multilevel structure is presented in this paper for direct medium-voltage ac grid integration. A detailed circuit analysis considering nonidealities like transformer leakage and switch capacitances, is presented in this paper. A 6-kW three-phase laboratory prototype is built. The presented simulation and experimental results verify the operation of the proposed topologies. [ABSTRACT FROM AUTHOR]

A solid-state transformer is a three-phase ac/ac converter with a high-frequency transformer. Due to advanced features like high power density, on demand var support and frequency regulation, solid-state transformer is an enabling technology for the modern power distribution system. It can also find application in high-power-density motor drives. The single-stage solid-state transformer considered in this paper is capable of bidirectional power flow and open loop power factor correction. This topology uses a minimum amount of copper and has relatively few semiconductor switches. One major problem in this converter is the commutation of leakage energy which results in power loss, reduction in switching frequency, loss of output voltage, and additional common-mode voltage switching. This paper presents a source-based commutation strategy along with a novel modulation technique resulting in elimination of additional snubber circuits, minimization of the frequency of leakage inductance commutation, recovery of the leakage energy, and soft switching of the output converter. The topology and its proposed control have been analyzed. Simulation and experimental results confirm the operation. [ABSTRACT FROM AUTHOR]

Pulse width modulation (PWM) converters generate switching common-mode voltages (CMVs) across the load terminals. These voltages cause common-mode currents, leading to bearing failure in motor loads and electromagnetic interference problems. This paper presents a generalized carrier-based PWM technique for open-end winding motor drives that completely eliminates switching CMV. The proposed method is applicable to both dual two-level voltage source inverter and dual matrix converter-based open-end winding drives. Detailed analysis shows that the carrier-based method requires significantly less computation compared to the corresponding space vector implementation. This paper also outlines the relationship between the two implementations. The carrier-based method is shown to achieve superior performance in terms of resource requirements and execution time when implemented on a field-programmable gate array-based real-time control platform. Simulation and experimental results have been presented to validate the proposed method. [ABSTRACT FROM AUTHOR]

A filter is required to eliminate the high-frequency switching ripple present in the input current of a matrix converter (MC). Design of such a filter requires an estimation of the higher harmonic components present in the input current. This paper presents a simple closed-form analytical expression for the RMS input current ripple injected by the MC. The expression shows the variation with load power factor and is independent of the output frequency. This is used in a step-by-step procedure to design various input filter components from the specifications of allowable total harmonic distortion in the grid current and distortion in the input voltage. The MC is modeled for the grid frequency component in order to evaluate the design for input power factor and voltage drop across the filter. A damping resistance has been designed ensuring minimum ohmic loss. The analytical estimation of the ripple current and the proposed design procedure have been validated by simulations in MATLAB/Simulink and experiments on a laboratory prototype. [ABSTRACT FROM PUBLISHER]

This paper presents a systematic step-by-step design procedure for the input filter of a current source rectifier (CSR). The design is based on the specifications of allowable ripple in the input voltage of the CSR and high-frequency harmonic components in the grid current. Analytical techniques have been developed to estimate the ripple present in the input current and to model the converter for fundamental or grid frequency. The analysis is done for carrier-based and space-vector modulation of the current source rectifier and the model at grid frequency is used to evaluate the design of the filter for grid power factor, voltage drop across filter, etc. A damping resistance is designed ensuring a minimum power loss. The analysis and design of the input filter have been verified by simulations in MATLAB/Simulink and experimental tests on a laboratory prototype. [ABSTRACT FROM AUTHOR]

This paper presents a novel topology for the generation of adjustable frequency and magnitude pulsewidth-modulated (PWM) three-phase ac from a balanced three-phase ac source with a high-frequency ac link. The proposed single-stage power electronic transformer (PET) with bidirectional power flow capability may find application in compact isolated PWM ac drives. This topology along with the proposed control has the following advantages: 1) input power factor correction; 2) common-mode voltage suppression at the load end; 3) high-quality output voltage waveform (comparable with conventional space vector PWM); and 4) minimization of output voltage loss, common-mode voltage switching, and distortion of the load current waveform due to leakage inductance commutation. A source-based commutation of currents associated with energy in leakage inductance (termed as leakage energy) has been proposed. This results in soft-switching of the output-side converter and recovery of the leakage energy. The entire topology along with the proposed control scheme has been analyzed. The simulation and experimental results verify the analysis and advantages of the proposed PET. [ABSTRACT FROM PUBLISHER]

This paper presents a single-stage bidirectional high-frequency transformer (HFT) link dc/ac converter topology for a three-phase adjustable magnitude and frequency PWM ac drive. This type of converters find a wide range of applications including UPS systems, drives involving renewable energy sources (Solar, Fuel cell), and energy storage systems (typically low voltage dc to high voltage PWM ac). The HFT results in reduction in cost and weight along with a considerable increase in power density. The adverse effects of common-mode voltage are well known in this kind of applications. The proposed topology along with a modulation technique reduces common-mode voltage to practically zero and generates high-quality output voltage waveform comparable to conventional space vector PWM (CSVPWM). A source-based commutation method, presented in this paper, to commute the energy stored in the leakage inductance of the HFT resulting in the following advantages 1) no need for any auxiliary circuits with passive components; 2) almost complete recovery of the leakage energy; 3) soft switching of the output side converter for all load conditions; and 4) minimization of common-mode voltage switching due to commutation. The converter along with the suggested control has been analyzed in detail. The presented simulation and experimental results confirm the operation of the proposed converter. [ABSTRACT FROM AUTHOR]

A voltage source inverter-fed induction motor produces a pulsating torque due to application of nonsinusoidal voltages. Torque pulsation is strongly influenced by the pulsewidth modulation (PWM) method employed. Conventional space vector PWM (CSVPWM) is known to result in less torque ripple than sine-triangle PWM. This paper aims at further reduction in the pulsating torque by employing advanced bus-clamping switching sequences, which apply an active vector twice in a subcycle. This paper proposes a hybrid PWM technique which employs such advanced bus-clamping sequences in conjunction with a conventional switching sequence. The proposed hybrid PWM technique is shown to reduce the torque ripple considerably over CSVPWM along with a marginal reduction in current ripple. [ABSTRACT FROM AUTHOR]

A pulsewidth modulation (PWM) technique is proposed for minimizing the rms torque ripple in inverter-fed induction motor drives subject to a given average switching frequency of the inverter. The proposed PWM technique is a combination of optimal continuous modulation and discontinuous modulation. The proposed technique is evaluated both theoretically as well as experimentally and is compared with well-known PWM techniques. It is shown that the proposed method reduces the rms torque ripple by about 30% at the rated speed of the motor drive, compared to conventional space vector PWM. [ABSTRACT FROM AUTHOR]

A power electronic converter based transmission line emulator (TLE) is presented in this paper. The TLE can emulate medium and long lines in steady-state and symmetrical faults occurring at any point in the line. A traveling wave based numerical scheme for the emulation of the line is identified and then implemented on a novel digital architecture in the field-programmable gate array part of a system on chip platform. The proposed architecture meets the real-time computation constraints through parallel processing and optimal use of hardware resources (DSP slices, block RAMs, etc.). A comprehensive analysis to determine the two important parameters of the TLE—the power converter switching frequency and observer update period while satisfying a number of constraints coming from the numerical scheme, power, and embedded hardware—has been presented. Finally, relevant simulation and experimental results on a developed 400-V 15-kVA TLE prototype have been presented for validation. [ABSTRACT FROM AUTHOR]

Dual active bridge (DAB) based converters offer the benefit of smaller volume due to high-frequency isolation and controllability of active power flow, making them attractive for various applications, such as renewable energy generation, plug-in hybrid vehicles, and distribution systems. This paper presents a novel converter topology along with a modulation strategy for a DAB-based three-phase ac to dc converter. The major benefits are single-stage conversion, no unreliable intermediate dc-link capacitor, reduced number of switches, i.e., only two active switches on the ac side, simple control scheme, open-loop unity power factor operation, bidirectional power flow, and partial soft-switching. This paper presents the analysis of all the operating modes of the converter, resulting in the analytical estimation of power transfer and rms winding current and investigation of soft-switching conditions for the power devices. Simulation and experimental results have been presented to demonstrate the advantages of the proposed technique and accuracy of the analysis.1 [ABSTRACT FROM AUTHOR]

A dual-active-bridge-based single-stage ac/dc converter may find a wide range of emerging applications such as interfacing plug-in hybrid vehicles with the ac grid, interconnection of dc grid, etc. This type of converter can be used due to unique features such as 1) high-frequency isolation resulting in a) high power density and b) safety and voltage matching; 2) bidirectional power flow; 3) soft switching leading to higher efficiency. In this paper, a modulation strategy has been proposed that results in 1) open-loop power factor correction; 2) zero current switching in the ac-side converter for all load conditions; 3) linear power relationship for easy control implementation; and 4) Zero voltage switching in the load side converter. The converter with the proposed control has been analyzed. Simulation and experimental results on a 1-KW prototype confirm the advantages. [ABSTRACT FROM AUTHOR]

In this article, a single stage high frequency link unidirectional single phase inverter topology is reported for the application of grid integration of solar and fuel cells. The inverter supports only unity power factor operation. The converter is realized using a parallel resonant structure followed by a full bridge unfolder. This avoids undesirable voltage stress caused by parasitic ringing in pulsewidth modulation (PWM)-based approach. A hybrid modulation strategy, variable frequency modulation in most part of the line cycle, fixed frequency PWM near the zero crossing of line cycle is adopted here. The proposed modulation strategy provides the conditions for zero voltage switching over most part of the line cycle and ensures that the variation of the switching frequency of the converter is within an acceptable range. A state plane-based exact analysis is used for modulator implementation and design of the converter. Also, a design procedure is given that ensures minimization of the component stresses over the line cycle. The operation of converter is experimentally verified using a 3 kW hardware prototype. [ABSTRACT FROM AUTHOR]

Power electronic transformers (PETs) offer the advantage of size and weight reduction compared to line-frequency transformers by operating at much higher frequencies than line frequency. In this paper, a push–pull-based ac/dc PET has been proposed and analyzed. The PET offers bidirectional power flow between single-phase ac and dc, using the dual-active bridge principle. Such a system may find applications in interfacing plug-in hybrid and electric vehicles to the grid. The proposed PET offers advantages of open-loop unity power factor operation, soft switching of secondary-side converter power switches for all operating points, high power density owing to use of a high-frequency transformer, and high utilization factor (UF), compared to previous work. Analysis has been done for power transfer, UF, and soft switching. Simulation and experimental results have been provided to demonstrate the operation of the PET. [ABSTRACT FROM PUBLISHER]