Search

Since electrolytic capacitors are primarily responsible for breakdowns in power electronics converters and have the trait of high failure rate, their reliability is a tremendous concern. Consequently, an appropriate monitoring as well as fault diagnosis system should be laid emphasis on. In this paper, an original and accurate online scheme applied to estimate the output capacitor of the flyback converter is put forward. By analyzing the voltage ripple of the output electrolytic capacitor in detail, an online mathematical model for the equivalent series resistance (ESR) and capacitance (C) is derived. A trigger circuit and an isolated amplification circuit are designed to catch the output voltage ripple values at certain instants of switching cycle, which are sent to digital signal processor for the calculation of ESR and C. The proposed scheme is noninvasive as no extra current sensor is needed. In order to verify the feasibility of the scheme, a prototype of the online monitoring system is built and experiments are conducted. [ABSTRACT FROM AUTHOR]

A novel one transistor and one diode (1T-1D) dynamic random access memory cell for embedded applications is proposed. This memory cell consists of a floating-gate (FG) MOSFET and a gated diode. The anode of the diode is connected to the FG, so that the threshold voltage of the FG MOSFET can be modulated by the current through the diode. In this paper, basic device operations, speed, retention, and disturb performance are investigated using Silvaco technology computer-aided design simulation tools. The process compatibility is also investigated by integrating the memory array and specific sense amplifier. [ABSTRACT FROM PUBLISHER]

In this article, a novel low-power notch-enhanced active filter is presented using the feedback notch-enhanced (FNE) technique. The active notch filter is proposed based on an area-saving second-order $LC$ series resonator. The passive devices’ loss can be effectively eliminated by the generated dc power-independent negative resistance by inserting a current feedback transistor. Moreover, the capacitive source degeneration (CSD) technique is proposed to boost the filter $Q$ by shifting the series resonant frequency to the negative-resistance region. To demonstrate the feasibility and practicability of the proposed notch filter, a 3.1–10.6-GHz IEEE 802.11a interferer rejected low-noise amplifier (IR-LNA) is fabricated in a 0.13- $\mu {\hbox {m}}$ CMOS process. The multistage structure, consisting of a common-gate (CG) stage with a dual-resonance load and a cascode stage with the proposed active notch filter, is employed for wideband input matching, gain flatness, and interferer rejection (IR) simultaneously. The measurements show that the IR-LNA provides a maximum of 16.05-dB power gain, 2.08–3.70-dB noise figure (NF) in the desired band, and a maximum of 40.9-dB IR ratio (IRR) at 5.77 GHz, with a power consumption of 10.2 mW, while the active notch filter only consumes 456- $\mu {\hbox {A}}$ current. [ABSTRACT FROM AUTHOR]

A buck power factor correction (PFC) converter is widely used in low-power applications for its high efficiency in the entire universal input voltage range. However, because of the inherent dead zone, the input power factor (PF) is not high. A buck PFC converter operating in a discontinuous conduction mode is introduced. When the duty cycle is constant during the line cycle, the input current contains a large amount of negative third harmonic, especially at a low input voltage. By proposing an optimum third harmonic injection during the nondead zone and its control implementation, a higher PF and a lower output voltage ripple within the entire universal input voltage range are achieved. The experimental verifications are carried out on a 120-W prototype with universal input. [ABSTRACT FROM PUBLISHER]