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Spin–orbit torque magnetic tunnel junction (SOT-MTJ) is the memory cell of magnetic random access memory (MRAM), which is a promising candidate for upper level cache in the harsh environment due to nonvolatility, high speed, and high endurance. Therefore, it is significant to research the mechanism of irradiation effects on the SOT-MTJ before its integration onboard. This article investigates the ionization and displacement damage of in-plane magnetic anisotropy SOT-MTJ, including 1-MeV electron and 17.2-keV He+ and 60Co gamma irradiations with various fluences and doses, respectively. The devices are resilient to tunnel magnetoresistance (TMR), whereas the magnetic properties are changed after irradiation. The 100-Mrad (Si) gamma and 17.2-keV He+ irradiations generate similar damages on the device performances, in the aspects of the magnetic anisotropy and critical current density ($J_{\mathrm {c}}$). However, the displacement damage originating from the electron irradiation does not have a significant influence on $J_{\mathrm {c}}$. In addition, the saturation magnetization and exchange bias field are changed by irradiations without regularity. Some possible mechanisms are discussed to explain the experimental results through the simulation of stopping and range of ions in matter (SRIM) and microstructural tests. [ABSTRACT FROM AUTHOR]

From the discovery of giant magnetoresistance (GMR) to tunnel magnetoresistance (TMR), their subsequent application in large capacity hard disk drives (HDDs) greatly speeded up the information era over the past decades. However, the growing demand for big-data storage and processing is limited by the von-Neumann architecture due to the memory bottleneck and power dissipation. Taking advantage of nonvolatility, high speed, and low power, magnetic random access memory (MRAM) becomes a promising candidate to overcome this limitation through processing-in-memory (PIM) architectures. In this article, we provide an overview of existing technology and give a roadmap of spintronic devices for future energy-efficient computing and its relevant integration architectures. We begin with the fundamentals of Toggle-MRAM and spin-transfer torque (STT)-MRAM, which already have commercial applications. We then introduce spin-orbit torque (SOT), a critical mechanism to realize low-power data manipulation in the next generation of MRAM and summarize the recent experimental breakthroughs of field-free SOT switching schemes. Finally, we present MRAM-based PIM architectures and novel spintronic devices, provide an application outlook, and deliver the future development potential of energy-efficient computing systems. [ABSTRACT FROM AUTHOR]

The interplay of spin-transfer torque (STT) and spin-orbit torque (SOT) highlights the potential of current-induced magnetization reversal for the ultrahigh-speed and ultralow-power memory applications. However, the ultrafast field-free switching and its dynamic mechanism have not been clarified yet. Here, we experimentally demonstrate the sub-nanosecond field-free switching by the interplay of STT and SOT in perpendicular magnetic tunnel junctions (MTJs). The dynamic investigations of the STT and SOT switching reveal that the applied SOT current can highly decrease the incubation time and current density of STT, which leads to the achievement of ultra-fast switching. Besides, the timing scheme investigations of SOT and STT pulses are performed. The firstly applied SOT current further decreases the transition time of the magnetization switching, which could result from the different nucleation and motions of domains. The interplay and the timing operations of STT and SOT provide more flexible solutions for high-speed, large-scalability and energy efficient memory applications. [ABSTRACT FROM AUTHOR]

Current-induced magnetization switching is crucial in high-performance nonvolatile memory especially when the spin-transfer torque (STT) and spin-orbit torque (SOT) are employed in the mainstream magnetic random-access memory. However, in STT devices, the intrinsic mechanism leads to a long write latency, a low endurance, and a high-power consumption, while in SOT devices, a three-terminal structure is necessary to complete the read and write operations, causing a low space efficiency. In this work, we experimentally demonstrate a NAND-like spin-torque memory unit with the interplay of STT and SOT. The spin joint effect induced magnetic reversal is verified to be more energy-efficient and faster than that of STT. It also shows a great selectivity to ensure the reliability of the write operation. The memory unit, containing 8 magnetic tunnel junctions with a shared heavy-metal nanowire, is erased by a single SOT current and written by the combination of STT and SOT, showing the great potential for the high-density, ultrafast and energy efficient memory applications. [ABSTRACT FROM AUTHOR]

Low on/off ratio gravely hinders the application of magnetoresistance (MR) devices for the accurate and reliable data fetch. In this paper, a rectified tunnel MR (R-TMR) device is fabricated by integrating perpendicular-magnetic-anisotropy magnetic tunnel junction (PMA MTJ) and Schottky diode. High on/off ratio, intrinsic non-volatility and multi-dimensional regulation capabilities can be obtained, which makes this emerging spintronic device suitable for in-memory computing (IMC). By reversing the rectifying direction of the diode and tuning the proportions of alternating current (AC) and direct current (DC), reconfigurable logic operations have been achieved. Two proofs of concept, i.e. “NOR” and “NAND”, are experimentally performed. [ABSTRACT FROM AUTHOR]

Recently, exploiting emerging nonvolatile memories to implement the process-in-memory (PIM) paradigm have shown great potential to address the von Neumann bottleneck and have attracted extensive research and development. In this paper, we present a novel PIM platform—spintronic processing unit (SPU), within spin transfer toque magnetic random access memory (STT-MRAM). This energy-efficient and reconfigurable PIM platform can perform different tasks—data storage and logic computing—using the same physical fabric that is programmable at the finest grain, i.e., the individual memory cell level, without the need to move data outside the memory fabric. The proposed SPU works just like a typical memory and all the logic functions are achieved through regularmemory-like write and read operations with minimal modifications. The functionality and performance are evaluated via hybrid circuit simulations under the 40-nm process technology node. Our proposed SPU is expected to be a feasible PIM platform in the near future, owing to the increasing maturity of STT-MRAM. [ABSTRACT FROM AUTHOR]

The temperature dependence of magnetoresistance and switching characterization based on spin transfer torque (STT) effect of perpendicular magnetic tunnel junctions (p-MTJs) with MgO/CoFeB/W/CoFeB/MgO double-interface free layer was studied. The tunneling magnetoresistance (TMR) ratio increases from 95% to 176% for both 84 and 64 nm-diameter p-MTJs, upon decreasing the temperature from 400 to 20 K. This change of TMR is dominated by a steady increase in the resistance of antiparallel state while the parallel state conductance remains almost constant. Switching behavior at various temperatures is investigated for pulse voltage-dependent STT measurements; resistance versus voltage loops for both the switching directions become more symmetric with decreasing temperature. Furthermore, low-temperature measurements of magnetic properties suggest that the effect of stray field for STT becomes weaker as the temperature decreases, which suggests the p-MTJs design for cryogenic memories. [ABSTRACT FROM AUTHOR]

Perpendicular-anisotropy magnetic tunnel junction (p-MTJ), a type of magnetic storage element, has shown outstanding performances in terms of high density, good scalability, and low power. In particular, the double-interface CoFeB/MgO p-MTJ with W spacer and bridging layers was recently demonstrated. This device shows a large tunnel magnetoresistance ratio, low junction resistance, and high robustness against high-temperature annealing. To consider this type of p-MTJ for the space environment, the gamma irradiation effects need to be evaluated. In this paper, the double-interface CoFeB/MgO multifilms are exposed to the gamma irradiation at different doses. The gamma irradiation effects on double-interface CoFeB/MgO multifilms are experimentally evaluated based on the comparison between the results of prerad and postrad magnetic properties. In the case of a low irradiation dose, the coercivity gradually increases with the increasing dose, whereas no variation is observed for the saturation magnetization. However, the magnetism is destroyed if the irradiation dose is sufficiently high. Some possible mechanisms are discussed to explain the experimental results. [ABSTRACT FROM AUTHOR]

Artificial synaptic devices implemented by emerging post-CMOS non-volatile memory technologies such as Resistive RAM (RRAM) have made great progress recently. However, it is still a big challenge to fabricate stable and controllable multilevel RRAM. Benefitting from the control of electron spin instead of electron charge, spintronic devices, e.g., magnetic tunnel junction (MTJ) as a binary device, have been explored for neuromorphic computing with low power dissipation. In this paper, a compound spintronic device consisting of multiple vertically stacked MTJs is proposed to jointly behave as a synaptic device, termed as compound spintronic synapse (CSS). Based on our theoretical and experimental work, it has been demonstrated that the proposed compound spintronic device can achieve designable and stable multiple resistance states by interfacial and materials engineering of its components. Additionally, a compound spintronic neuron (CSN) circuit based on the proposed compound spintronic device is presented, enabling a multi-step transfer function. Then, an All Spin Artificial Neural Network (ASANN) is constructed with the CSS and CSN circuit. By conducting system-level simulations on the MNIST database for handwritten digital recognition, the performance of such ASANN has been investigated. Moreover, the impact of the resolution of both the CSS and CSN and device variation on the system performance are discussed in this work. [ABSTRACT FROM PUBLISHER]