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Metal–oxide–semiconductors (MOS) have become an ideal candidate for the next-generation optoelectronic device applications. However, high processing temperature and complicate processes are still tremendous challenge in developing solution-based complementary MOS (CMOS) inverter. In this article, for the first time, femtosecond (fs) laser was used to realize controllable annealing for solution-based CMOS inverter. The achievement of nonstoichiometric p-type oxide thin films was ascribed to the photo-assisted conversion of precursor to metal–oxide (M–O) lattices along with the formation of atom vacancies in oxide lattice due to carrier excitation and relaxation using laser annealing (LA). The field effect mobility of the p- and n-type M–O thin-film transistors (TFTs) with inkjet printing (IJP) and LA was 0.91 and 7.07 cm2/ $\text{V}\cdot \text{s}$ , respectively. Moreover, location control capacity was exploited to separately anneal the p- and n-type oxide deposited with IJP for the fabrication of TFTs, which significantly simplified the fabrication process of the inverter. CMOS inverter with high noise margin and moderate voltage gain above 10 was also obtained. Our work significantly improved the ability to selectively manipulate the functionality and properties of the irradiated materials. The results demonstrated that logic gates based on all-oxide can be large area integrated using our strategy, exhibiting attractive properties and applications of the CMOS integrated circuits in oxide electronics. [ABSTRACT FROM AUTHOR]

A novel nonvolatile floating-gate transistor memory device using CdSe@ZnS quantum dots (QDs) embedded the insulating polymer as a charge-storage layer along with the rational design of device structure is presented. The core–shell structure CdSe@ZnS QDs can efficiently trap both holes and electrons under the applied writing/erasing operations, resulting in a considerable threshold voltage shifts ( \Delta V{{\text {TH}}}) over 50 V and forming high-conductance (ON) and low-conductance (OFF) states at a gate voltage of 0 V. The value of threshold voltage shift is controlled by writing and erasing voltages, regardless with source–drain voltages. Furthermore, it exhibits a long retention time (the $\Delta V_{{{\text {TH}}}}$ can maintain 76% at 108 s) and outstanding endurance characteristics (>500 cycles), demonstrating extraordinary stable and reliable memory property. Moreover, a thin layer of Al2O3 was introduced as tunneling dielectric layer which is essential for the high-performance floating-gate transistor memory device. The nonvolatile organic transistor memory devices using QDs-based floating gate show great potential application for high-performance organic memory devices. [ABSTRACT FROM PUBLISHER]