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A distributed zero-sequence-current (ZSC) carrier signal injection via current transformer (CT) is proposed for underground cable single-phase-to-ground fault location in neutral isolated medium voltage (MV) distribution networks. High-frequency ZSC carrier signal is directly injected to a high-voltage underground cable of an energized distribution network via CT. The injected carrier signal travels along the cable to the receiving center in the substation, and is processed for quick fault line selection and fault location. No external power supplies or signal generators are needed due to the self-contained nature of the injector. The device can be constructed as a sleeve to be mounted around the underground power cable. This permits economical retrofitting to existing installations of power line communication (PLC) devices. In this paper, the operational principle and the application considerations for such an injection device and fault location tricks are explained, followed by the theory behind the proposed technique. Finally, MATLAB based numerical simulations are performed and a low-voltage prototype is tested to verify the validity of the proposed approach. [ABSTRACT FROM AUTHOR]

In this article, the random vibration test and finite-element simulation analysis of SAC305 solder joints in BGA packaged electronic chips were carried out. A failure model for BGA solder joints was established based on the life data. And vulnerable parts in electronic chips were analyzed. First, the random vibration test was conducted. Second, a lognormal distribution model of solder joints by means of the life data was established and analyzed based on the fracture mechanics theory. Finally, the finite-element simulation model of BGA packaged electronic chip was established and discussed. Failure characteristics of solder joints at different positions in electronic chips were compared and the failure mode of the solder joint was discussed using the simulation result and the observation result with scanning electron microscope (SEM). The results show that the life of each single solder joint in BGA packaged electronic chips follows a logarithmic normal distribution under the random vibration. Solder balls located at the four outermost corners of the chip are subjected to the greatest stress, which are the weakest parts in electronic chips. Cracks in solder joints are generated near the package side and emerged from the edge of the intermetallic compound (IMC) layer with the largest curvature. [ABSTRACT FROM AUTHOR]

Network virtualization provides a promising solution to overcome the ossification of current networks, allowing multiple Virtual Network Requests (VNRs) to be embedded on a common infrastructure. The major challenge in network virtualization is the Virtual Network Embedding (VNE) problem, which is to embed VNRs onto a shared substrate network and known to be $\mathcal {NP}$ -hard. The topological heterogeneity of VNRs is one important factor hampering the performance of the VNE. However, in many specialized applications and infrastructures, VNRs are of some common structural features, e.g., paths and cycles. To achieve better outcomes, it is thus critical to design dedicated algorithms for these applications and infrastructures by taking into accounting topological characteristics. Besides, paths and cycles are two of the most fundamental topologies that all network structures consist of. Exploiting the characteristics of path and cycle embeddings is vital to tackle the general VNE problem. In this paper, we investigate the path and cycle embedding problems. For path embedding, we prove its $\mathcal {NP}$ -hardness and inapproximability. Then, by utilizing Multiple Knapsack Problem (MKP) and Multi-Dimensional Knapsack Problem (MDKP), we propose an efficient and effective MKP-MDKP-based algorithm. For cycle embedding, we propose a Weighted Directed Auxiliary Graph (WDAG) to develop a polynomial-time algorithm to determine the least-resource-consuming embedding. Numerical results show our customized algorithms can boost the acceptance ratio and revenue compared to generic embedding algorithms in the literature. [ABSTRACT FROM AUTHOR]

With flexibility in optical layer, elastic optical network (EON) has been considered as a competitive candidate to architect next-generation backbone networks. Routing and spectrum assignment (RSA) is a key problem for the service provisioning in EONs. The RSA problem is $\mathcal {NP}$ -hard even in elastic optical rings. Numerous heuristics have been proposed, and they can generally be categorized into two types: Route-First (RF) and Spectrum-First (SF). Although most previous work demonstrated by numerical simulations that the SF algorithms always outperform the RF ones, there is a lack of theoretical analysis on the reasons causing the performance difference between the two types of RSA algorithms. In this paper, we aim at proposing a unified theoretical framework for the performance analysis of RSA algorithms by leveraging conflict graphs, which offers a new perception on the optimality of RSA algorithms. To validate the proposed framework, we apply it in elastic optical rings (with cycle topology), and theoretically analyze the number of edges of the conflict graphs for RF and SF algorithms. Different from the literature, we obtain an interesting observation that neither the RF nor the SF can surpass the other in elastic optical rings under different traffic distributions, and their performances have a strong correlation to the edge count of their conflict graph. This observation provides a new perspective, i.e., conflict graph, to explore the property of RSA algorithms. [ABSTRACT FROM AUTHOR]

In elastic optical networks, two lightpaths sharing common fiber links might have to be isolated in the spectrum domain with a proper guard-band to prevent crosstalk and/or reduce physical-layer security threats. Meanwhile, the actual requirements on guard-band sizes can vary for different lightpath pairs, because of various reasons. Therefore, in this paper, we consider the situation in which the actual guard-band requirements for different lightpath pairs are different, and formulate the distance spectrum assignment (DSA) problem to investigate how to assign the spectrum resources efficiently in such a situation. We first define the DSA problem formally and prove its \mathcal NP -hardness and inapproximability. Then, we analyze and provide the upper and lower bounds for the optimal solution of DSA, and prove that they are tight. In order to solve the DSA problem time-efficiently, we develop a two-phase algorithm. In its first phase, we obtain an initial solution and then the second phase improves the quality of the initial solution with random optimization. We prove that the proposed two-phase algorithm can get the optimal solution in bipartite DSA conflict graphs and can ensure an approximate ratio of \mathcal O(\log (|V|)) in complete DSA conflict graphs, where $|V|$ is the number of vertices in the conflict graph, i.e., the number of lightpaths to be considered. Numerical results demonstrate our proposed algorithm can find near-optimal solutions for DSA in various conflict graphs. [ABSTRACT FROM AUTHOR]

In this paper, an immune algorithm (IA) is developed for optimization of the harmonic performance of a three-phase inverter under the space-vector pulsewidth-modulation (SVPWM) control strategy. The presented algorithm employs the immune approach as the search method for finding the best optimal control vectors and action time of the three-phase inverter. As a result, the optimal control vectors and action time are calculated to minimize the objective function of the weighted total harmonic distortion of the output voltage waveforms. In addition, an experimental platform based on DSP and field-programmable gate array is built. This paper provides a detailed performance analysis of the method with comparison to the conventional SVPWM. The simulation and experimental results verify the superiority of the best control sequences generated by IA compared with the existing conventional control strategies. [ABSTRACT FROM PUBLISHER]