Search

The implementation of backhauling links poses several challenges to the designers which are requested to limit the hardware costs in the framework of complex millimeter wave radio systems. This work presents a monolithically integrated E-band I/Q receiver covering the whole bandwidth from 71 to 86 GHz. The chip was implemented in a 55 nm SiGe BiCMOS technology which allows reaching a high level of integration. The receiver is based on a Low Noise Amplifier (LNA) stage and a Variable-Gain Amplifier (VGA) which provide a −11 dBm IP1dB. A double balanced mixer provides I/Q baseband outputs through a reduced-size differential phase shifter which allows to contain the chip size to 1.8 mm2. [ABSTRACT FROM AUTHOR]

This paper proposes unprecedented Expectation Propagation (EP)-based receivers for Circular Faster-Than-Nyquist (CFTN) signaling. This concept yields a Minimum Mean-Square-Error equalizer for InterSymbol Interference (ISI) processing combined with a block which we call Constellation Matcher in charge of the symbol estimates realignment with the constellation. From this framework, we explore different scheduling strategies leading to iterative EP-based receivers with our without decision feedback. Then, by extending the family of the EP process to a subset of non-circular Gaussian distributions results in a Widely Linear (WL) equalization. This new WL-EP receiver best fits the CFTN model, allowing enhanced performance at the cost of a slightly increased complexity. Also, we propose to restrict the Gaussian family to circular Gaussian distributions with identity covariance matrices up to a scaling factor. Combined with CFTN, this particular family allows a low-complexity Frequency-Domain processing of the equalization without requiring any cyclic prefix. The proposed EP-based receivers for CFTN are then evaluated for different spectral efficiencies and computational complexities. Our simulations show that they completely handle the ISI up to 5 bits/s/Hz and double the spectral efficiency compared to Nyquist signaling with almost no performance loss. [ABSTRACT FROM AUTHOR]

Maximum oscillation frequency (${f}_{\textit {MAX}}$) of mm-wave transistors is one of the key figures of merit (FOMs) for evaluating the HF-performance of a given technology. However, accurate measurements of ${f}_{\textit {MAX}}$ are very difficult. Determination of ${f}_{\textit {MAX}}$ is significantly affected by the measurement uncertainties in the admittance (${y}$) parameters. In order to get rid of the random measurement error and to obtain a reliable and stable ${f}_{\textit {MAX}}$ value, the frequency dependent ${y}$ -parameters are described by rational functions formulated from the small-signal hybrid ${\pi }$ -model of the transistor under investigation. The parameters of these functions are determined following a least square error technique that minimizes the functional error with the measured data. The approach is especially useful for a fast and reliable evaluation of ${f}_{\textit {MAX}}$ value. Devices from two different SiGe and an FDSOI (Fully Depleted Silicon On Insulator) MOS technology are measured and stable ${f}_{\textit {MAX}}$ values are estimated following this approach. [ABSTRACT FROM AUTHOR]

In this article, the electrical model of a millimeter-wave (mmW), silicon-based noise source is developed in the frequency range up to 325 GHz. The model is studied as a function of the biasing current and the structure size. The noise source is based on a Schottky diode realized on the 55-nm SiGe BiCMOS technology from STMicroelectronics, Crolles, France. Due to the ability of being integrated on silicon, this noise source can be used for high-frequency in situ noise characterization of advanced silicon CMOS or bipolar technologies in the mmW range. In previous study, the diode was used as a noise source when biased near the avalanche regime, and an excess noise ratio (ENR) up to 20 dB has been achieved in a frequency range up to 260 GHz. In this article, the ENR value of the diode is retrieved from the electrical model and compared to the value extracted by measurements. The extracted ENR value was also studied for several diode sizes and biasing currents and measured up to 325 GHz, with a good agreement with the modeling. [ABSTRACT FROM AUTHOR]

A 240-GHz direct conversion I–Q receiver with 74-GHz RF bandwidth is reported. It features a mixer-first architecture with fundamental local oscillator (LO)-frequency Gilbert-cell downconversion mixers, variable-gain baseband amplifiers, and a 240-GHz LO source, making it the first fully integrated 240-GHz I–Q receiver. With a phase noise of −82 dBc/Hz at 1-MHz offset, the LO source has a 27-GHz tuning range and consists of a 120-GHz voltage-controlled oscillator (VCO), a frequency doubler, and a static divide-by-128 chain. The measured peak downconversion gain is 23 dB and is adjustable over 38 dB. Along with the IF bandwidth of 59 GHz, the wide RF bandwidth makes it suitable for both high data-rate communication and emerging quantum computing applications. The chip occupies an area of 1.837 mm2 and consumes 859 mW. [ABSTRACT FROM AUTHOR]

Linear beamformers are optimal, in a mean square (MS) sense, when the signal of interest (SOI) and observations are jointly Gaussian and circular. Otherwise, linear beamformers become suboptimal. When the SOI and observations are zero-mean, jointly Gaussian and noncircular, optimal beamformers become widely linear (WL). They become nonlinear with a structure depending on the unknown joint probability distribution of the SOI and observations when the latter are jointly nonGaussian, assumption which is very common in radiocommunications. In this context, the paper aims at introducing, for small-scale systems, third-order Volterra minimum variance distortionless response (MVDR) beamformers, for the reception of an SOI, whose waveform is unknown but whose steering vector is known, corrupted by nonGaussian and potentially noncircular interference, omnipresent in practical situations. Properties, performance, complexity, and adaptive implementation of these beamformers in the presence of nonGaussian and potentially noncircular interference are analyzed in this paper. These new beamformers are shown to always improve, in the steady state, the performance of Capon beamformer for nonGaussian/circular interference, whereas some of them improve the performance of the WL MVDR beamformer for nonGaussian/noncircular interference. These new beamformers open new perspectives for spectrum monitoring of nonGaussian signals and for radiocommunication networks using such signals. [ABSTRACT FROM AUTHOR]

Widely linear (WL) receivers have the capability to perform single antenna interference cancellation (SAIC) of one rectilinear (R) or quasi-rectilinear (QR) co-channel interference (CCI), a function which is operational in global system for mobile communications (GSM) handsets in particular. Moreover, SAIC technology for QR signals is still required for voice services over adaptive multiuser channels on one slot (VAMOS) standard, a recent evolution of both GSM and enhanced data rates for GSM evolution (EDGE) standards, to mitigate legacy GSM CCI in particular. It is also required for filter bank multicarrier offset quadrature amplitude modulation (FBMC-OQAM) networks, which are candidate for 5G mobile networks, to mitigate intercarrier interference at reception for frequency selective propagation channels in particular. In this context, the purpose of this paper is twofold. The first one is to get more insights into the existing SAIC technology, and its extension to multiple antenna called multiple antenna interference cancellation (MAIC), by showing analytically that, contrary to what is accepted as true in the literature, SAIC/MAIC implemented from standard WL filtering may be less efficient for QR signals than for R ones. From this result, the second purpose of the paper is to propose and to analyze, forQRsignals and frequency selective fading channels, an SAIC/MAIC enhancement based on a three-input WL frequency shift receiver, making QR signals always almost equivalent to R ones for WL filtering in the presence of CCI. The results of the paper, completely new, may contribute to develop elsewhere new powerful WL receivers for QR signals and for both VAMOS and FBMC-OQAM networks in particular. [ABSTRACT FROM AUTHOR]

The system and transistor-level design of low-power millimeter wave (mm-wave) active tags in silicon is discussed in detail. Two active mm-wave tags with identical system architecture, padframe, and chip size were designed and fabricated in 55-nm SiGe BiCMOS and 45-nm SOI CMOS technologies, respectively. They feature a three-stage low-noise amplifier (LNA), a wake-up detector, a BPSK modulator, and two variable gain output stages, each driving a separate transmit antenna in antiphase. The wake-up detector can be used to switch OFF all the blocks except for the LNA and detector, thus further reducing power consumption. The measured performance of the SiGe and SOI chips is remarkably similar: 19- and 20-dB gain, 9- and 8-dB noise figure, and 25-/10.8-mW (active/idle) and 18-mW power consumption, respectively. The SiGe tag was flip-chip-mounted on a mini-PCB with one receive and two transmit antennas for system level functionality tests carried out over a distance of 5 m. The SiGe-tag wake-up sensitivity was verified to be −62 dBm, in excellent agreement with simulation results. [ABSTRACT FROM PUBLISHER]

This paper presents Si/SiGe:C and InP/GaAsSb HBTs which feature specific assets to address submillimeter-wave and THz applications. Process and modeling status and challenges are reviewed. The specific topics of thermal and substrate effects, reliability, and HF measurements are also discussed. [ABSTRACT FROM PUBLISHER]

Two distributed circuits based on MOS-HBT cascodes are reported in a 55-nm SiGe BiCMOS technology and are aimed at a single-chip time-interleaved transceiver for future 1-Tb/s optical links. The first, a DC-135-GHz single-ended distributed amplifier (DA) was optimized for low noise, linear receivers, and has a measured noise figure (NF) < 7 dB up to 88.5 GHz, 800 mVpp of linear input range, and 8.5 dB gain. Operation was confirmed with PRBS-31 eye diagram measurements up to 120 Gb/s. Additionally, a novel time-interleaved distributed power DAC test circuit was implemented as a proof-of-concept to investigate the maximum achievable output bandwidth at a differential output voltage swing of 6 Vpp, as needed to directly drive an optical modulator. Simulations of the doubly segmented 6-bit DAC show 4-PAM output eye diagrams at up to 120 GBaud. The measured clock-input-to-data-output small-signal bandwidth is 65 GHz. When the DAC is measured as a switching large-swing driver, the differential output voltage swing remains larger than 5.4~\text {V}_{\mathrm {pp}} beyond 50 Gb/s. Time interleaving of 4 thermometer MSBs is demonstrated experimentally to form a 1.8- \text{V}_{\text {pp}}$ differential, 10-GBaud 3-PAM output signal. The experimental sampling rate is limited to 10 GS/s by the capacitance and bandwidth of the low-frequency probes and pads used for the data lanes. [ABSTRACT FROM AUTHOR]

A 234–261-GHz signal source with record 7.2-dBm output power at 240 GHz and −105 dBc/Hz phase noise at 10-MHz offset is reported. Fabricated in a production 55-nm SiGe BiCMOS process with HBT f\mathrm {T}/f\mathrm {MAX} of 330/350 GHz, the circuit includes a 120-GHz fundamental frequency VCO with 1.2-V AMOS varactors, a broadband MOS-HBT cascode LO tree driving a divide-by-128 chain, and a doubler with a record drain efficiency of 11.9%. The total power consumption of the signal source is 386 mW resulting in a DC-to-RF efficiency of 1.3%. A detailed discussion of the candidate LO-tree and doubler topologies and of the design methodology, which capitalizes on the MOS-HBT cascode and unique features of the 55-nm SiGe BiCMOS process, is provided. [ABSTRACT FROM AUTHOR]

This paper investigates alternative topologies of silicon germanium heterojunction bipolar transistors designed and fabricated in the state-of-the-art BiCMOS process from STMicroelectronics for improved safe-operating characteristics. Electrical and thermal behaviors of various structures are analyzed and compared, along with a detailed discussion on drawbacks and advantages. The test structures under study are different in terms of emitter-finger layouts as well as the metal stacks in the back-end-of-line. It is observed that the multifinger transistor structures having nonuniform finger lengths with wider area enclosed by the deep trench and higher metallization stacks yield an improved thermal behavior. Therefore, the safe-operating area of multifinger transistors can be extended without degrading the RF performances. [ABSTRACT FROM PUBLISHER]

This paper addresses the behavior of a classical multiantenna GLRT test that allows to detect the presence of a known signal corrupted by a multipath propagation channel and by an additive temporally white Gaussian noise with unknown spatial covariance matrix. The paper is focused on the case where the number of sensors M is large, and of the same order of magnitude as the sample size N, a context which is modeled by the large system asymptotic regime M \rightarrow +\infty , N \rightarrow +\infty in such a way that M/N \rightarrow c for c \in (0,+\infty ). The purpose of this paper is to study the behaviour of a GLRT statistics in this regime, and to show that the corresponding theoretical analysis allows to accurately predict the performance of the test when M and N are of the same order of magnitude. [ABSTRACT FROM PUBLISHER]